Part 2.
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@@ -41,6 +41,9 @@
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#include <86box/machine.h>
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#include <86box/chipset.h>
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#include <86box/spd.h>
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#ifndef USE_DRB_HACK
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#include <86box/row.h>
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#endif
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#define MEM_STATE_SHADOW_R 0x01
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#define MEM_STATE_SHADOW_W 0x02
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@@ -158,6 +161,27 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
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(regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20));
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}
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#ifndef USE_DRB_HACK
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static void
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i420ex_drb_recalc(i420ex_t *dev)
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{
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int i;
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uint32_t boundary, shift;
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for (i = 4; i >= 0; i--)
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row_disable(i);
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for (i = 0; i <= 4; i++) {
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shift = (i & 1) << 2;
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boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
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row_set_boundary(i, boundary);
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}
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flushmmucache();
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}
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#endif
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static void
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i420ex_write(int func, int addr, uint8_t val, void *priv)
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{
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@@ -289,7 +313,12 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
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case 0x62:
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case 0x63:
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case 0x64:
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#ifdef USE_DRB_HACK
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spd_write_drbs(dev->regs, 0x60, 0x64, 1);
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#else
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dev->regs[addr] = val;
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i420ex_drb_recalc(dev);
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#endif
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break;
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case 0x66:
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case 0x67:
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@@ -452,7 +481,7 @@ i420ex_reset(void *priv)
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i420ex_write(0, 0x59 + i, 0x00, priv);
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for (uint8_t i = 0; i <= 4; i++)
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i420ex_write(0, 0x60 + i, 0x01, priv);
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dev->regs[0x60 + i] = 0x01;
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dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */
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dev->smram_locked = 0;
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@@ -530,6 +559,11 @@ i420ex_init(const device_t *info)
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device_add(&ide_pci_2ch_device);
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#ifndef USE_DRB_HACK
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row_device.local = 4 | (1 << 8) | (0x01 << 16) | (8 << 24);
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device_add((const device_t *) &row_device);
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#endif
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i420ex_reset_hard(dev);
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return dev;
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