Applied mainline PCem commit: Added code generation for RMW versions of ADD/SUB/OR/XOR/AND.
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@@ -1,6 +1,3 @@
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/* Copyright holders: Sarah Walker
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see COPYING for more details
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*/
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#define BLOCK_SIZE 0x4000
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#define BLOCK_MASK 0x3fff
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#define BLOCK_START 0
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@@ -13,6 +10,8 @@
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#define BLOCK_EXIT_OFFSET 0x7e0
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#define BLOCK_GPF_OFFSET (BLOCK_EXIT_OFFSET - 20)
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#define BLOCK_MAX 1650
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enum
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{
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OP_RET = 0xc3
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