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Refactored AHA-154x and BusLogic emulation and made them use a common core;

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Fixed AHA-154x scatter/gather transfers;
Two-phased SCSI read-direction commands;
Made scsi_bus.c use a dynamically malloc'd buffer instead of a giant fixed-size buffer;
The AHA-154x/BusLogic thread now uses mutexes;
The BusLogic BT-545C is now the BT-545S;
Added the BusLogic BT-542BH;
The AHA-1542CF now again uses the v2.11 BIOS as the CD booting now works;
Applied PCem commit that adds NMI support to the recompiler;
Applied PCem commit that adds the IBM XT 286;
Applied PCem commits that have to do with sound, including the ES1371;
Fixed the NCR5380 output data register;
Moved the SLiRP mutex stuff from win.c to the appropriate network files;
Added sanity checks to everything in win_thread.c.
This commit is contained in:
OBattler
2017-10-14 07:03:19 +02:00
parent 2b82661cf4
commit 2792da5432
41 changed files with 6919 additions and 5432 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
src/cpu/386_dynarec.c
View File

@@ -13,6 +13,7 @@
#include "x86_ops.h"
#include "x87.h"
#include "../mem.h"
#include "../nmi.h"
#include "../pic.h"
#include "../timer.h"
#include "../floppy/floppy.h"
@@ -602,6 +603,9 @@ void exec386_dynarec(int cycs)
if (trap)
CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
ins++;
insc++;
@@ -750,6 +754,9 @@ inrecomp=0;
if (trap)
CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
if (cpu_state.abrt)
{
@@ -818,6 +825,9 @@ inrecomp=0;
if (trap)
CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
if (cpu_state.abrt)
{
@@ -884,6 +894,19 @@ inrecomp=0;
loadcs(readmemw(0,addr+2));
}
}
else if (nmi && nmi_enable && nmi_mask)
{
cpu_state.oldpc = cpu_state.pc;
oldcs = CS;
pclog("NMI\n");
x86_int(2);
nmi_enable = 0;
if (nmi_auto_clear)
{
nmi_auto_clear = 0;
nmi = 0;
}
}
else if ((flags&I_FLAG) && pic_intpending)
{
temp=picinterrupt();

1
src/cpu/386_dynarec_ops.c
View File

@@ -13,6 +13,7 @@
#include "x87.h"
#include "x86_flags.h"
#include "../mem.h"
#include "../nmi.h"
#include "codegen.h"
#include "../pic.h"

7
src/cpu/cpu.c
View File

@@ -260,6 +260,13 @@ CPU cpus_ibmat[] =
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ibmxt286[] =
{
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ps1_m2011[] =
{
/*286*/

1
src/cpu/cpu.h
View File

@@ -130,6 +130,7 @@ extern CPU cpus_pcjr[];
extern CPU cpus_europc[];
extern CPU cpus_pc1512[];
extern CPU cpus_ibmat[];
extern CPU cpus_ibmxt286[];
extern CPU cpus_ps1_m2011[];
extern CPU cpus_ps2_m30_286[];
extern CPU cpus_acer[];

24
src/cpu/x86_ops_io.h
View File

@@ -5,6 +5,8 @@ static int opIN_AL_imm(uint32_t fetchdat)
AL = inb(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_AX_imm(uint32_t fetchdat)
@@ -15,6 +17,8 @@ static int opIN_AX_imm(uint32_t fetchdat)
AX = inw(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_EAX_imm(uint32_t fetchdat)
@@ -27,6 +31,8 @@ static int opIN_EAX_imm(uint32_t fetchdat)
EAX = inl(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
@@ -39,6 +45,8 @@ static int opOUT_AL_imm(uint32_t fetchdat)
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (port == 0x64)
return x86_was_reset;
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_AX_imm(uint32_t fetchdat)
@@ -49,6 +57,8 @@ static int opOUT_AX_imm(uint32_t fetchdat)
outw(port, AX);
CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_EAX_imm(uint32_t fetchdat)
@@ -61,6 +71,8 @@ static int opOUT_EAX_imm(uint32_t fetchdat)
outl(port, EAX);
CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
@@ -70,6 +82,8 @@ static int opIN_AL_DX(uint32_t fetchdat)
AL = inb(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_AX_DX(uint32_t fetchdat)
@@ -79,6 +93,8 @@ static int opIN_AX_DX(uint32_t fetchdat)
AX = inw(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_EAX_DX(uint32_t fetchdat)
@@ -90,6 +106,8 @@ static int opIN_EAX_DX(uint32_t fetchdat)
EAX = inl(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
@@ -99,6 +117,8 @@ static int opOUT_AL_DX(uint32_t fetchdat)
outb(DX, AL);
CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return x86_was_reset;
}
static int opOUT_AX_DX(uint32_t fetchdat)
@@ -108,6 +128,8 @@ static int opOUT_AX_DX(uint32_t fetchdat)
outw(DX, AX);
CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_EAX_DX(uint32_t fetchdat)
@@ -118,5 +140,7 @@ static int opOUT_EAX_DX(uint32_t fetchdat)
check_io_perm(DX + 3);
outl(DX, EAX);
PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}