PIT: add alternative faster PIT
This is enabled by default on 486+ CPUs and can be forced disabled/enabled with pit_mode=0/1
This commit is contained in:
Adrien Moulin
706
src/pit_fast.c
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706
src/pit_fast.c
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@@ -0,0 +1,706 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Intel 8253/8254 Programmable Interval
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* Timer.
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*
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*
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2019 Miran Grca.
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*/
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#include <inttypes.h>
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#include <math.h>
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/device.h>
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#include <86box/timer.h>
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#include <86box/cassette.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/nmi.h>
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#include <86box/pic.h>
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#include <86box/timer.h>
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#include <86box/pit.h>
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#include <86box/pit_fast.h>
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#include <86box/ppi.h>
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#include <86box/machine.h>
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#include <86box/sound.h>
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#include <86box/snd_speaker.h>
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#include <86box/video.h>
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#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */
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#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */
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#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */
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#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */
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#ifdef ENABLE_PIT_LOG
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int pit_do_log = ENABLE_PIT_LOG;
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static void
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pit_log(const char *fmt, ...)
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{
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va_list ap;
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if (pit_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define pit_log(fmt, ...)
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#endif
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static void
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pitf_ctr_set_out(ctrf_t *ctr, int out)
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{
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if (ctr == NULL)
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return;
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if (ctr->out_func != NULL)
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ctr->out_func(out, ctr->out);
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ctr->out = out;
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}
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static void
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pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count))
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{
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if (data == NULL)
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return;
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pitf_t *pit = (pitf_t *)data;
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ctrf_t *ctr = &pit->counters[counter_id];
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ctr->load_func = func;
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}
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static uint16_t
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pitf_ctr_get_count(void *data, int counter_id)
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{
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pitf_t *pit = (pitf_t *)data;
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ctrf_t *ctr = &pit->counters[counter_id];
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return (uint16_t) ctr->l;
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}
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static void
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pitf_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int old_out))
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{
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if (data == NULL)
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return;
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pitf_t *pit = (pitf_t *)data;
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ctrf_t *ctr = &pit->counters[counter_id];
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ctr->out_func = func;
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}
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static void
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pitf_ctr_set_using_timer(void *data, int counter_id, int using_timer)
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{
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if (tsc > 0)
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timer_process();
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pitf_t *pit = (pitf_t *)data;
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ctrf_t *ctr = &pit->counters[counter_id];
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ctr->using_timer = using_timer;
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}
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static int
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pitf_read_timer(ctrf_t *ctr)
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{
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if (ctr->using_timer && !(ctr->m == 3 && !ctr->gate) && timer_is_enabled(&ctr->timer)) {
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int read = (int) ((timer_get_remaining_u64(&ctr->timer)) / PITCONST);
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if (ctr->m == 2)
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read++;
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if (read < 0)
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read = 0;
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if (read > 0x10000)
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read = 0x10000;
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if (ctr->m == 3)
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read <<= 1;
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return read;
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}
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if (ctr->m == 2)
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return ctr->count + 1;
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return ctr->count;
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}
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/*Dump timer count back to pit->count[], and disable timer. This should be used
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when stopping a PIT timer, to ensure the correct value can be read back.*/
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static void
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pitf_dump_and_disable_timer(ctrf_t *ctr)
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{
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if (ctr->using_timer && timer_is_enabled(&ctr->timer)) {
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ctr->count = pitf_read_timer(ctr);
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timer_disable(&ctr->timer);
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}
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}
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static void
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pitf_ctr_load(ctrf_t *ctr)
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{
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int l = ctr->l ? ctr->l : 0x10000;
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ctr->newcount = 0;
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ctr->disabled = 0;
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switch (ctr->m) {
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case 0: /*Interrupt on terminal count*/
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ctr->count = l;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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pitf_ctr_set_out(ctr, 0);
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ctr->thit = 0;
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ctr->enabled = ctr->gate;
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break;
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case 1: /*Hardware retriggerable one-shot*/
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ctr->enabled = 1;
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break;
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case 2: /*Rate generator*/
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if (ctr->initial) {
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ctr->count = l - 1;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) ((l - 1) * PITCONST));
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pitf_ctr_set_out(ctr, 1);
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ctr->thit = 0;
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}
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ctr->enabled = ctr->gate;
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break;
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case 3: /*Square wave mode*/
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if (ctr->initial) {
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ctr->count = l;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST));
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pitf_ctr_set_out(ctr, 1);
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ctr->thit = 0;
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}
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ctr->enabled = ctr->gate;
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break;
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case 4: /*Software triggered stobe*/
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if (!ctr->thit && !ctr->initial)
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ctr->newcount = 1;
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else {
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ctr->count = l;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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pitf_ctr_set_out(ctr, 0);
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ctr->thit = 0;
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}
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ctr->enabled = ctr->gate;
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break;
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case 5: /*Hardware triggered stobe*/
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ctr->enabled = 1;
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break;
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}
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if (ctr->load_func != NULL)
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ctr->load_func(ctr->m, l);
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ctr->initial = 0;
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ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled;
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if (ctr->using_timer && !ctr->running)
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pitf_dump_and_disable_timer(ctr);
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}
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static void
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pitf_set_gate_no_timer(ctrf_t *ctr, int gate)
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{
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int l = ctr->l ? ctr->l : 0x10000;
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if (ctr->disabled) {
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ctr->gate = gate;
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return;
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}
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switch (ctr->m) {
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case 0: /*Interrupt on terminal count*/
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case 4: /*Software triggered stobe*/
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if (ctr->using_timer && !ctr->running)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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ctr->enabled = gate;
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break;
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case 1: /*Hardware retriggerable one-shot*/
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case 5: /*Hardware triggered stobe*/
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if (gate && !ctr->gate) {
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ctr->count = l;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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pitf_ctr_set_out(ctr, 0);
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ctr->thit = 0;
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ctr->enabled = 1;
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}
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break;
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case 2: /*Rate generator*/
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if (gate && !ctr->gate) {
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ctr->count = l - 1;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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pitf_ctr_set_out(ctr, 1);
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ctr->thit = 0;
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}
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ctr->enabled = gate;
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break;
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case 3: /*Square wave mode*/
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if (gate && !ctr->gate) {
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ctr->count = l;
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if (ctr->using_timer)
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timer_set_delay_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST));
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pitf_ctr_set_out(ctr, 1);
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ctr->thit = 0;
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}
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ctr->enabled = gate;
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break;
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}
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ctr->gate = gate;
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ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled;
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if (ctr->using_timer && !ctr->running)
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pitf_dump_and_disable_timer(ctr);
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}
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static void
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pitf_ctr_set_gate(void *data, int counter_id, int gate)
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{
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pitf_t *pit = (pitf_t *)data;
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ctrf_t *ctr = &pit->counters[counter_id];
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if (ctr->disabled) {
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ctr->gate = gate;
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return;
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}
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pitf_set_gate_no_timer(ctr, gate);
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}
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static void
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pitf_over(ctrf_t *ctr)
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{
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int l = ctr->l ? ctr->l : 0x10000;
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if (ctr->disabled) {
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ctr->count += 0xffff;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST));
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return;
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}
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switch (ctr->m) {
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case 0: /*Interrupt on terminal count*/
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case 1: /*Hardware retriggerable one-shot*/
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if (!ctr->thit)
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pitf_ctr_set_out(ctr, 1);
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ctr->thit = 1;
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ctr->count += 0xffff;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST));
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break;
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case 2: /*Rate generator*/
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ctr->count += l;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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pitf_ctr_set_out(ctr, 0);
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pitf_ctr_set_out(ctr, 1);
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break;
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case 3: /*Square wave mode*/
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if (ctr->out) {
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pitf_ctr_set_out(ctr, 0);
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ctr->count += (l >> 1);
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) ((l >> 1) * PITCONST));
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} else {
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pitf_ctr_set_out(ctr, 1);
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ctr->count += ((l + 1) >> 1);
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST));
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}
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// if (!t) pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST);
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break;
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case 4: /*Software triggered strove*/
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if (!ctr->thit) {
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pitf_ctr_set_out(ctr, 0);
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pitf_ctr_set_out(ctr, 1);
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}
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if (ctr->newcount) {
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ctr->newcount = 0;
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ctr->count += l;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (l * PITCONST));
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} else {
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ctr->thit = 1;
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ctr->count += 0xffff;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST));
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}
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break;
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case 5: /*Hardware triggered strove*/
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if (!ctr->thit) {
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pitf_ctr_set_out(ctr, 0);
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pitf_ctr_set_out(ctr, 1);
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}
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ctr->thit = 1;
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ctr->count += 0xffff;
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if (ctr->using_timer)
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timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST));
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break;
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}
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ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled;
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if (ctr->using_timer && !ctr->running)
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pitf_dump_and_disable_timer(ctr);
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}
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static __inline void
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pitf_ctr_latch_count(ctrf_t *ctr)
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{
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ctr->rl = pitf_read_timer(ctr);
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// pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]);
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// pit->ctrl |= 0x30;
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ctr->rereadlatch = 0;
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ctr->rm = 3;
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ctr->latched = 1;
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}
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static __inline void
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pitf_ctr_latch_status(ctrf_t *ctr)
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{
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ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0);
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ctr->do_read_status = 1;
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}
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static void
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pitf_write(uint16_t addr, uint8_t val, void *priv)
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{
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pitf_t *dev = (pitf_t *) priv;
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int t = (addr & 3);
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ctrf_t *ctr;
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pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv);
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switch (addr & 3) {
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case 3: /* control */
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t = val >> 6;
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if (t == 3) {
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if (dev->flags & PIT_8254) {
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/* This is 8254-only. */
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if (!(val & 0x20)) {
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if (val & 2)
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pitf_ctr_latch_count(&dev->counters[0]);
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if (val & 4)
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pitf_ctr_latch_count(&dev->counters[1]);
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if (val & 8)
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pitf_ctr_latch_count(&dev->counters[2]);
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pit_log("PIT %i: Initiated readback command\n", t);
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}
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if (!(val & 0x10)) {
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if (val & 2)
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pitf_ctr_latch_status(&dev->counters[0]);
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if (val & 4)
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pitf_ctr_latch_status(&dev->counters[1]);
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if (val & 8)
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pitf_ctr_latch_status(&dev->counters[2]);
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}
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}
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} else {
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dev->ctrl = val;
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ctr = &dev->counters[t];
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if (!(dev->ctrl & 0x30)) {
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pitf_ctr_latch_count(ctr);
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dev->ctrl |= 0x30;
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pit_log("PIT %i: Initiated latched read, %i bytes latched\n",
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t, ctr->latched);
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} else {
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ctr->ctrl = val;
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ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3;
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ctr->m = (val >> 1) & 7;
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if (ctr->m > 5)
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ctr->m &= 3;
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if (!(ctr->rm)) {
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ctr->rm = 3;
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ctr->rl = pitf_read_timer(ctr);
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}
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ctr->rereadlatch = 1;
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ctr->initial = 1;
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if (!ctr->m)
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pitf_ctr_set_out(ctr, 0);
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else
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pitf_ctr_set_out(ctr, 1);
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ctr->disabled = 1;
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pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out);
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}
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ctr->thit = 0;
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}
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break;
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case 0:
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case 1:
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case 2: /* the actual timers */
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ctr = &dev->counters[t];
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switch (ctr->wm) {
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case 1:
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ctr->l = val;
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pitf_ctr_load(ctr);
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break;
|
||||
case 2:
|
||||
ctr->l = (val << 8);
|
||||
pitf_ctr_load(ctr);
|
||||
break;
|
||||
case 0:
|
||||
ctr->l &= 0xFF;
|
||||
ctr->l |= (val << 8);
|
||||
pitf_ctr_load(ctr);
|
||||
ctr->wm = 3;
|
||||
break;
|
||||
case 3:
|
||||
ctr->l &= 0xFF00;
|
||||
ctr->l |= val;
|
||||
ctr->wm = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
pitf_read(uint16_t addr, void *priv)
|
||||
{
|
||||
pitf_t *dev = (pitf_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int t = (addr & 3);
|
||||
ctrf_t *ctr;
|
||||
|
||||
switch (addr & 3) {
|
||||
case 3: /* Control. */
|
||||
/* This is 8254-only, 8253 returns 0x00. */
|
||||
ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00;
|
||||
break;
|
||||
|
||||
case 0:
|
||||
case 1:
|
||||
case 2: /* The actual timers. */
|
||||
ctr = &dev->counters[t];
|
||||
|
||||
if (ctr->do_read_status) {
|
||||
ctr->do_read_status = 0;
|
||||
ret = ctr->read_status;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ctr->rereadlatch && !ctr->latched) {
|
||||
ctr->rereadlatch = 0;
|
||||
ctr->rl = pitf_read_timer(ctr);
|
||||
}
|
||||
switch (ctr->rm) {
|
||||
case 0:
|
||||
ret = ctr->rl >> 8;
|
||||
ctr->rm = 3;
|
||||
ctr->latched = 0;
|
||||
ctr->rereadlatch = 1;
|
||||
break;
|
||||
case 1:
|
||||
ret = (ctr->rl) & 0xFF;
|
||||
ctr->latched = 0;
|
||||
ctr->rereadlatch = 1;
|
||||
break;
|
||||
case 2:
|
||||
ret = (ctr->rl) >> 8;
|
||||
ctr->latched = 0;
|
||||
ctr->rereadlatch = 1;
|
||||
break;
|
||||
case 3:
|
||||
ret = (ctr->rl) & 0xFF;
|
||||
if (ctr->m & 0x80)
|
||||
ctr->m &= 7;
|
||||
else
|
||||
ctr->rm = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
pitf_timer_over(void *p)
|
||||
{
|
||||
ctrf_t *ctr = (ctrf_t *) p;
|
||||
pitf_over(ctr);
|
||||
}
|
||||
|
||||
static void
|
||||
pitf_ctr_clock(void *data, int counter_id)
|
||||
{
|
||||
pitf_t *pit = (pitf_t *)data;
|
||||
ctrf_t *ctr = &pit->counters[counter_id];
|
||||
|
||||
if (ctr->thit || !ctr->enabled)
|
||||
return;
|
||||
|
||||
if (ctr->using_timer)
|
||||
return;
|
||||
|
||||
ctr->count -= (ctr->m == 3) ? 2 : 1;
|
||||
if (!ctr->count)
|
||||
pitf_over(ctr);
|
||||
}
|
||||
|
||||
static void
|
||||
ctr_reset(ctrf_t *ctr)
|
||||
{
|
||||
ctr->ctrl = 0;
|
||||
ctr->m = 0;
|
||||
ctr->gate = 0;
|
||||
ctr->l = 0xffff;
|
||||
ctr->thit = 1;
|
||||
ctr->using_timer = 1;
|
||||
}
|
||||
|
||||
static void
|
||||
pitf_reset(pitf_t *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
memset(dev, 0, sizeof(pitf_t));
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
ctr_reset(&dev->counters[i]);
|
||||
|
||||
/* Disable speaker gate. */
|
||||
dev->counters[2].gate = 0;
|
||||
}
|
||||
|
||||
static void
|
||||
pitf_close(void *priv)
|
||||
{
|
||||
pitf_t *dev = (pitf_t *) priv;
|
||||
|
||||
if (dev == pit_devs[0].data)
|
||||
pit_devs[0].data = NULL;
|
||||
|
||||
if (dev == pit_devs[1].data)
|
||||
pit_devs[1].data = NULL;
|
||||
|
||||
if (dev != NULL)
|
||||
free(dev);
|
||||
}
|
||||
|
||||
static void *
|
||||
pitf_init(const device_t *info)
|
||||
{
|
||||
pitf_t *dev = (pitf_t *) malloc(sizeof(pitf_t));
|
||||
pitf_reset(dev);
|
||||
|
||||
dev->flags = info->local;
|
||||
|
||||
if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) {
|
||||
for (int i = 0; i < 3; i++) {
|
||||
ctrf_t *ctr = &dev->counters[i];
|
||||
timer_add(&ctr->timer, pitf_timer_over, (void *)ctr, 0);
|
||||
}
|
||||
}
|
||||
|
||||
if (!(dev->flags & PIT_EXT_IO)) {
|
||||
io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004,
|
||||
pitf_read, NULL, NULL, pitf_write, NULL, NULL, dev);
|
||||
}
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
const device_t i8253_fast_device = {
|
||||
.name = "Intel 8253/8253-5 Programmable Interval Timer",
|
||||
.internal_name = "i8253_fast",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = PIT_8253,
|
||||
.init = pitf_init,
|
||||
.close = pitf_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t i8254_fast_device = {
|
||||
.name = "Intel 8254 Programmable Interval Timer",
|
||||
.internal_name = "i8254_fast",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = PIT_8254,
|
||||
.init = pitf_init,
|
||||
.close = pitf_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t i8254_sec_fast_device = {
|
||||
.name = "Intel 8254 Programmable Interval Timer (Secondary)",
|
||||
.internal_name = "i8254_sec_fast",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = PIT_8254 | PIT_SECONDARY,
|
||||
.init = pitf_init,
|
||||
.close = pitf_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t i8254_ext_io_fast_device = {
|
||||
.name = "Intel 8254 Programmable Interval Timer (External I/O)",
|
||||
.internal_name = "i8254_ext_io_fast",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = PIT_8254 | PIT_EXT_IO,
|
||||
.init = pitf_init,
|
||||
.close = pitf_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t i8254_ps2_fast_device = {
|
||||
.name = "Intel 8254 Programmable Interval Timer (PS/2)",
|
||||
.internal_name = "i8254_ps2_fast",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = PIT_8254 | PIT_PS2 | PIT_EXT_IO,
|
||||
.init = pitf_init,
|
||||
.close = pitf_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const pit_intf_t pit_fast_intf = {
|
||||
&pitf_read,
|
||||
&pitf_write,
|
||||
&pitf_ctr_get_count,
|
||||
&pitf_ctr_set_gate,
|
||||
&pitf_ctr_set_using_timer,
|
||||
&pitf_ctr_set_out_func,
|
||||
&pitf_ctr_set_load_func,
|
||||
&pitf_ctr_clock,
|
||||
NULL,
|
||||
};
|
||||
Reference in New Issue
Block a user