diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c
index 46ed8eba0..c526ecf62 100644
--- a/src/video/vid_s3.c
+++ b/src/video/vid_s3.c
@@ -11084,8 +11084,7 @@ const device_t s3_phoenix_trio64_pci_device = {
 
 const device_t s3_stb_powergraph_64_video_vlb_device = {
     .name          = "S3 Trio64V+ (STB PowerGraph 64 Video) VLB",
-    .name          = "S3 Trio64V+ PCI (Phoenix)",
-    .internal_name = "px_trio64vplus_pci",
+    .internal_name = "stb_trio64vplus_vlb",
     .flags         = DEVICE_VLB,
     .local         = S3_STB_POWERGRAPH_64_VIDEO,
     .init          = s3_init,
diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c
index be6382ec9..52184d88b 100644
--- a/src/video/vid_s3_virge.c
+++ b/src/video/vid_s3_virge.c
@@ -893,6 +893,7 @@ s3_virge_recalctimings(svga_t *svga)
             }
         }
         svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && (svga->crtc[0x32] & 0x40)) ? 0x3ffff : virge->vram_mask;
+        svga->overlay.ena       = 0;
         s3_virge_log("VGA mode\n");
     } else /*Streams mode*/
     {
@@ -918,6 +919,14 @@ s3_virge_recalctimings(svga_t *svga)
         svga->overlay.v_acc = virge->streams.dda_vert_accumulator;
         svga->rowoffset     = virge->streams.pri_stride >> 3;
 
+        if (virge->chip <= S3_VIRGEDX && svga->overlay.ena) {
+            svga->overlay.ena = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101);
+        } else if (virge->chip == S3_VIRGEGX2 && svga->overlay.ena) {
+            /* 0x20 = Secondary Stream enabled */
+            /* 0x2000 = Primary Stream enabled */
+            svga->overlay.ena = !!(virge->streams.blend_ctrl & 0x20);
+        }
+
         switch ((virge->streams.pri_ctrl >> 24) & 0x7) {
             case 0: /*RGB-8 (CLUT)*/
                 svga->render = svga_render_8bpp_highres;
@@ -1963,6 +1972,7 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
                 break;
             case 0x81a0:
                 virge->streams.blend_ctrl = val;
+                svga_recalctimings(svga);
                 break;
             case 0x81c0:
                 virge->streams.pri_fb0 = val & 0x7fffff;