PCI/AGP bridge support, part 1
This commit is contained in:
RichardG867
325
src/device/pci_bridge.c
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325
src/device/pci_bridge.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of PCI-PCI and host-AGP bridges.
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*
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*
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*
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* Authors: RichardG, <richardg867@gmail.com>
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*
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* Copyright 2020 RichardG.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdarg.h>
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#include <stdlib.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/machine.h>
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#include "cpu.h"
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#include <86box/io.h>
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#include <86box/pic.h>
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#include <86box/mem.h>
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#include <86box/device.h>
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#include <86box/pci.h>
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#define PCI_BRIDGE_DEC_21150 0x10110022
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#define AGP_BRIDGE_INTEL_440LX 0x80867181
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#define AGP_BRIDGE_INTEL_440BX 0x80867191
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#define AGP_BRIDGE_INTEL_440GX 0x808671a1
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#define AGP_BRIDGE(x) ((x) >= AGP_BRIDGE_INTEL_440LX)
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typedef struct
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{
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uint32_t local;
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uint8_t type;
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uint8_t regs[256];
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uint8_t bus_index;
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int slot;
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} pci_bridge_t;
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#ifdef ENABLE_PCI_BRIDGE_LOG
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int pci_bridge_do_log = ENABLE_PCI_BRIDGE_LOG;
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static void
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pci_bridge_log(const char *fmt, ...)
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{
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va_list ap;
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if (pci_bridge_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define pci_bridge_log(fmt, ...)
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#endif
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static void
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pci_bridge_write(int func, int addr, uint8_t val, void *priv)
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{
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pci_bridge_t *dev = (pci_bridge_t *) priv;
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pci_bridge_log("PCI Bridge %d: write(%d, %02X, %02X)\n", dev->bus_index, func, addr, val);
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if (func > 0)
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return;
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switch (addr) {
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case 0x00: case 0x01: case 0x02: case 0x03:
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case 0x06: case 0x07: case 0x08: case 0x09:
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case 0x0a: case 0x0b: case 0x0e: case 0x1e:
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case 0x1f: case 0x34: case 0x3d: case 0x67:
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case 0xdc: case 0xdd: case 0xde: case 0xdf:
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case 0xe0: case 0xe1: case 0xe2: case 0xe3:
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return;
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case 0x04:
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val &= 0x67;
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break;
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case 0x05:
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val &= 0x03;
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break;
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case 0x19:
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/* Set our bus number. */
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pci_bridge_log("PCI Bridge %d: switching from bus %02X to %02X\n", dev->bus_index, dev->regs[addr], val);
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if (dev->regs[addr])
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pci_bus_number_to_index_mapping[dev->regs[addr]] = 0xff;
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if (val)
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pci_bus_number_to_index_mapping[val] = dev->bus_index;
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break;
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case 0x1c: case 0x1d: case 0x20: case 0x22:
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case 0x24: case 0x26:
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val &= 0xf0;
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break;
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case 0x3e:
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val &= 0xef;
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break;
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case 0x3f:
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val &= 0x0f;
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break;
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case 0x40:
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val &= 0x32;
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break;
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case 0x41:
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val &= 0x07;
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break;
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case 0x43:
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val &= 0x03;
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break;
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case 0x64:
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val &= 0x7e;
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break;
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case 0x69:
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val &= 0x3f;
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break;
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}
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dev->regs[addr] = val;
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}
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static uint8_t
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pci_bridge_read(int func, int addr, void *priv)
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{
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pci_bridge_t *dev = (pci_bridge_t *) priv;
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uint8_t ret;
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if (func > 0)
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ret = 0xff;
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else
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ret = dev->regs[addr];
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pci_bridge_log("PCI Bridge %d: read(%d, %02X) = %02X\n", dev->bus_index, func, addr, ret);
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return ret;
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}
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static void
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pci_bridge_reset(void *priv)
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{
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pci_bridge_t *dev = (pci_bridge_t *) priv;
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pci_bridge_log("PCI Bridge %d: reset()\n", dev->bus_index);
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/* IDs */
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dev->regs[0x00] = dev->local >> 16;
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dev->regs[0x01] = dev->local >> 24;
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dev->regs[0x02] = dev->local;
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dev->regs[0x03] = dev->local >> 8;
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switch (dev->local) {
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case PCI_BRIDGE_DEC_21150:
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dev->regs[0x06] = 0x80;
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dev->regs[0x07] = 0x02;
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break;
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case AGP_BRIDGE_INTEL_440LX:
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dev->regs[0x06] = 0xa0;
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dev->regs[0x07] = 0x02;
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dev->regs[0x08] = 0x03;
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break;
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case AGP_BRIDGE_INTEL_440BX:
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case AGP_BRIDGE_INTEL_440GX:
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dev->regs[0x06] = 0x20;
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dev->regs[0x07] = dev->regs[0x08] = 0x02;
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break;
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}
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dev->regs[0x0a] = 0x04; /* PCI-PCI bridge */
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dev->regs[0x0b] = 0x06; /* bridge device */
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dev->regs[0x0e] = 0x01;
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/* IO BARs */
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if (AGP_BRIDGE(dev->local)) {
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dev->regs[0x1c] = 0xf0;
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} else {
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dev->regs[0x1c] = dev->regs[0x1d] = 0x01;
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}
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dev->regs[0x1e] = AGP_BRIDGE(dev->local) ? 0xa0 : 0x80;
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dev->regs[0x1f] = 0x02;
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/* prefetchable memory limits */
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if (AGP_BRIDGE(dev->local)) {
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dev->regs[0x20] = dev->regs[0x24] = 0xf0;
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dev->regs[0x21] = dev->regs[0x25] = 0xff;
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} else {
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dev->regs[0x24] = dev->regs[0x26] = 0x01;
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}
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if (dev->local == AGP_BRIDGE_INTEL_440LX)
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dev->regs[0x3e] = 0x80;
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if (dev->local == PCI_BRIDGE_DEC_21150) {
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dev->regs[0x34] = 0xdc;
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dev->regs[0x43] = 0x02;
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dev->regs[0xdc] = dev->regs[0xde] = 0x01;
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}
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}
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static void *
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pci_bridge_init(const device_t *info)
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{
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uint8_t interrupts[4], interrupt_count, interrupt_mask, slot_count, i;
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pci_bridge_t *dev = (pci_bridge_t *) malloc(sizeof(pci_bridge_t));
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memset(dev, 0, sizeof(pci_bridge_t));
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dev->local = info->local;
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dev->bus_index = last_pci_bus++;
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pci_bridge_log("PCI Bridge %d: init()\n", dev->bus_index);
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pci_bridge_reset(dev);
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dev->slot = pci_add_card(AGP_BRIDGE(dev->local) ? 0x01 : PCI_ADD_BRIDGE, pci_bridge_read, pci_bridge_write, dev);
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interrupt_count = sizeof(interrupts);
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interrupt_mask = interrupt_count - 1;
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for (i = 0; i < interrupt_count; i++)
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interrupts[i] = pci_get_int(dev->slot, PCI_INTA + i);
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pci_bridge_log("PCI Bridge %d: upstream bus %02X slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, (dev->slot >> 5) & 0xff, dev->slot & 31, interrupts[0], interrupts[1], interrupts[2], interrupts[3]);
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if (info->local == PCI_BRIDGE_DEC_21150)
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slot_count = 9; /* 9 bus masters */
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else
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slot_count = 1; /* AGP bridges always have 1 slot */
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for (i = 0; i < slot_count; i++) {
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/* Interrupts for bridge slots are assigned in round-robin: ABCD, BCDA, CDAB and so on. */
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pci_bridge_log("PCI Bridge %d: downstream slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, i, interrupts[i & interrupt_mask], interrupts[(i + 1) & interrupt_mask], interrupts[(i + 2) & interrupt_mask], interrupts[(i + 3) & interrupt_mask]);
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pci_register_bus_slot(dev->bus_index, i, /*AGP_BRIDGE(dev->local) ? PCI_CARD_SPECIAL : */PCI_CARD_NORMAL,
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interrupts[i & interrupt_mask],
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interrupts[(i + 1) & interrupt_mask],
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interrupts[(i + 2) & interrupt_mask],
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interrupts[(i + 3) & interrupt_mask]);
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}
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return dev;
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}
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/* PCI bridges */
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const device_t dec21150_device =
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{
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"DEC 21150 PCI Bridge",
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DEVICE_PCI,
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PCI_BRIDGE_DEC_21150,
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pci_bridge_init,
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NULL,
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pci_bridge_reset,
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NULL,
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NULL,
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NULL,
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NULL
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};
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/* AGP bridges */
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const device_t i440lx_agp_device =
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{
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"Intel 82443LX AGP Bridge",
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DEVICE_PCI,
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AGP_BRIDGE_INTEL_440LX,
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pci_bridge_init,
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NULL,
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pci_bridge_reset,
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NULL,
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NULL,
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NULL,
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NULL
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};
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const device_t i440bx_agp_device =
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{
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"Intel 82443BX AGP Bridge",
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DEVICE_PCI,
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AGP_BRIDGE_INTEL_440BX,
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pci_bridge_init,
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NULL,
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pci_bridge_reset,
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NULL,
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NULL,
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NULL,
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NULL
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};
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const device_t i440gx_agp_device =
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{
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"Intel 82443GX AGP Bridge",
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DEVICE_PCI,
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AGP_BRIDGE_INTEL_440GX,
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pci_bridge_init,
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NULL,
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pci_bridge_reset,
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NULL,
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NULL,
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NULL,
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NULL
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};
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