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IBM ESDI MCA, 8514/A, XGA and Rancho changes:

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ESDI MCA: Increased esdi_time from 200 to 512, should fix the timeout that caused the bad attention 03 fatal.
Rancho: Added the Rancho RT1000B-MC MCA SCSI controller, it uses the 8.20R BIOS.
8514/A: Reworked the Outline command to satisfy the manual and the win2.10 (286/386) driver.
XGA: Initial rom len is set to 0x8000 (which, after being configured, is set back to 0x2000) just to not make it hang with POST code 40 25 on most configurations.
This commit is contained in:
TC1995
2022-07-09 23:19:18 +02:00
parent 95c264d98e
commit 333e99113b
7 changed files with 201 additions and 244 deletions
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30
src/disk/hdc_esdi_mca.c
View File

@@ -86,15 +86,15 @@
#define ESDI_IOADDR_SEC 0x3518 #define ESDI_IOADDR_SEC 0x3518
#define ESDI_IRQCHAN 14 #define ESDI_IRQCHAN 14
#define BIOS_FILE_L "roms/hdd/esdi/90x8969.bin" #define BIOS_FILE_L "roms/hdd/esdi/62-000193-036.BIN"
#define BIOS_FILE_H "roms/hdd/esdi/90x8970.bin" #define BIOS_FILE_H "roms/hdd/esdi/62-000194-036.BIN"
#define ESDI_TIME (200*TIMER_USEC) #define ESDI_TIME 512
#define CMD_ADAPTER 0 #define CMD_ADAPTER 0
typedef struct esdi_drive { typedef struct esdi_drive_t {
int spt, hpc; int spt, hpc;
int tracks; int tracks;
int sectors; int sectors;
@@ -102,7 +102,7 @@ typedef struct esdi_drive {
int hdd_num; int hdd_num;
} drive_t; } drive_t;
typedef struct esdi { typedef struct esdi_t {
int8_t dma; int8_t dma;
uint32_t bios; uint32_t bios;
@@ -133,7 +133,7 @@ typedef struct esdi {
int command; int command;
int cmd_state; int cmd_state;
int in_reset; int in_reset, in_reset2;
uint64_t callback; uint64_t callback;
pc_timer_t timer; pc_timer_t timer;
@@ -240,10 +240,10 @@ esdi_mca_set_callback(esdi_t *dev, uint64_t callback)
if (callback) { if (callback) {
dev->callback = callback; dev->callback = callback;
timer_set_delay_u64(&dev->timer, dev->callback); timer_on_auto(&dev->timer, dev->callback);
} else { } else {
dev->callback = 0; dev->callback = 0;
timer_disable(&dev->timer); timer_stop(&dev->timer);
} }
} }
@@ -824,11 +824,18 @@ esdi_read(uint16_t port, void *priv)
uint8_t ret = 0xff; uint8_t ret = 0xff;
switch (port & 7) { switch (port & 7) {
case 2: /*Basic status register*/ case 2: /*Basic status register*/
if (!dev->status) {
if (((dev->command == CMD_WRITE) || dev->in_reset2) && !dev->cmd_dev) {
dev->in_reset2 = 0;
dev->status |= STATUS_STATUS_OUT_FULL;
} else if (dev->command && (dev->cmd_dev == ATTN_HOST_ADAPTER))
dev->status |= STATUS_STATUS_OUT_FULL;
}
ret = dev->status; ret = dev->status;
break; break;
case 3: /*IRQ status*/ case 3: /*IRQ status*/
dev->status &= ~STATUS_IRQ; dev->status &= ~STATUS_IRQ;
ret = dev->irq_status; ret = dev->irq_status;
break; break;
@@ -852,6 +859,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
case 2: /*Basic control register*/ case 2: /*Basic control register*/
if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) {
dev->in_reset = 1; dev->in_reset = 1;
dev->in_reset2 = 1;
esdi_mca_set_callback(dev, ESDI_TIME * 50); esdi_mca_set_callback(dev, ESDI_TIME * 50);
dev->status = STATUS_BUSY; dev->status = STATUS_BUSY;
} }
@@ -883,6 +891,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
case ATTN_RESET: case ATTN_RESET:
dev->in_reset = 1; dev->in_reset = 1;
dev->in_reset2 = 1;
esdi_mca_set_callback(dev, ESDI_TIME * 50); esdi_mca_set_callback(dev, ESDI_TIME * 50);
dev->status = STATUS_BUSY; dev->status = STATUS_BUSY;
break; break;
@@ -1143,6 +1152,7 @@ esdi_init(const device_t *info)
/* Mark for a reset. */ /* Mark for a reset. */
dev->in_reset = 1; dev->in_reset = 1;
dev->in_reset2 = 1;
esdi_mca_set_callback(dev, ESDI_TIME * 50); esdi_mca_set_callback(dev, ESDI_TIME * 50);
dev->status = STATUS_BUSY; dev->status = STATUS_BUSY;

1
src/include/86box/scsi_ncr5380.h
View File

@@ -26,6 +26,7 @@
extern const device_t scsi_lcs6821n_device; extern const device_t scsi_lcs6821n_device;
extern const device_t scsi_rt1000b_device; extern const device_t scsi_rt1000b_device;
extern const device_t scsi_rt1000mc_device;
extern const device_t scsi_t128_device; extern const device_t scsi_t128_device;
extern const device_t scsi_t130b_device; extern const device_t scsi_t130b_device;
extern const device_t scsi_ls2000_device; extern const device_t scsi_ls2000_device;

4
src/include/86box/vid_8514a.h
View File

@@ -62,7 +62,7 @@ typedef struct ibm8514_t
int x1, x2, y1, y2; int x1, x2, y1, y2;
int sys_cnt, sys_cnt2; int sys_cnt, sys_cnt2;
int temp_cnt; int temp_cnt;
int16_t cx, cy; int16_t cx, cy, oldcy;
int16_t sx, sy; int16_t sx, sy;
int16_t dx, dy; int16_t dx, dy;
int16_t err; int16_t err;
@@ -80,7 +80,7 @@ typedef struct ibm8514_t
int odd_in, odd_out; int odd_in, odd_out;
uint16_t scratch; uint16_t scratch;
int fill_state, fill_drop; int fill_state, xdir, ydir;
} accel; } accel;
uint16_t test; uint16_t test;

1
src/scsi/scsi.c
View File

@@ -86,6 +86,7 @@ static SCSI_CARD scsi_cards[] = {
{ &scsi_ls2000_device, }, { &scsi_ls2000_device, },
{ &scsi_lcs6821n_device, }, { &scsi_lcs6821n_device, },
{ &scsi_rt1000b_device, }, { &scsi_rt1000b_device, },
{ &scsi_rt1000mc_device, },
{ &scsi_t128_device, }, { &scsi_t128_device, },
{ &scsi_t130b_device, }, { &scsi_t130b_device, },
#ifdef WALTJE #ifdef WALTJE

128
src/scsi/scsi_ncr5380.c
View File

@@ -156,6 +156,7 @@ typedef struct {
double period; double period;
int ncr_busy; int ncr_busy;
uint8_t pos_regs[8];
} ncr5380_t; } ncr5380_t;
#define STATE_IDLE 0 #define STATE_IDLE 0
@@ -1435,6 +1436,64 @@ t128_write(uint32_t addr, uint8_t val, void *priv)
} }
} }
static uint8_t
rt1000b_mc_read(int port, void *priv)
{
ncr5380_t *ncr_dev = (ncr5380_t *)priv;
return(ncr_dev->pos_regs[port & 7]);
}
static void
rt1000b_mc_write(int port, uint8_t val, void *priv)
{
ncr5380_t *ncr_dev = (ncr5380_t *)priv;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
mem_mapping_disable(&ncr_dev->bios_rom.mapping);
mem_mapping_disable(&ncr_dev->mapping);
/* Save the MCA register value. */
ncr_dev->pos_regs[port & 7] = val;
if (ncr_dev->pos_regs[2] & 1) {
switch (ncr_dev->pos_regs[2] & 0xe0) {
case 0:
ncr_dev->rom_addr = 0xd4000;
break;
case 0x20:
ncr_dev->rom_addr = 0xd0000;
break;
case 0x40:
ncr_dev->rom_addr = 0xcc000;
break;
case 0x60:
ncr_dev->rom_addr = 0xc8000;
break;
case 0xc0:
ncr_dev->rom_addr = 0xdc000;
break;
case 0xe0:
ncr_dev->rom_addr = 0xd8000;
break;
}
mem_mapping_set_addr(&ncr_dev->bios_rom.mapping, ncr_dev->rom_addr, 0x4000);
mem_mapping_set_addr(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000);
}
}
static uint8_t
rt1000b_mc_feedb(void *priv)
{
ncr5380_t *ncr_dev = (ncr5380_t *)priv;
return ncr_dev->pos_regs[2] & 1;
}
static void * static void *
ncr_init(const device_t *info) ncr_init(const device_t *info)
{ {
@@ -1462,10 +1521,14 @@ ncr_init(const device_t *info)
ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev);
break; break;
case 1: /* Rancho RT1000B */ case 1: /* Rancho RT1000B/MC */
ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); ncr_dev->rom_addr = device_get_config_hex20("bios_addr");
ncr_dev->irq = device_get_config_int("irq"); ncr_dev->irq = device_get_config_int("irq");
ncr_dev->bios_ver = device_get_config_int("bios_ver"); ncr_dev->bios_ver = device_get_config_int("bios_ver");
if (info->flags & DEVICE_MCA) {
ncr_dev->rom_addr = 0xd8000;
ncr_dev->bios_ver = 1;
}
if (ncr_dev->bios_ver == 1) if (ncr_dev->bios_ver == 1)
fn = RT1000B_820R_ROM; fn = RT1000B_820R_ROM;
@@ -1475,10 +1538,20 @@ ncr_init(const device_t *info)
rom_init(&ncr_dev->bios_rom, fn, rom_init(&ncr_dev->bios_rom, fn,
ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, if (info->flags & DEVICE_MCA) {
memio_read, NULL, NULL, mem_mapping_add(&ncr_dev->mapping, 0, 0,
memio_write, NULL, NULL, memio_read, NULL, NULL,
ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); memio_write, NULL, NULL,
ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev);
ncr_dev->pos_regs[0] = 0x8d;
ncr_dev->pos_regs[1] = 0x70;
mca_add(rt1000b_mc_read, rt1000b_mc_write, rt1000b_mc_feedb, NULL, ncr_dev);
} else {
mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000,
memio_read, NULL, NULL,
memio_write, NULL, NULL,
ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev);
}
break; break;
case 2: /* Trantor T130B */ case 2: /* Trantor T130B */
@@ -1580,6 +1653,12 @@ rt1000b_available(void)
return(rom_present(RT1000B_820R_ROM) && rom_present(RT1000B_810R_ROM)); return(rom_present(RT1000B_820R_ROM) && rom_present(RT1000B_810R_ROM));
} }
static int
rt1000b_820_available(void)
{
return(rom_present(RT1000B_820R_ROM));
}
static int static int
t130b_available(void) t130b_available(void)
{ {
@@ -1611,6 +1690,8 @@ static const device_config_t ncr5380_mmio_config[] = {
.selection = { .selection = {
{ .description = "C800H", .value = 0xc8000 }, { .description = "C800H", .value = 0xc8000 },
{ .description = "CC00H", .value = 0xcc000 }, { .description = "CC00H", .value = 0xcc000 },
{ .description = "D000H", .value = 0xd0000 },
{ .description = "D400H", .value = 0xd4000 },
{ .description = "D800H", .value = 0xd8000 }, { .description = "D800H", .value = 0xd8000 },
{ .description = "DC00H", .value = 0xdc000 }, { .description = "DC00H", .value = 0xdc000 },
{ .description = "" } { .description = "" }
@@ -1646,6 +1727,8 @@ static const device_config_t rancho_config[] = {
.selection = { .selection = {
{ .description = "C800H", .value = 0xc8000 }, { .description = "C800H", .value = 0xc8000 },
{ .description = "CC00H", .value = 0xcc000 }, { .description = "CC00H", .value = 0xcc000 },
{ .description = "D000H", .value = 0xd0000 },
{ .description = "D400H", .value = 0xd4000 },
{ .description = "D800H", .value = 0xd8000 }, { .description = "D800H", .value = 0xd8000 },
{ .description = "DC00H", .value = 0xdc000 }, { .description = "DC00H", .value = 0xdc000 },
{ .description = "" } { .description = "" }
@@ -1683,6 +1766,25 @@ static const device_config_t rancho_config[] = {
{ .name = "", .description = "", .type = CONFIG_END } { .name = "", .description = "", .type = CONFIG_END }
}; };
static const device_config_t rancho_mc_config[] = {
{
.name = "irq",
.description = "IRQ",
.type = CONFIG_SELECTION,
.default_string = "",
.default_int = 5,
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "IRQ 3", .value = 3 },
{ .description = "IRQ 5", .value = 5 },
{ .description = "IRQ 7", .value = 7 },
{ .description = "" }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_config_t t130b_config[] = { static const device_config_t t130b_config[] = {
{ {
.name = "bios_addr", .name = "bios_addr",
@@ -1747,6 +1849,8 @@ static const device_config_t t128_config[] = {
.selection = { .selection = {
{ .description = "C800H", .value = 0xc8000 }, { .description = "C800H", .value = 0xc8000 },
{ .description = "CC00H", .value = 0xcc000 }, { .description = "CC00H", .value = 0xcc000 },
{ .description = "D000H", .value = 0xd0000 },
{ .description = "D400H", .value = 0xd4000 },
{ .description = "D800H", .value = 0xd8000 }, { .description = "D800H", .value = 0xd8000 },
{ .description = "DC00H", .value = 0xdc000 }, { .description = "DC00H", .value = 0xdc000 },
{ .description = "" } { .description = "" }
@@ -1806,6 +1910,20 @@ const device_t scsi_rt1000b_device = {
.config = rancho_config .config = rancho_config
}; };
const device_t scsi_rt1000mc_device = {
.name = "Rancho RT1000B-MC",
.internal_name = "rt1000mc",
.flags = DEVICE_MCA,
.local = 1,
.init = ncr_init,
.close = ncr_close,
.reset = NULL,
{ .available = rt1000b_820_available },
.speed_changed = NULL,
.force_redraw = NULL,
.config = rancho_mc_config
};
const device_t scsi_t130b_device = { const device_t scsi_t130b_device = {
.name = "Trantor T130B", .name = "Trantor T130B",
.internal_name = "t130b", .internal_name = "t130b",

277
src/video/vid_8514a.c
View File

@@ -2555,18 +2555,12 @@ rect_fill:
if (!cpu_input) { if (!cpu_input) {
dev->accel.cx = dev->accel.cur_x; dev->accel.cx = dev->accel.cur_x;
dev->accel.cy = dev->accel.cur_y; dev->accel.cy = dev->accel.cur_y;
dev->accel.oldcy = dev->accel.cy;
dev->accel.sy = dev->accel.maj_axis_pcnt; dev->accel.xdir = (dev->accel.cmd & 0x20) ? 1 : -1;
dev->accel.ydir = (dev->accel.cmd & 0x80) ? 1 : -1;
if (dev->accel.cx < dev->accel.clip_left) dev->accel.sy = 0;
dev->accel.cx = dev->accel.clip_left;
else if (dev->accel.cx > clip_r)
dev->accel.cx = dev->accel.clip_left;
dev->accel.sx = dev->accel.sy;
dev->accel.dx = dev->accel.destx_distp;
dev->accel.dy = dev->accel.desty_axstp;
dev->accel.err = dev->accel.err_term;
if (ibm8514_cpu_src(dev)) { if (ibm8514_cpu_src(dev)) {
dev->data_available = 0; dev->data_available = 0;
@@ -2579,237 +2573,70 @@ rect_fill:
} }
} }
if (dev->accel.cmd & 8) { /*Vector Line*/ while (count-- && (dev->accel.sy >= 0)) {
while (count-- && (dev->accel.sy >= 0)) { if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx <= clip_r) &&
if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) {
dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { case 0: src_dat = bkgd_color; break;
mix_dat = mix_mask; /* Mix data = forced to foreground register. */ case 1: src_dat = frgd_color; break;
} else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { case 2: src_dat = cpu_dat & 0xff; break;
/* Mix data = current video memory value. */ case 3: src_dat = 0; break;
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, mix_dat); }
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
if (ibm8514_cpu_dest(dev)) { READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat);
if (pixcntl == 3)
src_dat = ((src_dat & rd_mask) == rd_mask);
} else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0: src_dat = bkgd_color; break;
case 1: src_dat = frgd_color; break;
case 2: src_dat = cpu_dat & 0xff; break;
case 3: src_dat = 0; break;
}
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
if ((compare_mode == 0) || ((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) {
((compare_mode == 0x30) && (dest_dat <= compare)) || old_dest_dat = dest_dat;
((compare_mode == 0x38) && (dest_dat > compare))) { MIX(mix_dat & mix_mask, dest_dat, src_dat);
old_dest_dat = dest_dat; dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
MIX(mix_dat & mix_mask, dest_dat, src_dat); if ((dev->accel.cmd & 4) && (dev->accel.sy < dev->accel.maj_axis_pcnt)) {
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); if (!dev->accel.sy) {
if ((dev->accel.cmd & 4) && dev->accel.sy) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 4)) { } else if ((dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.cy == dev->accel.oldcy + 1)) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.err_term >= 0) && (dev->accel.cy == (dev->accel.oldcy + 1))) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
} }
} }
} }
mix_dat <<= 1;
mix_dat |= 1;
cpu_dat >>= 8;
if (dev->accel.sy == 0) {
break;
}
switch (dev->accel.cmd & 0xe0) {
case 0x00: dev->accel.cx++; break;
case 0x20: dev->accel.cx++; dev->accel.cy--; break;
case 0x40: dev->accel.cy--; break;
case 0x60: dev->accel.cx--; dev->accel.cy--; break;
case 0x80: dev->accel.cx--; break;
case 0xa0: dev->accel.cx--; dev->accel.cy++; break;
case 0xc0: dev->accel.cy++; break;
case 0xe0: dev->accel.cx++; dev->accel.cy++; break;
}
dev->accel.sy--;
} }
} else { /*Bresenham*/
if (pixcntl == 1) {
dev->accel.temp_cnt = 8;
while (count-- && (dev->accel.sy >= 0)) {
if (dev->accel.temp_cnt == 0) {
dev->accel.temp_cnt = 8;
mix_dat = old_mix_dat;
}
if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r &&
dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) {
if (ibm8514_cpu_dest(dev)) {
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat);
} else switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) {
case 0: src_dat = bkgd_color; break;
case 1: src_dat = frgd_color; break;
case 2: src_dat = cpu_dat & 0xff; break;
case 3: src_dat = 0; break;
}
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); mix_dat <<= 1;
mix_dat |= 1;
cpu_dat >>= 8;
if ((compare_mode == 0) || if (dev->accel.sy == dev->accel.maj_axis_pcnt) {
((compare_mode == 0x10) && (dest_dat >= compare)) || return;
((compare_mode == 0x18) && (dest_dat < compare)) || }
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
old_dest_dat = dest_dat;
MIX(mix_dat & 1, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if ((dev->accel.cmd & 4) && dev->accel.sy) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 4)) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
}
}
}
dev->accel.temp_cnt--;
mix_dat >>= 1;
cpu_dat >>= 8;
if (dev->accel.sy == 0) { if (dev->accel.cmd & 0x40) {
break; dev->accel.oldcy = dev->accel.cy;
} dev->accel.cy += dev->accel.ydir;
if (dev->accel.err_term >= 0) {
if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { dev->accel.err_term += dev->accel.destx_distp;
dev->accel.err_term += dev->accel.destx_distp; dev->accel.cx += dev->accel.xdir;
/*Step minor axis*/ } else {
switch (dev->accel.cmd & 0xe0) { dev->accel.err_term += dev->accel.desty_axstp;
case 0x00: dev->accel.cy--; break;
case 0x20: dev->accel.cy--; break;
case 0x40: dev->accel.cx--; break;
case 0x60: dev->accel.cx++; break;
case 0x80: dev->accel.cy++; break;
case 0xa0: dev->accel.cy++; break;
case 0xc0: dev->accel.cx--; break;
case 0xe0: dev->accel.cx++; break;
}
} else
dev->accel.err_term += dev->accel.desty_axstp;
/*Step major axis*/
switch (dev->accel.cmd & 0xe0) {
case 0x00: dev->accel.cx--; break;
case 0x20: dev->accel.cx++; break;
case 0x40: dev->accel.cy--; break;
case 0x60: dev->accel.cy--; break;
case 0x80: dev->accel.cx--; break;
case 0xa0: dev->accel.cx++; break;
case 0xc0: dev->accel.cy++; break;
case 0xe0: dev->accel.cy++; break;
}
dev->accel.sy--;
} }
} else { } else {
while (count-- && (dev->accel.sy >= 0)) { dev->accel.cx += dev->accel.xdir;
if (dev->accel.cx < dev->accel.clip_left) if (dev->accel.err_term >= 0) {
dev->accel.cx = dev->accel.clip_left; dev->accel.err_term += dev->accel.destx_distp;
else if (dev->accel.cx > clip_r) dev->accel.oldcy = dev->accel.cy;
dev->accel.cx = dev->accel.clip_left; dev->accel.cy += dev->accel.ydir;
} else {
if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx) <= clip_r && dev->accel.err_term += dev->accel.desty_axstp;
(dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) {
if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) {
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
} else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) {
/* Mix data = current video memory value. */
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
if (ibm8514_cpu_dest(dev)) {
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat);
if (pixcntl == 3)
src_dat = ((src_dat & rd_mask) == rd_mask);
} else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0: src_dat = bkgd_color; break;
case 1: src_dat = frgd_color; break;
case 2: src_dat = cpu_dat & 0xff; break;
case 3: src_dat = 0; break;
}
READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if ((dev->accel.cmd & 4) && dev->accel.sy) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 4)) {
WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat);
}
}
}
mix_dat <<= 1;
mix_dat |= 1;
cpu_dat >>= 8;
if (dev->accel.sy == 0) {
break;
}
if (dev->accel.err >= dev->accel.sx) {
dev->accel.err += dev->accel.dx;
/*Step minor axis*/
switch (dev->accel.cmd & 0xe0) {
case 0x00: dev->accel.cy--; break;
case 0x20: dev->accel.cy--; break;
case 0x40: dev->accel.cx--; break;
case 0x60: dev->accel.cx++; break;
case 0x80: dev->accel.cy++; break;
case 0xa0: dev->accel.cy++; break;
case 0xc0: dev->accel.cx--; break;
case 0xe0: dev->accel.cx++; break;
}
} else
dev->accel.err += dev->accel.dy;
/*Step major axis*/
switch (dev->accel.cmd & 0xe0) {
case 0x00: dev->accel.cx--; break;
case 0x20: dev->accel.cx++; break;
case 0x40: dev->accel.cy--; break;
case 0x60: dev->accel.cy--; break;
case 0x80: dev->accel.cx--; break;
case 0xa0: dev->accel.cx++; break;
case 0xc0: dev->accel.cy++; break;
case 0xe0: dev->accel.cy++; break;
}
dev->accel.sy--;
} }
} }
dev->accel.sy++;
} }
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
break; break;
case 6: /*BitBlt*/ case 6: /*BitBlt*/

4
src/video/vid_xga.c
View File

@@ -2704,7 +2704,7 @@ static void
xga->on = 0; xga->on = 0;
xga->hwcursor.xsize = 64; xga->hwcursor.xsize = 64;
xga->hwcursor.ysize = 64; xga->hwcursor.ysize = 64;
xga->bios_rom.sz = 0x2000; xga->bios_rom.sz = 0x8000;
f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb");
(void)fseek(f, 0L, SEEK_END); (void)fseek(f, 0L, SEEK_END);
@@ -2729,7 +2729,7 @@ static void
xga->instance = 0; xga->instance = 0;
xga->rom_addr = 0; xga->rom_addr = 0;
mem_mapping_add(&xga->bios_rom.mapping, mem_mapping_add(&xga->bios_rom.mapping,
0xdc000, xga->bios_rom.sz, 0xd8000, xga->bios_rom.sz,
rom_read, rom_readw, rom_readl, rom_read, rom_readw, rom_readl,
NULL, NULL, NULL, NULL, NULL, NULL,
xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom); xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom);