TSC update cycle fixes.

src/codegen/codegen_accumulate_x86-64.c

@@ -26,7 +26,7 @@ void codegen_accumulate(int acc_reg, int delta)
 		addbyte(0x04);
 		addbyte(0x25);
 		addlong((uint32_t) (uintptr_t) &(acycs));
-		addlong(delta);
+		addlong(-delta);
 	}
 }
 

src/codegen/codegen_accumulate_x86.c

@@ -25,7 +25,7 @@ void codegen_accumulate(int acc_reg, int delta)
 		addbyte(0x81); /*ADD $acc_regs[c].count,acc_regs[c].dest*/
 		addbyte(0x05);
 		addlong((uint32_t) (uintptr_t) &(acycs));
-		addlong((uintptr_t) delta);
+		addlong((uintptr_t) -delta);
 	}
 }
 

src/codegen_new/codegen_accumulate.c

@@ -22,7 +22,7 @@ void codegen_accumulate(ir_data_t *ir, int acc_reg, int delta)
         acc_regs[acc_reg].count += delta;
 
 	if (delta != 0) {
-		uop_ADD_IMM(ir, IREG_acycs, IREG_acycs, delta);
+		uop_ADD_IMM(ir, IREG_acycs, IREG_acycs, -delta);
 	}
 }
 

src/cpu/386_dynarec.c

@@ -296,6 +296,7 @@ void update_tsc(void)
 		tsc += cycdiff;
     } else {
 	/* TSC has not changed. */
+	if (cycdiff > 0)
 		tsc += cycdiff;
     }