clang-format in src/network/
This commit is contained in:
Jasmine Iwanek
@@ -63,131 +63,124 @@
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#include <86box/bswap.h>
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typedef struct {
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dp8390_t *dp8390;
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mem_mapping_t ram_mapping;
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uint32_t base_address;
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int base_irq;
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uint32_t bios_addr;
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uint8_t maclocal[6]; /* configured MAC (local) address */
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dp8390_t *dp8390;
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mem_mapping_t ram_mapping;
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uint32_t base_address;
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int base_irq;
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uint32_t bios_addr;
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uint8_t maclocal[6]; /* configured MAC (local) address */
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struct {
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uint8_t pstr;
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uint8_t pspr;
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uint8_t dqtr;
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uint8_t bcfr;
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uint8_t pcfr;
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uint8_t gacfr;
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uint8_t ctrl;
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uint8_t streg;
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uint8_t idcfr;
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uint16_t da;
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uint32_t vptr;
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uint8_t rfmsb;
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uint8_t rflsb;
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uint8_t pstr;
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uint8_t pspr;
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uint8_t dqtr;
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uint8_t bcfr;
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uint8_t pcfr;
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uint8_t gacfr;
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uint8_t ctrl;
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uint8_t streg;
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uint8_t idcfr;
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uint16_t da;
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uint32_t vptr;
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uint8_t rfmsb;
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uint8_t rflsb;
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} regs;
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int dma_channel;
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} threec503_t;
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#ifdef ENABLE_3COM503_LOG
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int threec503_do_log = ENABLE_3COM503_LOG;
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static void
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threec503_log(const char *fmt, ...)
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{
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va_list ap;
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if (threec503_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define threec503_log(fmt, ...)
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# define threec503_log(fmt, ...)
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#endif
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static void
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threec503_interrupt(void *priv, int set)
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{
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threec503_t *dev = (threec503_t *) priv;
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switch (dev->base_irq) {
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case 2:
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dev->regs.idcfr = 0x10;
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break;
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case 2:
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dev->regs.idcfr = 0x10;
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break;
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case 3:
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dev->regs.idcfr = 0x20;
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break;
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case 3:
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dev->regs.idcfr = 0x20;
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break;
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case 4:
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dev->regs.idcfr = 0x40;
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break;
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case 4:
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dev->regs.idcfr = 0x40;
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break;
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case 5:
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dev->regs.idcfr = 0x80;
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break;
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case 5:
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dev->regs.idcfr = 0x80;
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break;
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}
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if (set)
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picint(1 << dev->base_irq);
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picint(1 << dev->base_irq);
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else
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picintc(1 << dev->base_irq);
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picintc(1 << dev->base_irq);
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}
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static void
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threec503_ram_write(uint32_t addr, uint8_t val, void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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threec503_t *dev = (threec503_t *) priv;
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if ((addr & 0x3fff) >= 0x2000)
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return;
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return;
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dev->dp8390->mem[addr & 0x1fff] = val;
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}
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static uint8_t
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threec503_ram_read(uint32_t addr, void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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threec503_t *dev = (threec503_t *) priv;
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if ((addr & 0x3fff) >= 0x2000)
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return 0xff;
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return 0xff;
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return dev->dp8390->mem[addr & 0x1fff];
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}
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static void
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threec503_set_drq(threec503_t *dev)
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{
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switch (dev->dma_channel) {
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case 1:
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dev->regs.idcfr = 1;
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break;
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case 1:
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dev->regs.idcfr = 1;
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break;
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case 2:
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dev->regs.idcfr = 2;
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break;
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case 2:
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dev->regs.idcfr = 2;
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break;
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case 3:
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dev->regs.idcfr = 4;
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break;
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case 3:
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dev->regs.idcfr = 4;
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break;
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}
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}
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/* reset - restore state to power-up, cancelling all i/o */
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static void
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threec503_reset(void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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threec503_t *dev = (threec503_t *) priv;
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#ifdef ENABLE_3COM503_LOG
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threec503_log("3Com503: reset\n");
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@@ -200,374 +193,370 @@ threec503_reset(void *priv)
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dev->regs.ctrl = 0x0a;
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}
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static uint8_t
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threec503_nic_lo_read(uint16_t addr, void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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uint8_t retval = 0;
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int off = addr - dev->base_address;
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threec503_t *dev = (threec503_t *) priv;
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uint8_t retval = 0;
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int off = addr - dev->base_address;
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switch ((dev->regs.ctrl >> 2) & 3) {
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case 0x00:
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threec503_log("Read offset=%04x\n", off);
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if (off == 0x00)
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retval = dp8390_read_cr(dev->dp8390);
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else switch(dev->dp8390->CR.pgsel) {
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case 0x00:
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retval = dp8390_page0_read(dev->dp8390, off, 1);
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break;
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case 0x00:
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threec503_log("Read offset=%04x\n", off);
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if (off == 0x00)
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retval = dp8390_read_cr(dev->dp8390);
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else
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switch (dev->dp8390->CR.pgsel) {
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case 0x00:
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retval = dp8390_page0_read(dev->dp8390, off, 1);
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break;
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case 0x01:
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retval = dp8390_page1_read(dev->dp8390, off, 1);
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break;
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case 0x01:
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retval = dp8390_page1_read(dev->dp8390, off, 1);
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break;
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case 0x02:
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retval = dp8390_page2_read(dev->dp8390, off, 1);
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break;
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case 0x02:
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retval = dp8390_page2_read(dev->dp8390, off, 1);
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break;
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case 0x03:
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retval = 0xff;
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break;
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}
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break;
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case 0x03:
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retval = 0xff;
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break;
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}
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break;
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case 0x01:
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retval = dev->dp8390->macaddr[off];
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break;
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case 0x01:
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retval = dev->dp8390->macaddr[off];
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break;
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case 0x02:
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retval = dev->dp8390->macaddr[off + 0x10];
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break;
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case 0x02:
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retval = dev->dp8390->macaddr[off + 0x10];
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break;
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case 0x03:
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retval = 0xff;
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break;
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case 0x03:
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retval = 0xff;
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break;
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}
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return(retval);
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return (retval);
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}
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static void
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threec503_nic_lo_write(uint16_t addr, uint8_t val, void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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int off = addr - dev->base_address;
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threec503_t *dev = (threec503_t *) priv;
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int off = addr - dev->base_address;
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switch ((dev->regs.ctrl >> 2) & 3) {
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case 0x00:
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/* The high 16 bytes of i/o space are for the ne2000 asic -
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the low 16 bytes are for the DS8390, with the current
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page being selected by the PS0,PS1 registers in the
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command register */
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if (off == 0x00)
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dp8390_write_cr(dev->dp8390, val);
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else switch(dev->dp8390->CR.pgsel) {
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case 0x00:
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dp8390_page0_write(dev->dp8390, off, val, 1);
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break;
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case 0x00:
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/* The high 16 bytes of i/o space are for the ne2000 asic -
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the low 16 bytes are for the DS8390, with the current
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page being selected by the PS0,PS1 registers in the
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command register */
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if (off == 0x00)
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dp8390_write_cr(dev->dp8390, val);
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else
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switch (dev->dp8390->CR.pgsel) {
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case 0x00:
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dp8390_page0_write(dev->dp8390, off, val, 1);
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break;
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case 0x01:
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dp8390_page1_write(dev->dp8390, off, val, 1);
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break;
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case 0x01:
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dp8390_page1_write(dev->dp8390, off, val, 1);
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break;
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case 0x02:
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dp8390_page2_write(dev->dp8390, off, val, 1);
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break;
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case 0x02:
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dp8390_page2_write(dev->dp8390, off, val, 1);
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break;
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case 0x03:
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break;
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}
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break;
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case 0x03:
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break;
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}
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break;
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case 0x01:
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case 0x02:
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case 0x03:
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break;
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case 0x01:
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case 0x02:
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case 0x03:
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break;
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}
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threec503_log("3Com503: write addr %x, value %x\n", addr, val);
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}
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static uint8_t
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threec503_nic_hi_read(uint16_t addr, void *priv)
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{
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threec503_t *dev = (threec503_t *)priv;
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threec503_t *dev = (threec503_t *) priv;
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threec503_log("3Com503: Read GA address=%04x\n", addr);
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switch (addr & 0x0f) {
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case 0x00:
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return dev->regs.pstr;
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case 0x00:
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return dev->regs.pstr;
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case 0x01:
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return dev->regs.pspr;
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case 0x01:
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return dev->regs.pspr;
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case 0x02:
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return dev->regs.dqtr;
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case 0x02:
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return dev->regs.dqtr;
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case 0x03:
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switch (dev->base_address) {
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default:
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case 0x300:
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dev->regs.bcfr = 0x80;
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break;
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case 0x03:
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switch (dev->base_address) {
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default:
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case 0x300:
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dev->regs.bcfr = 0x80;
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break;
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case 0x310:
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dev->regs.bcfr = 0x40;
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break;
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case 0x310:
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dev->regs.bcfr = 0x40;
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break;
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case 0x330:
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dev->regs.bcfr = 0x20;
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break;
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case 0x330:
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dev->regs.bcfr = 0x20;
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break;
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case 0x350:
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dev->regs.bcfr = 0x10;
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break;
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case 0x350:
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dev->regs.bcfr = 0x10;
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break;
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case 0x250:
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dev->regs.bcfr = 0x08;
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break;
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case 0x250:
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dev->regs.bcfr = 0x08;
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break;
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case 0x280:
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dev->regs.bcfr = 0x04;
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break;
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case 0x280:
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dev->regs.bcfr = 0x04;
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break;
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case 0x2a0:
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dev->regs.bcfr = 0x02;
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break;
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case 0x2a0:
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dev->regs.bcfr = 0x02;
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break;
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case 0x2e0:
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dev->regs.bcfr = 0x01;
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break;
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}
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case 0x2e0:
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dev->regs.bcfr = 0x01;
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break;
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}
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return dev->regs.bcfr;
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break;
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return dev->regs.bcfr;
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break;
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case 0x04:
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switch (dev->bios_addr) {
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case 0xdc000:
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dev->regs.pcfr = 0x80;
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break;
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case 0x04:
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switch (dev->bios_addr) {
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case 0xdc000:
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dev->regs.pcfr = 0x80;
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break;
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case 0xd8000:
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dev->regs.pcfr = 0x40;
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break;
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case 0xd8000:
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dev->regs.pcfr = 0x40;
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break;
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case 0xcc000:
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dev->regs.pcfr = 0x20;
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break;
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case 0xcc000:
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dev->regs.pcfr = 0x20;
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break;
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case 0xc8000:
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dev->regs.pcfr = 0x10;
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break;
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}
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case 0xc8000:
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dev->regs.pcfr = 0x10;
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break;
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}
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return dev->regs.pcfr;
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break;
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return dev->regs.pcfr;
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break;
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case 0x05:
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return dev->regs.gacfr;
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case 0x05:
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return dev->regs.gacfr;
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case 0x06:
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return dev->regs.ctrl;
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case 0x06:
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return dev->regs.ctrl;
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case 0x07:
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return dev->regs.streg;
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case 0x07:
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return dev->regs.streg;
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case 0x08:
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return dev->regs.idcfr;
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case 0x08:
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return dev->regs.idcfr;
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case 0x09:
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return (dev->regs.da >> 8);
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case 0x09:
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return (dev->regs.da >> 8);
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case 0x0a:
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return (dev->regs.da & 0xff);
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case 0x0a:
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return (dev->regs.da & 0xff);
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case 0x0b:
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return (dev->regs.vptr >> 12) & 0xff;
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case 0x0b:
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return (dev->regs.vptr >> 12) & 0xff;
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case 0x0c:
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return (dev->regs.vptr >> 4) & 0xff;
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case 0x0c:
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return (dev->regs.vptr >> 4) & 0xff;
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case 0x0d:
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return (dev->regs.vptr & 0x0f) << 4;
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case 0x0d:
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return (dev->regs.vptr & 0x0f) << 4;
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||||
case 0x0e:
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||||
case 0x0f:
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if (!(dev->regs.ctrl & 0x80))
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return 0xff;
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||||
case 0x0e:
|
||||
case 0x0f:
|
||||
if (!(dev->regs.ctrl & 0x80))
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||||
return 0xff;
|
||||
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||||
threec503_set_drq(dev);
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||||
threec503_set_drq(dev);
|
||||
|
||||
return dp8390_chipmem_read(dev->dp8390, dev->regs.da++, 1);
|
||||
return dp8390_chipmem_read(dev->dp8390, dev->regs.da++, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
threec503_nic_hi_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
threec503_t *dev = (threec503_t *)priv;
|
||||
threec503_t *dev = (threec503_t *) priv;
|
||||
|
||||
threec503_log("3Com503: Write GA address=%04x, val=%04x\n", addr, val);
|
||||
|
||||
switch (addr & 0x0f) {
|
||||
case 0x00:
|
||||
dev->regs.pstr = val;
|
||||
break;
|
||||
case 0x00:
|
||||
dev->regs.pstr = val;
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
dev->regs.pspr = val;
|
||||
break;
|
||||
case 0x01:
|
||||
dev->regs.pspr = val;
|
||||
break;
|
||||
|
||||
case 0x02:
|
||||
dev->regs.dqtr = val;
|
||||
break;
|
||||
case 0x02:
|
||||
dev->regs.dqtr = val;
|
||||
break;
|
||||
|
||||
case 0x05:
|
||||
if ((dev->regs.gacfr & 0x0f) != (val & 0x0f)) {
|
||||
switch (val & 0x0f) {
|
||||
case 0: /*ROM mapping*/
|
||||
/* FIXME: Implement this when a BIOS is found/generated. */
|
||||
mem_mapping_disable(&dev->ram_mapping);
|
||||
break;
|
||||
case 0x05:
|
||||
if ((dev->regs.gacfr & 0x0f) != (val & 0x0f)) {
|
||||
switch (val & 0x0f) {
|
||||
case 0: /*ROM mapping*/
|
||||
/* FIXME: Implement this when a BIOS is found/generated. */
|
||||
mem_mapping_disable(&dev->ram_mapping);
|
||||
break;
|
||||
|
||||
case 9: /*RAM mapping*/
|
||||
mem_mapping_enable(&dev->ram_mapping);
|
||||
break;
|
||||
case 9: /*RAM mapping*/
|
||||
mem_mapping_enable(&dev->ram_mapping);
|
||||
break;
|
||||
|
||||
default: /*No ROM mapping*/
|
||||
mem_mapping_disable(&dev->ram_mapping);
|
||||
break;
|
||||
}
|
||||
}
|
||||
default: /*No ROM mapping*/
|
||||
mem_mapping_disable(&dev->ram_mapping);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!(val & 0x80))
|
||||
threec503_interrupt(dev, 1);
|
||||
else
|
||||
threec503_interrupt(dev, 0);
|
||||
if (!(val & 0x80))
|
||||
threec503_interrupt(dev, 1);
|
||||
else
|
||||
threec503_interrupt(dev, 0);
|
||||
|
||||
dev->regs.gacfr = val;
|
||||
break;
|
||||
dev->regs.gacfr = val;
|
||||
break;
|
||||
|
||||
case 0x06:
|
||||
if (val & 1) {
|
||||
threec503_reset(dev);
|
||||
dev->dp8390->ISR.reset = 1;
|
||||
dev->regs.ctrl = 0x0b;
|
||||
return;
|
||||
}
|
||||
case 0x06:
|
||||
if (val & 1) {
|
||||
threec503_reset(dev);
|
||||
dev->dp8390->ISR.reset = 1;
|
||||
dev->regs.ctrl = 0x0b;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((val & 0x80) != (dev->regs.ctrl & 0x80)) {
|
||||
if (val & 0x80)
|
||||
dev->regs.streg |= 0x88;
|
||||
else
|
||||
dev->regs.streg &= ~0x88;
|
||||
dev->regs.streg &= ~0x10;
|
||||
}
|
||||
dev->regs.ctrl = val;
|
||||
break;
|
||||
if ((val & 0x80) != (dev->regs.ctrl & 0x80)) {
|
||||
if (val & 0x80)
|
||||
dev->regs.streg |= 0x88;
|
||||
else
|
||||
dev->regs.streg &= ~0x88;
|
||||
dev->regs.streg &= ~0x10;
|
||||
}
|
||||
dev->regs.ctrl = val;
|
||||
break;
|
||||
|
||||
case 0x08:
|
||||
switch (val & 0xf0) {
|
||||
case 0x00:
|
||||
case 0x10:
|
||||
case 0x20:
|
||||
case 0x40:
|
||||
case 0x80:
|
||||
dev->regs.idcfr = (dev->regs.idcfr & 0x0f) | (val & 0xf0);
|
||||
break;
|
||||
case 0x08:
|
||||
switch (val & 0xf0) {
|
||||
case 0x00:
|
||||
case 0x10:
|
||||
case 0x20:
|
||||
case 0x40:
|
||||
case 0x80:
|
||||
dev->regs.idcfr = (dev->regs.idcfr & 0x0f) | (val & 0xf0);
|
||||
break;
|
||||
|
||||
default:
|
||||
threec503_log("Trying to set multiple IRQs: %02x\n", val);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
threec503_log("Trying to set multiple IRQs: %02x\n", val);
|
||||
break;
|
||||
}
|
||||
|
||||
switch (val & 0x0f) {
|
||||
case 0x00:
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x04:
|
||||
dev->regs.idcfr = (dev->regs.idcfr & 0xf0) | (val & 0x0f);
|
||||
break;
|
||||
switch (val & 0x0f) {
|
||||
case 0x00:
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x04:
|
||||
dev->regs.idcfr = (dev->regs.idcfr & 0xf0) | (val & 0x0f);
|
||||
break;
|
||||
|
||||
case 0x08:
|
||||
break;
|
||||
case 0x08:
|
||||
break;
|
||||
|
||||
default:
|
||||
threec503_log("Trying to set multiple DMA channels: %02x\n", val);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
threec503_log("Trying to set multiple DMA channels: %02x\n", val);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x09:
|
||||
dev->regs.da = (val << 8) | (dev->regs.da & 0xff);
|
||||
break;
|
||||
case 0x09:
|
||||
dev->regs.da = (val << 8) | (dev->regs.da & 0xff);
|
||||
break;
|
||||
|
||||
case 0x0a:
|
||||
dev->regs.da = (dev->regs.da & 0xff00) | val;
|
||||
break;
|
||||
case 0x0a:
|
||||
dev->regs.da = (dev->regs.da & 0xff00) | val;
|
||||
break;
|
||||
|
||||
case 0x0b:
|
||||
dev->regs.vptr = (val << 12) | (dev->regs.vptr & 0xfff);
|
||||
break;
|
||||
case 0x0b:
|
||||
dev->regs.vptr = (val << 12) | (dev->regs.vptr & 0xfff);
|
||||
break;
|
||||
|
||||
case 0x0c:
|
||||
dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xff00f);
|
||||
break;
|
||||
case 0x0c:
|
||||
dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xff00f);
|
||||
break;
|
||||
|
||||
case 0x0d:
|
||||
dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xffff0);
|
||||
break;
|
||||
case 0x0d:
|
||||
dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xffff0);
|
||||
break;
|
||||
|
||||
case 0x0e:
|
||||
case 0x0f:
|
||||
if (!(dev->regs.ctrl & 0x80))
|
||||
return;
|
||||
case 0x0e:
|
||||
case 0x0f:
|
||||
if (!(dev->regs.ctrl & 0x80))
|
||||
return;
|
||||
|
||||
threec503_set_drq(dev);
|
||||
threec503_set_drq(dev);
|
||||
|
||||
dp8390_chipmem_write(dev->dp8390, dev->regs.da++, val, 1);
|
||||
break;
|
||||
dp8390_chipmem_write(dev->dp8390, dev->regs.da++, val, 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
threec503_nic_ioset(threec503_t *dev, uint16_t addr)
|
||||
{
|
||||
io_sethandler(addr, 0x10,
|
||||
threec503_nic_lo_read, NULL, NULL,
|
||||
threec503_nic_lo_write, NULL, NULL, dev);
|
||||
threec503_nic_lo_read, NULL, NULL,
|
||||
threec503_nic_lo_write, NULL, NULL, dev);
|
||||
|
||||
io_sethandler(addr+0x400, 0x10,
|
||||
threec503_nic_hi_read, NULL, NULL,
|
||||
threec503_nic_hi_write, NULL, NULL, dev);
|
||||
io_sethandler(addr + 0x400, 0x10,
|
||||
threec503_nic_hi_read, NULL, NULL,
|
||||
threec503_nic_hi_write, NULL, NULL, dev);
|
||||
}
|
||||
|
||||
|
||||
static void *
|
||||
threec503_nic_init(const device_t *info)
|
||||
{
|
||||
uint32_t mac;
|
||||
uint32_t mac;
|
||||
threec503_t *dev;
|
||||
|
||||
dev = malloc(sizeof(threec503_t));
|
||||
memset(dev, 0x00, sizeof(threec503_t));
|
||||
dev->maclocal[0] = 0x02; /* 02:60:8C (3Com OID) */
|
||||
dev->maclocal[0] = 0x02; /* 02:60:8C (3Com OID) */
|
||||
dev->maclocal[1] = 0x60;
|
||||
dev->maclocal[2] = 0x8C;
|
||||
|
||||
dev->base_address = device_get_config_hex16("base");
|
||||
dev->base_irq = device_get_config_int("irq");
|
||||
dev->dma_channel = device_get_config_int("dma");
|
||||
dev->bios_addr = device_get_config_hex20("bios_addr");
|
||||
dev->base_irq = device_get_config_int("irq");
|
||||
dev->dma_channel = device_get_config_int("dma");
|
||||
dev->bios_addr = device_get_config_hex20("bios_addr");
|
||||
|
||||
/* See if we have a local MAC address configured. */
|
||||
mac = device_get_config_mac("mac", -1);
|
||||
@@ -580,22 +569,22 @@ threec503_nic_init(const device_t *info)
|
||||
|
||||
/* Set up our BIA. */
|
||||
if (mac & 0xff000000) {
|
||||
/* Generate new local MAC. */
|
||||
dev->maclocal[3] = random_generate();
|
||||
dev->maclocal[4] = random_generate();
|
||||
dev->maclocal[5] = random_generate();
|
||||
mac = (((int) dev->maclocal[3]) << 16);
|
||||
mac |= (((int) dev->maclocal[4]) << 8);
|
||||
mac |= ((int) dev->maclocal[5]);
|
||||
device_set_config_mac("mac", mac);
|
||||
/* Generate new local MAC. */
|
||||
dev->maclocal[3] = random_generate();
|
||||
dev->maclocal[4] = random_generate();
|
||||
dev->maclocal[5] = random_generate();
|
||||
mac = (((int) dev->maclocal[3]) << 16);
|
||||
mac |= (((int) dev->maclocal[4]) << 8);
|
||||
mac |= ((int) dev->maclocal[5]);
|
||||
device_set_config_mac("mac", mac);
|
||||
} else {
|
||||
dev->maclocal[3] = (mac>>16) & 0xff;
|
||||
dev->maclocal[4] = (mac>>8) & 0xff;
|
||||
dev->maclocal[5] = (mac & 0xff);
|
||||
dev->maclocal[3] = (mac >> 16) & 0xff;
|
||||
dev->maclocal[4] = (mac >> 8) & 0xff;
|
||||
dev->maclocal[5] = (mac & 0xff);
|
||||
}
|
||||
|
||||
dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++);
|
||||
dev->dp8390->priv = dev;
|
||||
dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++);
|
||||
dev->dp8390->priv = dev;
|
||||
dev->dp8390->interrupt = threec503_interrupt;
|
||||
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ);
|
||||
dp8390_mem_alloc(dev->dp8390, 0x2000, 0x2000);
|
||||
@@ -603,32 +592,31 @@ threec503_nic_init(const device_t *info)
|
||||
memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal));
|
||||
|
||||
threec503_log("I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
|
||||
dev->base_address, dev->base_irq,
|
||||
dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2],
|
||||
dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]);
|
||||
dev->base_address, dev->base_irq,
|
||||
dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2],
|
||||
dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]);
|
||||
|
||||
/* Reset the board. */
|
||||
threec503_reset(dev);
|
||||
|
||||
/* Map this system into the memory map. */
|
||||
mem_mapping_add(&dev->ram_mapping, dev->bios_addr, 0x4000,
|
||||
threec503_ram_read, NULL, NULL,
|
||||
threec503_ram_write, NULL, NULL,
|
||||
NULL, MEM_MAPPING_EXTERNAL, dev);
|
||||
threec503_ram_read, NULL, NULL,
|
||||
threec503_ram_write, NULL, NULL,
|
||||
NULL, MEM_MAPPING_EXTERNAL, dev);
|
||||
// mem_mapping_disable(&dev->ram_mapping);
|
||||
dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */
|
||||
dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */
|
||||
|
||||
/* Attach ourselves to the network module. */
|
||||
dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL);
|
||||
|
||||
return(dev);
|
||||
return (dev);
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
threec503_nic_close(void *priv)
|
||||
{
|
||||
threec503_t *dev = (threec503_t *)priv;
|
||||
threec503_t *dev = (threec503_t *) priv;
|
||||
|
||||
#ifdef ENABLE_3COM503_LOG
|
||||
threec503_log("3Com503: closed\n");
|
||||
@@ -638,7 +626,7 @@ threec503_nic_close(void *priv)
|
||||
}
|
||||
|
||||
static const device_config_t threec503_config[] = {
|
||||
// clang-format off
|
||||
// clang-format off
|
||||
{
|
||||
.name = "base",
|
||||
.description = "Address",
|
||||
|
||||
Reference in New Issue
Block a user