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Machine code restructure, models are now machines instead and the init functions are in the machine files rather than in machine.c (former model.c), also moved the machine stuff into the machine/ subdirectory.

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This commit is contained in:
OBattler
2017-09-02 20:39:57 +02:00
parent be16ee33ba
commit 3e10570bbd
90 changed files with 2390 additions and 2388 deletions
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293
src/Makefile.mingw
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@@ -8,7 +8,7 @@
# #
# Modified Makefile for Win32 (MinGW32) environment. # Modified Makefile for Win32 (MinGW32) environment.
# #
# Version: @(#)Makefile.mingw 1.0.41 2017/09/01 # Version: @(#)Makefile.mingw 1.0.42 2017/09/02
# #
# Authors: Miran Grca, <mgrca8@gmail.com> # Authors: Miran Grca, <mgrca8@gmail.com>
# Fred N. van Kempen, <decwiz@yahoo.com> # Fred N. van Kempen, <decwiz@yahoo.com>
@@ -84,7 +84,7 @@ endif
# Nothing should need changing from here on.. # # Nothing should need changing from here on.. #
######################################################################### #########################################################################
VPATH = . cpu \ VPATH = . cpu \
hdd \ hdd machine \
sound \ sound \
sound/munt sound/munt/c_interface sound/munt/sha1 \ sound/munt sound/munt/c_interface sound/munt/sha1 \
sound/munt/srchelper \ sound/munt/srchelper \
@@ -200,20 +200,27 @@ CPUOBJ = cpu.o 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o \
codegen_timing_686.o codegen_timing_pentium.o \ codegen_timing_686.o codegen_timing_pentium.o \
codegen_timing_winchip.o $(PLATCG) \ codegen_timing_winchip.o $(PLATCG) \
x86seg.o x87.o x86seg.o x87.o
SYSOBJ = model.o \ MACHINEOBJ = machine.o \
headland.o \ machine_common.o \
i430hx.o i430lx.o i430fx.o i430nx.o i430vx.o i440fx.o \ machine_amstrad.o \
neat.o \ machine_europc.o \
ali1429.o \ machine_olivetti_m24.o \
opti495.o \ machine_pcjr.o \
scat.o \ machine_tandy.o \
sis85c471.o sis496.o \ machine_xt.o machine_xt_laserxt.o \
wd76c10.o \ machine_at.o \
acer386sx.o amstrad.o \ machine_at_ali1429.o machine_at_commodore.o \
compaq.o laserxt.o jim.o \ machine_at_neat.o machine_at_headland.o \
olivetti_m24.o ps1.o ps2.o ps2_mca.o \ machine_at_opti495.o machine_at_scat.o \
tandy_eeprom.o tandy_rom.o machine_at_wd76c10.o \
DEVOBJ = bugger.o lpt.o $(SERIAL) cbm_io.o \ machine_at_sis_85c471.o machine_at_sis_85c496.o \
machine_at_430lx_nx.o machine_at_430fx.o \
machine_at_430hx.o machine_at_430vx.o \
machine_at_440fx.o \
machine_ps1.o \
machine_ps2_isa.o machine_ps2_mca.o
DEVOBJ = bugger.o lpt.o $(SERIAL) \
tandy_eeprom.o tandy_rom.o \
fdc37c665.o fdc37c669.o fdc37c932fr.o \ fdc37c665.o fdc37c669.o fdc37c932fr.o \
pc87306.o w83877f.o um8669f.o \ pc87306.o w83877f.o um8669f.o \
keyboard.o \ keyboard.o \
@@ -317,7 +324,7 @@ RIVAOBJ = vid_nv_riva128.o
endif endif
DEVBRANCHOBJ = $(CIRRUSOBJ) $(RIVAOBJ) DEVBRANCHOBJ = $(CIRRUSOBJ) $(RIVAOBJ)
endif endif
OBJ = $(MAINOBJ) $(CPUOBJ) $(SYSOBJ) $(HDDOBJ) $(DEVOBJ) \ OBJ = $(MAINOBJ) $(CPUOBJ) $(MACHINEOBJ) $(HDDOBJ) $(DEVOBJ) \
$(USBOBJ) $(NETOBJ) $(SCSIOBJ) $(SNDOBJ) $(VIDOBJ) \ $(USBOBJ) $(NETOBJ) $(SCSIOBJ) $(SNDOBJ) $(VIDOBJ) \
$(WINOBJ) $(DEVBRANCHOBJ) $(WINOBJ) $(DEVBRANCHOBJ)
@@ -380,16 +387,8 @@ pcap_if.res: pcap_if.rc
# Module dependencies. # Module dependencies.
acer386sx.o: ibm.h cpu/cpu.h io.h device.h model.h
ali1429.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
amstrad.o: ibm.h cpu/cpu.h io.h device.h model.h keyboard.h lpt.h mouse.h
bugger.o: ibm.h io.h bugger.h bugger.o: ibm.h io.h bugger.h
cmb_io.o: ibm.h io.h lpt.h serial.h
cdrom.o: 86box.h cdrom.h ibm.h hdd/hdd_ide_at.h piix.h scsi/scsi.h timer.h \ cdrom.o: 86box.h cdrom.h ibm.h hdd/hdd_ide_at.h piix.h scsi/scsi.h timer.h \
win/plat_iodev.h win/plat_iodev.h
@@ -401,16 +400,14 @@ cdrom_ioctl.o: ibm.h cdrom.h cdrom_ioctl.h scsi/scsi.h
cdrom_null.o: ibm.h cdrom.h cdrom_ioctl.h cdrom_null.o: ibm.h cdrom.h cdrom_ioctl.h
compaq.o: ibm.h cpu/cpu.h mem.h device.h model.h
config.o: cdrom.h config.h device.h disc.h fdc.h fdd.h ibm.h \ config.o: cdrom.h config.h device.h disc.h fdc.h fdd.h ibm.h \
cpu/cpu.h gameport.h hdd/hdd_ide_at.h hdd/hdd.h model.h mouse.h \ cpu/cpu.h gameport.h hdd/hdd_ide_at.h hdd/hdd.h machine/machine.h \
network/network.h nvr.h scsi/scsi.h win/plat_joystick.h \ mouse.h network/network.h nvr.h scsi/scsi.h win/plat_joystick.h \
win/plat_midi.h sound/snd_dbopl.h sound/snd_mpu401.h \ win/plat_midi.h sound/snd_dbopl.h sound/snd_mpu401.h \
sound/snd_opl.h sound/sound.h video/video.h win/win.h \ sound/snd_opl.h sound/sound.h video/video.h win/win.h \
win/resource.h win/win_language.h win/resource.h win/win_language.h
device.o: ibm.h cpu/cpu.h config.h device.h model.h sound/sound.h device.o: ibm.h cpu/cpu.h config.h device.h machine/machine.h sound/sound.h
disc.o: ibm.h config.h disc.h disc_fdi.h disc_img.h disc_86f.h \ disc.o: ibm.h config.h disc.h disc_fdi.h disc_img.h disc_86f.h \
disc_td0.h disc_imd.h fdc.h fdd.h timer.h disc_td0.h disc_imd.h fdc.h fdd.h timer.h
@@ -445,49 +442,12 @@ gameport.o: ibm.h cpu/cpu.h device.h io.h timer.h gameport.h \
joystick_ch_flightstick_pro.h joystick_standard.h \ joystick_ch_flightstick_pro.h joystick_standard.h \
joystick_sw_pad.h joystick_tm_fcs.h plat_joystick.h joystick_sw_pad.h joystick_tm_fcs.h plat_joystick.h
hdd.o: ibm.h cpu/cpu.h device.h hdd/hdd.h model.h hdd/hdd_esdi_at.h \
hdd/hdd_esdi_mca.h hdd/hdd_mfm_at.h hdd/hdd_mfm_xebec.h hdd/hdd_ide_xt.h
hdd_image.o: ibm.h hdd/hdd_ide_at.h hdd/hdd_image.h
hdd_esdi_at.o: ibm.h device.h hdd_image.h io.h mem.h pic.h rom.h timer.h \
hdd/hdd_esdi_at.h
hdd_esdi_mca.o: ibm.h device.h dma.h hdd/hdd_image.h io.h mca.h mem.h \
pic.h rom.h timer.h hdd/hdd_esdi_mca.h
hdd_ide_at.o: 86box.h cdrom.h hdd/hdd_image.h ibm.h io.h pic.h timer.h \
cdrom.h scsi/scsi.h hdd/hdd_ide_at.h
hdd_ide_xt.o: ibm.h io.h mem.h rom.h device.h hdd/hdd_ide_at.h hdd/hdd_ide_xt.h
hdd_mfm_at.o: ibm.h device.h hdd/hdd_image.h io.h pic.h timer.h hdd/hdd_mfm_at.h
hdd_mfm_xebec.o: ibm.h device.h dma.h hdd/hdd_image.h io.h mem.h pic.h rom.h \
timer.h hdd/hdd_mfm_xebec.h
headland.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
i430fx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430hx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
i430lx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430nx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430vx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
i440fx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
intel.o: ibm.h cpu/cpu.h io.h mem.h pit.h timer.h intel.h intel.o: ibm.h cpu/cpu.h io.h mem.h pit.h timer.h intel.h
intel_flash.o: ibm.h cpu/cpu.h device.h mem.h model.h rom.h intel_flash.o: ibm.h cpu/cpu.h device.h mem.h machine/machine.h rom.h
io.o: ibm.h io.h io.o: ibm.h io.h
jim.o: ibm.h cpu/cpu.h io.h device.h model.h
joystick_ch_flightstick_pro.o: ibm.h device.h timer.h gameport.h \ joystick_ch_flightstick_pro.o: ibm.h device.h timer.h gameport.h \
joystick_standard.h plat_joystick.h joystick_standard.h plat_joystick.h
@@ -518,8 +478,6 @@ keyboard_pcjr.o: ibm.h io.h mem.h nmi.h pic.h pit.h timer.h \
keyboard_xt.o: ibm.h io.h mem.h pic.h pit.h timer.h device.h tandy_eeprom.h \ keyboard_xt.o: ibm.h io.h mem.h pic.h pit.h timer.h device.h tandy_eeprom.h \
sound/sound.h sound/snd_speaker.h keyboard.h keyboard_xt.h sound/sound.h sound/snd_speaker.h keyboard.h keyboard_xt.h
laserxt.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
lpt.o: ibm.h io.h lpt.h lpt.o: ibm.h io.h lpt.h
mca.o: ibm.h io.h mem.h mca.h mca.o: ibm.h io.h mem.h mca.h
@@ -531,18 +489,8 @@ mem.o: ibm.h cpu/cpu.h cpu/x86_ops.h cpu/x86.h config.h \
memregs.o: ibm.h io.h memregs.h memregs.o: ibm.h io.h memregs.h
model.o: ibm.h io.h mem.h rom.h device.h model.h cpu/cpu.h \ mouse.o: ibm.h cpu/cpu.h device.h machine/machine.h mouse.h \
mouse.h cdrom.h disc.h dma.h fdc.h fdc37c665.h fdc37c669.h \ keyboard_olim24.h
fdc37c932fr.h gameport.h hdd/hdd_ide_at.h intel.h intel_flash.h \
keyboard_amstrad.h keyboard_at.h keyboard_olim24.h \
keyboard_pcjr.h keyboard_xt.h lpt.h mem.h memregs.h \
nmi.h nvr.h pc87306.h pci.h pic.h piix.h pit.h ps2_mca.h \
serial.h sis85c471.h sio.h sound/snd_ps1.h sound/snd_pssj.h \
sound/snd_sn76489.h tandy_eeprom.h tandy_rom.h \
video/vid_pcjr.h video/vid_tandy.h w83877f.h wd76c10.h \
hdd/hdd_ide_xt.h bugger.h
mouse.o: ibm.h cpu/cpu.h device.h model.h mouse.h keyboard_olim24.h
mouse_bus.o: ibm.h io.h pic.h timer.h mouse.h mouse_bus.o: ibm.h io.h pic.h timer.h mouse.h
@@ -550,20 +498,14 @@ mouse_ps2.o: ibm.h keyboard_at.h mouse.h plat_mouse.h
mouse_serial.o: ibm.h timer.h serial.h mouse.h mouse_serial.o: ibm.h timer.h serial.h mouse.h
neat.o: ibm.h cpu/cpu.h io.h device.h model.h
nmi.o: ibm.h io.h nmi.h nmi.o: ibm.h io.h nmi.h
nvr.o: ibm.h cpu/cpu.h device.h io.h mem.h model.h nvr.h \ nvr.o: ibm.h cpu/cpu.h device.h io.h mem.h machine/machine.h \
pic.h rom.h timer.h rtc.h machine/machine_europc.h nvr.h pic.h rom.h timer.h rtc.h
olivetti_m24.o: ibm.h cpu/cpu.h io.h device.h model.h
opti495.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
pc.o: 86box.h ibm.h mem.h cpu/cpu.h cpu/x86_ops.h cpu/codegen.h \ pc.o: 86box.h ibm.h mem.h cpu/cpu.h cpu/x86_ops.h cpu/codegen.h \
dma.h nvr.h pic.h pit.h timer.h device.h model.h disc.h \ dma.h nvr.h pic.h pit.h timer.h device.h machine/machine.h \
disc_86f.h disc_fdi.h disc_imd.h disc_img.h disc_td0.h \ disc.h disc_86f.h disc_fdi.h disc_imd.h disc_img.h disc_td0.h \
disc_random.h config.h fdc.h fdd.h gameport.h plat_joystick.h \ disc_random.h config.h fdc.h fdd.h gameport.h plat_joystick.h \
plat_midi.h hdd/hdd.h hdd/hdd_ide_at.h cdrom.h cdrom_ioctl.h \ plat_midi.h hdd/hdd.h hdd/hdd_ide_at.h cdrom.h cdrom_ioctl.h \
cdrom_image.h cdrom_null.h scsi/scsi.h keyboard.h plat_keyboard.h \ cdrom_image.h cdrom_null.h scsi/scsi.h keyboard.h plat_keyboard.h \
@@ -576,61 +518,28 @@ pc.o: 86box.h ibm.h mem.h cpu/cpu.h cpu/x86_ops.h cpu/codegen.h \
pc87306.o: ibm.h disc.h fdc.h fdd.h hdd/hdd_ide_at.h io.h lpt.h serial.h \ pc87306.o: ibm.h disc.h fdc.h fdd.h hdd/hdd_ide_at.h io.h lpt.h serial.h \
pc87306.h pc87306.h
pci.o: ibm.h io.h mem.h pic.h pci.h pci.o: ibm.h cdrom.h disc.h fdc.h hdd/hdd_ide_at.h io.h keyboard_at.h mem.h pic.h pci.h
pic.o: ibm.h io.h pic.h pit.h pic.o: ibm.h io.h pic.h pit.h
piix.o: ibm.h dma.h hdd/hdd_ide_at.h io.h mem.h pci.h piix.h piix.o: ibm.h dma.h hdd/hdd_ide_at.h io.h mem.h pci.h piix.h
pit.o: ibm.h cpu/cpu.h dma.h io.h pic.h pit.h device.h timer.h \ pit.o: ibm.h cpu/cpu.h dma.h io.h pic.h pit.h device.h timer.h \
model.h sound/snd_speaker.h video/video.h machine/machine.h sound/snd_speaker.h video/video.h
ppi.o: ibm.h pit.h plat_keyboard.h plat_mouse.h ppi.o: ibm.h pit.h plat_keyboard.h plat_mouse.h
ps1.o: ibm.h cpu/cpu.h io.h mem.h rom.h device.h model.h lpt.h serial.h
ps2.o: ibm.h cpu/cpu.h io.h mem.h rom.h device.h model.h lpt.h serial.h
ps2_mca.o: ibm.h cpu/cpu.h cpu/x86.h io.h mca.h mem.h rom.h device.h \
lpt.h ps2_mca.h ps2_nvr.h serial.h
ps2_nvr.o: ibm.h device.h io.h mem.h rom.h ps2_nvr.h ps2_nvr.o: ibm.h device.h io.h mem.h rom.h ps2_nvr.h
rom.o: config.h ibm.h mem.h rom.h rom.o: config.h ibm.h mem.h rom.h
rtc.o: nvr.h rtc.h rtc.o: nvr.h rtc.h
scat.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
scsi.o: 86box.h ibm.h timer.h device.h cdrom.h scsi/scsi.h \
scsi/scsi_aha154x.h scsi/scsi_buslogic.h
scsi_bios_command.o: ibm.h dma.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_device.h
scsi_device.o: ibm.h scsi/scsi.h scsi/scsi_disk.h cdrom.h
scsi_aha154x.o: ibm.h io.h mca.h mem.h mca.h rom.h dma.h pic.h timer.h \
device.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_aha154x.h \
scsi_buslogic.o: ibm.h io.h mem.h rom.h dma.h pic.h pci.h timer.h \
device.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_device.h \
scsi/scsi_buslogic.h
scsi_disk.o: 86box.h cdrom.h hdd/hdd_image.h ibm.h hdd/hdd_ide_at.h piix.h scsi/scsi.h \
scsi/scsi_disk.h timer.h win/plat_iodev.h
serial.o: ibm.h io.h pic.h timer.h serial.h plat_serial.h serial.o: ibm.h io.h pic.h timer.h serial.h plat_serial.h
serial_old.o: ibm.h io.h mouse.h pic.h serial.h timer.h serial_old.o: ibm.h io.h mouse.h pic.h serial.h timer.h
sio.o: ibm.h cdrom.h disc.h dma.h fdc.h keyboard_at.h io.h mem.h \ sio.o: ibm.h dma.h mem.h pci.h sio.h
hdd/hdd_ide_at.h pci.h sio.h
sis496.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
sis50x.o: ibm.h device.h io.h mem.h pci.h sis50x.h
sis85c471.o: ibm.h hdd/hdd_ide_at.h disc.h fdc.h fdd.h io.h lpt.h serial.h sis85c471.h
superio_detect.o: ibm.h io.h disc.h fdd.h fdc.h superio_detect.h superio_detect.o: ibm.h io.h disc.h fdd.h fdc.h superio_detect.h
@@ -644,8 +553,6 @@ usb.o: ibm.h io.h mem.h usb.h
w83877f.o: ibm.h disc.h fdc.h fdd.h io.h lpt.h serial.h w83877f.h w83877f.o: ibm.h disc.h fdc.h fdd.h io.h lpt.h serial.h w83877f.h
wd76c10.o: ibm.h disc.h fdc.h io.h mem.h serial.h wd76c10.h
386.o: ibm.h cpu/cpu.h cpu/x86.h cpu/x87.h mem.h disc.h fdc.h pic.h timer.h cpu/386_common.h 386.o: ibm.h cpu/cpu.h cpu/x86.h cpu/x87.h mem.h disc.h fdc.h pic.h timer.h cpu/386_common.h
386_dynarec.o: ibm.h cpu/cpu.h cpu/x86.h cpu/x86_ops.h cpu/x87.h mem.h cpu/codegen.h disc.h fdc.h pic.h timer.h cpu/386_common.h \ 386_dynarec.o: ibm.h cpu/cpu.h cpu/x86.h cpu/x86_ops.h cpu/x87.h mem.h cpu/codegen.h disc.h fdc.h pic.h timer.h cpu/386_common.h \
@@ -696,12 +603,115 @@ codegen_x86.o: ibm.h cpu/cpu.h cpu/x86.h cpu/x86_flags.h cpu/x86_ops.h cpu/x87.
codegen_x86-64.o: ibm.h mem.h cpu/cpu.h cpu/x86.h cpu/x86_flags.h cpu/x86_ops.h cpu/x87.h cpu/386_common.h cpu/codegen.h cpu/codegen_ops.h \ codegen_x86-64.o: ibm.h mem.h cpu/cpu.h cpu/x86.h cpu/x86_flags.h cpu/x86_ops.h cpu/x87.h cpu/386_common.h cpu/codegen.h cpu/codegen_ops.h \
cpu/codegen_ops_x86-64.h cpu/codegen_ops_x86-64.h
cpu.o: ibm.h cpu/cpu.h device.h model.h io.h cpu/x86_ops.h mem.h pci.h cpu/codegen.h cpu.o: ibm.h cpu/cpu.h device.h machine/machine.h io.h cpu/x86_ops.h mem.h pci.h cpu/codegen.h
x86seg.o: ibm.h mem.h nvr.h cpu/x86.h cpu/386.h cpu/386_common.h cpu/cpu.h x86seg.o: ibm.h mem.h nvr.h cpu/x86.h cpu/386.h cpu/386_common.h cpu/cpu.h
x87.o: ibm.h pic.h cpu/x86.h cpu/x86_flags.h cpu/x86_ops.h cpu/x87.h cpu/386_common.h x87.o: ibm.h pic.h cpu/x86.h cpu/x86_flags.h cpu/x86_ops.h cpu/x87.h cpu/386_common.h
hdd.o: ibm.h cpu/cpu.h device.h hdd/hdd.h machine/machine.h \
hdd/hdd_esdi_at.h hdd/hdd_esdi_mca.h hdd/hdd_mfm_at.h hdd/hdd_mfm_xebec.h \
hdd/hdd_ide_xt.h
hdd_image.o: ibm.h hdd/hdd_ide_at.h hdd/hdd_image.h
hdd_esdi_at.o: ibm.h device.h hdd_image.h io.h mem.h pic.h rom.h timer.h \
hdd/hdd_esdi_at.h
hdd_esdi_mca.o: ibm.h device.h dma.h hdd/hdd_image.h io.h mca.h mem.h \
pic.h rom.h timer.h hdd/hdd_esdi_mca.h
hdd_ide_at.o: 86box.h cdrom.h hdd/hdd_image.h ibm.h io.h pic.h timer.h \
cdrom.h scsi/scsi.h hdd/hdd_ide_at.h
hdd_ide_xt.o: ibm.h io.h mem.h rom.h device.h hdd/hdd_ide_at.h hdd/hdd_ide_xt.h
hdd_mfm_at.o: ibm.h device.h hdd/hdd_image.h io.h pic.h timer.h hdd/hdd_mfm_at.h
hdd_mfm_xebec.o: ibm.h device.h dma.h hdd/hdd_image.h io.h mem.h pic.h rom.h \
timer.h hdd/hdd_mfm_xebec.h
machine.o: ibm.h cpu/cpu.h device.h disc.h fdc.h fdd.h io.h machine/machine.h machine/machine_common.h machine/machine_amstrad.h \
machine/machine_europc.h machine/machine_olivetti_m24.h machine/machine_pcjr.h machine/machine_tandy.h \
machine/machine_xt.h machine/machine_xt_laserxt.h machine/machine_at.h machine/machine_at_ali1429.h \
machine/machine_at_commodore.h machine/machine_at_headland.h machine/machine_at_neat.h machine/machine_at_opti495.h \
machine/machine_at_scat.h machine/machine_at_wd76c10.h machine/machine_ps1.h machine/machine_ps2_isa.h \
machine/machine_ps2_mca.h machine/machine_at_sis_85c471.h machine/machine_at_sis_85c496.h \
machine/machine_at_430lx_nx.h machine/machine_at_430fx.h machine/machine_at_430hx.h machine/machine_at_430vx.h \
machine/machine_at_440fx.h video/vid_pcjr.h video/vid_tandy.h video/vid_tandysl.h
machine_amstrad.o: ibm.h cpu/cpu.h device.h disc.h fdd.h fdc.h gameport.h io.h keyboard.h keyboard_amstrad.h lpt.h mem.h mouse.h \
nmi.h nvr.h machine/machine_common.h
machine_at.o: ibm.h bugger.h device.h dma.h gameport.h hdd/hdd_ide_at.h keyboard_at.h lpt.h mem.h nvr.h pic.h pit.h \
machine/machine_common.h machine/machine_at.h
machine_at_430fx.o: ibm.h cpu/cpu.h device.h fdc37c665.h intel_flash.h mem.h memregs.h pc87306.h pci.h piix.h w83877f.h \
machine/machine_at.h machine/machine_at_430fx.h
machine_at_430hx.o: ibm.h cpu/cpu.h device.h fdc37c669.h fdc37c932fr.h io.h intel_flash.h mem.h memregs.h pc87306.h pci.h \
piix.h w83877f.h machine/machine_at.h machine/machine_at_430hx.h
machine_at_430lx_nx.o: ibm.h cpu/cpu.h device.h fdc37c665.h intel.h intel_flash.h mem.h memregs.h pci.h sio.h machine/machine_at.h \
machine/machine_at_430lx_nx.h
machine_at_430vx.o: ibm.h cpu/cpu.h device.h fdc37c932fr.h io.h mem.h memregs.h intel_flash.h pci.h piix.h um8669f.h w83877f.h \
machine/machine_at.h machine/machine_at_430vx.h
machine_at_440fx.o: ibm.h cpu/cpu.h device.h fdc37c665.h intel_flash.h io.h mem.h memregs.h pci.h piix.h machine/machine_at.h \
machine/machine_at_440fx.h
machine_at_ali1429.o: ibm.h cpu/cpu.h hdd/hdd_ide_at.h io.h mem.h machine/machine_at.h machine/machine_at_ali1429.h
machine_at_commodore.o: ibm.h io.h lpt.h serial.h machine/machine_at.h machine/machine_at_commodore.h
machine_at_compaq.o: ibm.h cpu/cpu.h mem.h machine/machine_at.h machine/machine_at_compaq.h
machine_at_headland.o: ibm.h cpu/cpu.h io.h mem.h machine/machine_at.h machine/machine_at_headland.h
machine_at_neat.o: ibm.h cpu/cpu.h io.h machine/machine_at.h machine/machine_at_neat.h
machine_at_opti495.o: ibm.h cpu/cpu.h io.h mem.h machine/machine_at.h machine/machine_at_opti495.h
machine_at_scat.o: ibm.h cpu/cpu.h io.h mem.h cpu/x86.h machine/machine_at.h machine/machine_at_scat.h
machine_at_sis_85c50x.o: ibm.h io.h mem.h pci.h machine/machine_at.h machine/machine_at_sis_5c50x.h
machine_at_sis_85c471.o: ibm.h disc.h fdc.h fdd.h hdd/hdd_ide_at.h io.h lpt.h memregs.h serial.h machine/machine_at.h \
machine/machine_at_sis_85c471.h
machine_at_sis_85c496.o: ibm.h cpu/cpu.h fdc37c665.h io.h mem.h memregs.h pci.h machine/machine_at.h machine/machine_at_sis_85c496.h
machine_at_wd76c10.o: ibm.h disc.h fdc.h io.h mem.h serial.h machine/machine_at.h machine/machine_at_wd76c10.h
machine_common.o: ibm.h dma.h disc.h fdd.h fdc.h lpt.h pic.h pit.h serial.h machine/machine_common.h
machine_europc.o: ibm.h cpu/cpu.h io.h device.h gameport.h keyboard_xt.h lpt.h mem.h nmi.h rom.h machine/machine_common.h \
machine/machine_europc.h
machine_olivetti_m24.o: ibm.h cpu/cpu.h device.h gameport.h keyboard_olim24.h mem.h nmi.h nvr.h io.h machine/machine_common.h \
machine/machine_olivetti_m24.h
machine_pcjr.o: ibm.h device.h disc.h fdc.h fdd.h keyboard_pcjr.h mem.h nmi.h pic.h pit.h serial.h sound/snd_sn76489.h \
machine/machine_pcjr.h
machine_ps1.o: ibm.h cpu/cpu.h device.h disc.h dma.h gameport.h hdd/hdd_ide_at.h fdd.h fdc.h io.h keyboard_at.h lpt.h \
mem.h nvr.h pic.h pit.h rom.h serial.h sound/snd_ps1.h machine/machine_common.h machine/machine_ps1.h
machine_ps2_isa.o: ibm.h cpu/cpu.h device.h disc.h dma.h fdd.h fdc.h io.h keyboard.h keyboard_at.h lpt.h mem.h nvr.h pic.h \
pit.h rom.h serial.h machine/machine_common.h machine/machine_ps2_isa.h
machine_ps2_mca.o: ibm.h cpu/cpu.h cpu/x86.h device.h dma.h io.h keyboard_at.h lpt.h mca.h mem.h mouse.h nvr.h pic.h \
pit.h rom.h ps2_nvr.h serial.h machine/machine_common.h machine/machine_ps2_mca.h
machine_tandy.o: ibm.h device.h gameport.h keyboard_xt.h mem.h nmi.h tandy_eeprom.h tandy_rom.h sound/snd_pssj.h \
sound/snd_sn76489.h
machine_xt.o: ibm.h bugger.h device.h gameport.h keyboard_xt.h mem.h nmi.h pit.h machine/machine_common.h \
machine/machine_xt.h
machine_xt_laserxt.o: ibm.h cpu/cpu.h io.h mem.h machine/machine_xt.h machine/machine_xt_laserxt.h
net_ne2000.o: ibm.h io.h mem.h rom.h pci.h pic.h device.h config.h disc_random.h network/network.h network/net_ne2000.h network/bswap.h net_ne2000.o: ibm.h io.h mem.h rom.h pci.h pic.h device.h config.h disc_random.h network/network.h network/net_ne2000.h network/bswap.h
net_pcap.o: ibm.h config.h device.h network/network.h win/plat_dynld.h win/plat_thread.h net_pcap.o: ibm.h config.h device.h network/network.h win/plat_dynld.h win/plat_thread.h
@@ -710,6 +720,23 @@ net_slirp.o: network/slirp/slirp.h network/slirp/queue.h ibm.h config.h device.h
network.o: ibm.h device.h network/network.h network/net_ne2000.h win/plat_ui.h network.o: ibm.h device.h network/network.h network/net_ne2000.h win/plat_ui.h
scsi.o: 86box.h ibm.h timer.h device.h cdrom.h scsi/scsi.h \
scsi/scsi_aha154x.h scsi/scsi_buslogic.h
scsi_bios_command.o: ibm.h dma.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_device.h
scsi_device.o: ibm.h scsi/scsi.h scsi/scsi_disk.h cdrom.h
scsi_aha154x.o: ibm.h io.h mca.h mem.h mca.h rom.h dma.h pic.h timer.h \
device.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_aha154x.h \
scsi_buslogic.o: ibm.h io.h mem.h rom.h dma.h pic.h pci.h timer.h \
device.h scsi/scsi.h scsi/scsi_bios_command.h scsi/scsi_device.h \
scsi/scsi_buslogic.h
scsi_disk.o: 86box.h cdrom.h hdd/hdd_image.h ibm.h hdd/hdd_ide_at.h piix.h scsi/scsi.h \
scsi/scsi_disk.h timer.h win/plat_iodev.h
dbopl.o: sound/dbopl.h dbopl.o: sound/dbopl.h
midi.o: device.h sound/midi.h ibm.h win/plat_midi.h win/plat_ticks.h sound/midi_fluidsynth.h sound/midi_mt32.h sound/midi_system.h midi.o: device.h sound/midi.h ibm.h win/plat_midi.h win/plat_ticks.h sound/midi_fluidsynth.h sound/midi_mt32.h sound/midi_system.h
@@ -885,7 +912,7 @@ video.o: ibm.h cpu/cpu.h io.h mem.h rom.h config.h device.h timer.h win/plat_th
video/vid_pc200.h video/vid_pcjr.h video/vid_ps1_svga.h video/vid_s3.h video/vid_s3_virge.h video/vid_tandy.h \ video/vid_pc200.h video/vid_pcjr.h video/vid_ps1_svga.h video/vid_s3.h video/vid_s3_virge.h video/vid_tandy.h \
video/vid_tandysl.h video/vid_tgui9440.h video/vid_tvga.h video/vid_vga.h video/vid_wy700.h video/vid_tandysl.h video/vid_tgui9440.h video/vid_tvga.h video/vid_vga.h video/vid_wy700.h
win.o: 86box.h device.h disc.h fdd.h hdd.h ibm.h cpu/cpu.h mem.h rom.h nvr.h config.h model.h hdd/hdd_ide_at.h cdrom.h cdrom_null.h \ win.o: 86box.h device.h disc.h fdd.h hdd.h ibm.h cpu/cpu.h mem.h rom.h nvr.h config.h machine/machine.h hdd/hdd_ide_at.h cdrom.h cdrom_null.h \
cdrom_ioctl.h cdrom_image.h scsi/scsi.h scsi_disk.h video/video.h video/vid_ega.h mouse.h sound/sound.h sound/snd_dbopl.h \ cdrom_ioctl.h cdrom_image.h scsi/scsi.h scsi_disk.h video/video.h video/vid_ega.h mouse.h sound/sound.h sound/snd_dbopl.h \
win/plat_keyboard.h win/plat_iodev.h win/plat_mouse.h win/plat_midi.h win/plat_thread.h win/plat_ticks.h win/plat_ui.h \ win/plat_keyboard.h win/plat_iodev.h win/plat_mouse.h win/plat_midi.h win/plat_thread.h win/plat_ticks.h win/plat_ui.h \
win/resource.h win/win.h win/win_cgapal.h win/win_ddraw.h win/win_d3d.h win/win_language.h win/resource.h win/win.h win/win_cgapal.h win/win_ddraw.h win/win_d3d.h win/win_language.h
@@ -922,7 +949,7 @@ win_opendir.o: ibm.h win/plat_dir.h win/resource.h
win_serial.o: win/plat_thread.h win/plat_serial.h win/resource.h win_serial.o: win/plat_thread.h win/plat_serial.h win/resource.h
win_settings.o: ibm.h mem.h cpu/cpu.h nvr.h device.h model.h cdrom.h disc.h fdd.h hdd/hdd.h hdd/hdd_ide_at.h scsi/scsi.h network/network.h sound/midi.h \ win_settings.o: ibm.h mem.h cpu/cpu.h nvr.h device.h machine/machine.h cdrom.h disc.h fdd.h hdd/hdd.h hdd/hdd_ide_at.h scsi/scsi.h network/network.h sound/midi.h \
sound/sound.h sound/snd_dbopl.h sound/snd_mpu401.h video/video.h video/vid_voodoo.h gameport.h mouse.h win/plat_midi.h \ sound/sound.h sound/snd_dbopl.h sound/snd_mpu401.h video/video.h video/vid_voodoo.h gameport.h mouse.h win/plat_midi.h \
win/resource.h win/win.h win/win_language.h win/resource.h win/win.h win/win_language.h

40
src/acer386sx.c
View File

@@ -1,40 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "device.h"
#include "model.h"
static int acer_index = 0;
static uint8_t acer_regs[256];
static void acer386sx_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr & 1)
acer_regs[acer_index] = val;
else
acer_index = val;
}
static uint8_t acer386sx_read(uint16_t addr, void *priv)
{
if (addr & 1)
{
if ((acer_index >= 0xc0 || acer_index == 0x20) && cpu_iscyrix)
return 0xff; /*Don't conflict with Cyrix config registers*/
return acer_regs[acer_index];
}
else
return acer_index;
}
void acer386sx_init(void)
{
io_sethandler(0x0022, 0x0002, acer386sx_read, NULL, NULL, acer386sx_write, NULL, NULL, NULL);
}

1
src/cbm_io.h
View File

@@ -1 +0,0 @@
void cbm_io_init();

32
src/config.c
View File

@@ -39,7 +39,7 @@
#include "gameport.h" #include "gameport.h"
#include "hdd/hdd.h" #include "hdd/hdd.h"
#include "hdd/hdd_ide_at.h" #include "hdd/hdd_ide_at.h"
#include "model.h" #include "machine/machine.h"
#include "mouse.h" #include "mouse.h"
#ifdef USE_NETWORK #ifdef USE_NETWORK
#include "network/network.h" #include "network/network.h"
@@ -872,32 +872,44 @@ static void loadconfig_machine(void)
wchar_t last; wchar_t last;
char *p; char *p;
p = config_get_string(cat, "machine", NULL);
if (p != NULL)
{
machine = machine_get_machine_from_internal_name(p);
}
else
machine = 0;
if (machine >= machine_count())
machine = machine_count() - 1;
/* This is for backwards compatibility. */
p = config_get_string(cat, "model", NULL); p = config_get_string(cat, "model", NULL);
if (p != NULL) if (p != NULL)
{ {
/* Detect the old model typo and fix it, so that old configurations don't braek. */ /* Detect the old model typo and fix it, so that old configurations don't braek. */
if (strcmp(p, "p55r2p4") == 0) if (strcmp(p, "p55r2p4") == 0)
{ {
model = model_get_model_from_internal_name("p55t2p4"); machine = machine_get_machine_from_internal_name("p55t2p4");
} }
else else
{ {
model = model_get_model_from_internal_name(p); machine = machine_get_machine_from_internal_name(p);
} }
config_delete_var(cat, "machine");
} }
else else
model = 0; machine = 0;
if (model >= model_count()) if (machine >= machine_count())
model = model_count() - 1; machine = machine_count() - 1;
romset = model_getromset(); romset = machine_getromset();
cpu_manufacturer = config_get_int(cat, "cpu_manufacturer", 0); cpu_manufacturer = config_get_int(cat, "cpu_manufacturer", 0);
cpu = config_get_int(cat, "cpu", 0); cpu = config_get_int(cat, "cpu", 0);
cpu_waitstates = config_get_int(cat, "cpu_waitstates", 0); cpu_waitstates = config_get_int(cat, "cpu_waitstates", 0);
mem_size = config_get_int(cat, "mem_size", 4096); mem_size = config_get_int(cat, "mem_size", 4096);
if (mem_size < (((models[model].flags & MODEL_AT) && (models[model].ram_granularity < 128)) ? models[model].min_ram*1024 : models[model].min_ram)) if (mem_size < (((machines[machine].flags & MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram))
mem_size = (((models[model].flags & MODEL_AT) && (models[model].ram_granularity < 128)) ? models[model].min_ram*1024 : models[model].min_ram); mem_size = (((machines[machine].flags & MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram);
if (mem_size > 262144) if (mem_size > 262144)
{ {
mem_size = 262144; mem_size = 262144;
@@ -1903,7 +1915,7 @@ static void saveconfig_machine(void)
{ {
char *cat = "Machine"; char *cat = "Machine";
config_set_string(cat, "model", model_get_internal_name()); config_set_string(cat, "machine", machine_get_internal_name());
if (cpu_manufacturer == 0) if (cpu_manufacturer == 0)
{ {

44
src/cpu/cpu.c
View File

@@ -20,7 +20,7 @@
#include "../ibm.h" #include "../ibm.h"
#include "cpu.h" #include "cpu.h"
#include "../device.h" #include "../device.h"
#include "../model.h" #include "../machine/machine.h"
#include "../io.h" #include "../io.h"
#include "x86_ops.h" #include "x86_ops.h"
#include "../mem.h" #include "../mem.h"
@@ -606,7 +606,7 @@ CPU cpus_PentiumPro[] =
void cpu_set_edx() void cpu_set_edx()
{ {
EDX = models[model].cpu[cpu_manufacturer].cpus[cpu].edx_reset; EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu].edx_reset;
} }
int enable_external_fpu = 0; int enable_external_fpu = 0;
@@ -615,14 +615,14 @@ void cpu_set()
{ {
CPU *cpu_s; CPU *cpu_s;
if (!models[model].cpu[cpu_manufacturer].cpus) if (!machines[machine].cpu[cpu_manufacturer].cpus)
{ {
/*CPU is invalid, set to default*/ /*CPU is invalid, set to default*/
cpu_manufacturer = 0; cpu_manufacturer = 0;
cpu = 0; cpu = 0;
} }
cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu]; cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu];
CPUID = cpu_s->cpuid_model; CPUID = cpu_s->cpuid_model;
cpuspeed = cpu_s->speed; cpuspeed = cpu_s->speed;
@@ -1570,7 +1570,7 @@ void cpu_set()
void cpu_CPUID() void cpu_CPUID()
{ {
switch (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type) switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
{ {
case CPU_i486DX: case CPU_i486DX:
if (!EAX) if (!EAX)
@@ -1993,7 +1993,7 @@ void cpu_CPUID()
void cpu_RDMSR() void cpu_RDMSR()
{ {
switch (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type) switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
{ {
case CPU_WINCHIP: case CPU_WINCHIP:
EAX = EDX = 0; EAX = EDX = 0;
@@ -2093,7 +2093,7 @@ void cpu_RDMSR()
EDX = tsc >> 32; EDX = tsc >> 32;
break; break;
case 0x17: case 0x17:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_rdmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_rdmsr;
EAX = ecx17_msr & 0xffffffff; EAX = ecx17_msr & 0xffffffff;
EDX = ecx17_msr >> 32; EDX = ecx17_msr >> 32;
break; break;
@@ -2134,16 +2134,16 @@ void cpu_RDMSR()
EDX = ecx11e_msr >> 32; EDX = ecx11e_msr >> 32;
break; break;
case 0x174: case 0x174:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr;
EAX &= 0xFFFF0000; EAX &= 0xFFFF0000;
EAX |= cs_msr; EAX |= cs_msr;
break; break;
case 0x175: case 0x175:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr;
EAX = esp_msr; EAX = esp_msr;
break; break;
case 0x176: case 0x176:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_rdmsr;
EAX = eip_msr; EAX = eip_msr;
break; break;
case 0x186: case 0x186:
@@ -2213,7 +2213,7 @@ i686_invalid_rdmsr:
void cpu_WRMSR() void cpu_WRMSR()
{ {
switch (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type) switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
{ {
case CPU_WINCHIP: case CPU_WINCHIP:
switch (ECX) switch (ECX)
@@ -2236,7 +2236,7 @@ void cpu_WRMSR()
if (EAX & (1 << 29)) if (EAX & (1 << 29))
CPUID = 0; CPUID = 0;
else else
CPUID = models[model].cpu[cpu_manufacturer].cpus[cpu].cpuid_model; CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model;
break; break;
case 0x108: case 0x108:
msr.fcr2 = EAX | ((uint64_t)EDX << 32); msr.fcr2 = EAX | ((uint64_t)EDX << 32);
@@ -2298,7 +2298,7 @@ void cpu_WRMSR()
tsc = EAX | ((uint64_t)EDX << 32); tsc = EAX | ((uint64_t)EDX << 32);
break; break;
case 0x17: case 0x17:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr;
ecx17_msr = EAX | ((uint64_t)EDX << 32); ecx17_msr = EAX | ((uint64_t)EDX << 32);
break; break;
case 0x1B: case 0x1B:
@@ -2326,15 +2326,15 @@ void cpu_WRMSR()
ecx11e_msr = EAX | ((uint64_t)EDX << 32); ecx11e_msr = EAX | ((uint64_t)EDX << 32);
break; break;
case 0x174: case 0x174:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
cs_msr = EAX & 0xFFFF; cs_msr = EAX & 0xFFFF;
break; break;
case 0x175: case 0x175:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
esp_msr = EAX; esp_msr = EAX;
break; break;
case 0x176: case 0x176:
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
eip_msr = EAX; eip_msr = EAX;
break; break;
case 0x186: case 0x186:
@@ -2410,10 +2410,10 @@ void cyrix_write(uint16_t addr, uint8_t val, void *priv)
if ((ccr3 & 0xf0) == 0x10) if ((ccr3 & 0xf0) == 0x10)
{ {
ccr4 = val; ccr4 = val;
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type >= CPU_Cx6x86) if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type >= CPU_Cx6x86)
{ {
if (val & 0x80) if (val & 0x80)
CPUID = models[model].cpu[cpu_manufacturer].cpus[cpu].cpuid_model; CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model;
else else
CPUID = 0; CPUID = 0;
} }
@@ -2443,11 +2443,11 @@ uint8_t cyrix_read(uint16_t addr, void *priv)
case 0xe8: return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff; case 0xe8: return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff;
case 0xe9: return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff; case 0xe9: return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff;
case 0xea: return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff; case 0xea: return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff;
case 0xfe: return models[model].cpu[cpu_manufacturer].cpus[cpu].cyrix_id & 0xff; case 0xfe: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id & 0xff;
case 0xff: return models[model].cpu[cpu_manufacturer].cpus[cpu].cyrix_id >> 8; case 0xff: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id >> 8;
} }
if ((cyrix_addr & 0xf0) == 0xc0) return 0xff; if ((cyrix_addr & 0xf0) == 0xc0) return 0xff;
if (cyrix_addr == 0x20 && models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_Cx5x86) return 0xff; if (cyrix_addr == 0x20 && machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_Cx5x86) return 0xff;
} }
return 0xff; return 0xff;
} }
@@ -2462,7 +2462,7 @@ void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn
void cpu_update_waitstates() void cpu_update_waitstates()
{ {
cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu]; cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu];
cpu_prefetch_width = cpu_16bitbus ? 2 : 4; cpu_prefetch_width = cpu_16bitbus ? 2 : 4;

12
src/device.c
View File

@@ -9,7 +9,7 @@
* Implementation of the generic device interface to handle * Implementation of the generic device interface to handle
* all devices attached to the emulator. * all devices attached to the emulator.
* *
* Version: @(#)device.c 1.0.2 2017/08/24 * Version: @(#)device.c 1.0.3 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -20,7 +20,7 @@
#include "cpu/cpu.h" #include "cpu/cpu.h"
#include "config.h" #include "config.h"
#include "device.h" #include "device.h"
#include "model.h" #include "machine/machine.h"
#include "sound/sound.h" #include "sound/sound.h"
@@ -320,9 +320,9 @@ char *device_get_config_string(char *s)
} }
int model_get_config_int(char *s) int machine_get_config_int(char *s)
{ {
device_t *device = model_getdevice(model); device_t *device = machine_getdevice(machine);
device_config_t *config; device_config_t *config;
if (!device) if (!device)
@@ -341,9 +341,9 @@ int model_get_config_int(char *s)
} }
char *model_get_config_string(char *s) char *machine_get_config_string(char *s)
{ {
device_t *device = model_getdevice(model); device_t *device = machine_getdevice(machine);
device_config_t *config; device_config_t *config;
if (!device) if (!device)

4
src/device.h
View File

@@ -107,8 +107,8 @@ extern void device_set_config_hex20(char *s, int val);
extern void device_set_config_mac(char *s, int val); extern void device_set_config_mac(char *s, int val);
extern char *device_get_config_string(char *name); extern char *device_get_config_string(char *name);
extern int model_get_config_int(char *s); extern int machine_get_config_int(char *s);
extern char *model_get_config_string(char *s); extern char *machine_get_config_string(char *s);
#endif /*EMU_DEVICE_H*/ #endif /*EMU_DEVICE_H*/

4
src/hdd/hdd.c
View File

@@ -1,7 +1,7 @@
#include "../ibm.h" #include "../ibm.h"
#include "../cpu/cpu.h" #include "../cpu/cpu.h"
#include "../device.h" #include "../device.h"
#include "../model.h" #include "../machine/machine.h"
#include "hdd.h" #include "hdd.h"
@@ -69,7 +69,7 @@ void hdd_controller_init(char *internal_name)
{ {
int c = 0; int c = 0;
if (models[model].flags & MODEL_HAS_IDE) if (machines[machine].flags & MACHINE_HAS_IDE)
{ {
return; return;
} }

15
src/hdd/hdd_ide_at.c
View File

@@ -2292,3 +2292,18 @@ void ide_set_bus_master(int (*read)(int channel, uint8_t *data, int transfer_len
ide_bus_master_write = write; ide_bus_master_write = write;
ide_bus_master_set_irq = set_irq; ide_bus_master_set_irq = set_irq;
} }
void secondary_ide_check(void)
{
int i = 0;
int secondary_cdroms = 0;
for (i=0; i<CDROM_NUM; i++)
{
if ((cdrom_drives[i].ide_channel >= 2) && (cdrom_drives[i].ide_channel <= 3) && ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) || (cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA)))
{
secondary_cdroms++;
}
}
if (!secondary_cdroms) ide_sec_disable();
}

2
src/hdd/hdd_ide_at.h
View File

@@ -99,5 +99,7 @@ extern void ide_pri_enable_ex(void);
extern void ide_set_base(int controller, uint16_t port); extern void ide_set_base(int controller, uint16_t port);
extern void ide_set_side(int controller, uint16_t port); extern void ide_set_side(int controller, uint16_t port);
extern void secondary_ide_check(void);
#endif /*EMU_IDE_H*/ #endif /*EMU_IDE_H*/

174
src/i430lx.c
View File

@@ -1,174 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430LX PCISet chip.
*
* Version: @(#)i430lx.c 1.0.2 2017/08/23
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
static uint8_t card_i430lx[256];
static void i430lx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
{
case 0:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
break;
case 1:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
break;
case 2:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
break;
case 3:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
}
flushmmucache_nopc();
}
static void i430lx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
if ((addr >= 0x10) && (addr < 0x4f))
return;
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0c: case 0x0e:
return;
case 0x04: /*Command register*/
val &= 0x42;
val |= 0x04;
break;
case 0x05:
val &= 0x01;
break;
case 0x06: /*Status*/
val = 0;
break;
case 0x07:
val = 0x02;
break;
case 0x59: /*PAM0*/
if ((card_i430lx[0x59] ^ val) & 0xf0)
{
i430lx_map(0xf0000, 0x10000, val >> 4);
shadowbios = (val & 0x10);
}
pclog("i430lx_write : PAM0 write %02X\n", val);
break;
case 0x5a: /*PAM1*/
if ((card_i430lx[0x5a] ^ val) & 0x0f)
i430lx_map(0xc0000, 0x04000, val & 0xf);
if ((card_i430lx[0x5a] ^ val) & 0xf0)
i430lx_map(0xc4000, 0x04000, val >> 4);
break;
case 0x5b: /*PAM2*/
if (romset == ROM_REVENGE)
{
if ((card_i430lx[0x5b] ^ val) & 0x0f)
i430lx_map(0xc8000, 0x04000, val & 0xf);
if ((card_i430lx[0x5b] ^ val) & 0xf0)
i430lx_map(0xcc000, 0x04000, val >> 4);
}
break;
case 0x5c: /*PAM3*/
if ((card_i430lx[0x5c] ^ val) & 0x0f)
i430lx_map(0xd0000, 0x04000, val & 0xf);
if ((card_i430lx[0x5c] ^ val) & 0xf0)
i430lx_map(0xd4000, 0x04000, val >> 4);
break;
case 0x5d: /*PAM4*/
if ((card_i430lx[0x5d] ^ val) & 0x0f)
i430lx_map(0xd8000, 0x04000, val & 0xf);
if ((card_i430lx[0x5d] ^ val) & 0xf0)
i430lx_map(0xdc000, 0x04000, val >> 4);
break;
case 0x5e: /*PAM5*/
if ((card_i430lx[0x5e] ^ val) & 0x0f)
i430lx_map(0xe0000, 0x04000, val & 0xf);
if ((card_i430lx[0x5e] ^ val) & 0xf0)
i430lx_map(0xe4000, 0x04000, val >> 4);
pclog("i430lx_write : PAM5 write %02X\n", val);
break;
case 0x5f: /*PAM6*/
if ((card_i430lx[0x5f] ^ val) & 0x0f)
i430lx_map(0xe8000, 0x04000, val & 0xf);
if ((card_i430lx[0x5f] ^ val) & 0xf0)
i430lx_map(0xec000, 0x04000, val >> 4);
pclog("i430lx_write : PAM6 write %02X\n", val);
break;
}
card_i430lx[addr] = val;
}
static uint8_t i430lx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
return card_i430lx[addr];
}
static void i430lx_reset(void)
{
memset(card_i430lx, 0, 256);
card_i430lx[0x00] = 0x86; card_i430lx[0x01] = 0x80; /*Intel*/
card_i430lx[0x02] = 0xa3; card_i430lx[0x03] = 0x04; /*82434LX*/
card_i430lx[0x04] = 0x06; card_i430lx[0x05] = 0x00;
card_i430lx[0x06] = 0x00; card_i430lx[0x07] = 0x02;
card_i430lx[0x08] = 0x03; /*A3 stepping*/
card_i430lx[0x09] = 0x00; card_i430lx[0x0a] = 0x00; card_i430lx[0x0b] = 0x06;
card_i430lx[0x50] = 0x80;
card_i430lx[0x52] = 0x40; /*256kb PLB cache*/
card_i430lx[0x57] = 0x31;
card_i430lx[0x60] = card_i430lx[0x61] = card_i430lx[0x62] = card_i430lx[0x63] = card_i430lx[0x64] = 0x02;
}
static void i430lx_pci_reset(void)
{
i430lx_write(0, 0x59, 0x00, NULL);
}
void i430lx_init(void)
{
pci_add_card(0, i430lx_read, i430lx_write, NULL);
i430lx_reset();
pci_reset_handler.pci_master_reset = i430lx_pci_reset;
}

172
src/i430nx.c
View File

@@ -1,172 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430NX PCISet chip.
*
* Version: @(#)i430nx.c 1.0.2 2017/08/23
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
static uint8_t card_i430nx[256];
static void i430nx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
{
case 0:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
break;
case 1:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
break;
case 2:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
break;
case 3:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
}
flushmmucache_nopc();
}
static void i430nx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
if ((addr >= 0x10) && (addr < 0x4f))
return;
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0c: case 0x0e:
return;
case 0x04: /*Command register*/
val &= 0x42;
val |= 0x04;
break;
case 0x05:
val &= 0x01;
break;
case 0x06: /*Status*/
val = 0;
break;
case 0x07:
val = 0x02;
break;
case 0x59: /*PAM0*/
if ((card_i430nx[0x59] ^ val) & 0xf0)
{
i430nx_map(0xf0000, 0x10000, val >> 4);
shadowbios = (val & 0x10);
}
pclog("i430nx_write : PAM0 write %02X\n", val);
break;
case 0x5a: /*PAM1*/
if ((card_i430nx[0x5a] ^ val) & 0x0f)
i430nx_map(0xc0000, 0x04000, val & 0xf);
if ((card_i430nx[0x5a] ^ val) & 0xf0)
i430nx_map(0xc4000, 0x04000, val >> 4);
break;
case 0x5b: /*PAM2*/
if ((card_i430nx[0x5b] ^ val) & 0x0f)
i430nx_map(0xc8000, 0x04000, val & 0xf);
if ((card_i430nx[0x5b] ^ val) & 0xf0)
i430nx_map(0xcc000, 0x04000, val >> 4);
break;
case 0x5c: /*PAM3*/
if ((card_i430nx[0x5c] ^ val) & 0x0f)
i430nx_map(0xd0000, 0x04000, val & 0xf);
if ((card_i430nx[0x5c] ^ val) & 0xf0)
i430nx_map(0xd4000, 0x04000, val >> 4);
break;
case 0x5d: /*PAM4*/
if ((card_i430nx[0x5d] ^ val) & 0x0f)
i430nx_map(0xd8000, 0x04000, val & 0xf);
if ((card_i430nx[0x5d] ^ val) & 0xf0)
i430nx_map(0xdc000, 0x04000, val >> 4);
break;
case 0x5e: /*PAM5*/
if ((card_i430nx[0x5e] ^ val) & 0x0f)
i430nx_map(0xe0000, 0x04000, val & 0xf);
if ((card_i430nx[0x5e] ^ val) & 0xf0)
i430nx_map(0xe4000, 0x04000, val >> 4);
pclog("i430nx_write : PAM5 write %02X\n", val);
break;
case 0x5f: /*PAM6*/
if ((card_i430nx[0x5f] ^ val) & 0x0f)
i430nx_map(0xe8000, 0x04000, val & 0xf);
if ((card_i430nx[0x5f] ^ val) & 0xf0)
i430nx_map(0xec000, 0x04000, val >> 4);
pclog("i430nx_write : PAM6 write %02X\n", val);
break;
}
card_i430nx[addr] = val;
}
static uint8_t i430nx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
return card_i430nx[addr];
}
static void i430nx_reset(void)
{
memset(card_i430nx, 0, 256);
card_i430nx[0x00] = 0x86; card_i430nx[0x01] = 0x80; /*Intel*/
card_i430nx[0x02] = 0xa3; card_i430nx[0x03] = 0x04; /*82434NX*/
card_i430nx[0x04] = 0x06; card_i430nx[0x05] = 0x00;
card_i430nx[0x06] = 0x00; card_i430nx[0x07] = 0x02;
card_i430nx[0x08] = 0x10; /*A0 stepping*/
card_i430nx[0x09] = 0x00; card_i430nx[0x0a] = 0x00; card_i430nx[0x0b] = 0x06;
card_i430nx[0x50] = 0xA0;
card_i430nx[0x52] = 0x44; /*256kb PLB cache*/
card_i430nx[0x57] = 0x31;
card_i430nx[0x60] = card_i430nx[0x61] = card_i430nx[0x62] = card_i430nx[0x63] = card_i430nx[0x64] = 0x02;
card_i430nx[0x66] = card_i430nx[0x67] = 0x02;
}
static void i430nx_pci_reset(void)
{
i430nx_write(0, 0x59, 0x00, NULL);
}
void i430nx_init(void)
{
pci_add_card(0, i430nx_read, i430nx_write, NULL);
i430nx_reset();
pci_reset_handler.pci_master_reset = i430nx_pci_reset;
}

7
src/ibm.h
View File

@@ -732,8 +732,6 @@ typedef struct PCI_RESET
extern PCI_RESET pci_reset_handler; extern PCI_RESET pci_reset_handler;
extern uint8_t trc_read(uint16_t port, void *priv);
extern void trc_write(uint16_t port, uint8_t val, void *priv);
extern void trc_init(void); extern void trc_init(void);
extern int enable_xtide; extern int enable_xtide;
@@ -785,7 +783,6 @@ extern void runpc(void);
extern void saveconfig(void); extern void saveconfig(void);
extern void softresetx86(void); extern void softresetx86(void);
extern void speedchanged(void); extern void speedchanged(void);
extern void trc_reset(uint8_t val);
extern void x86_int_sw(int num); extern void x86_int_sw(int num);
extern int x86_int_sw_rm(int num); extern int x86_int_sw_rm(int num);
extern void x86gpf(char *s, uint16_t error); extern void x86gpf(char *s, uint16_t error);
@@ -813,3 +810,7 @@ extern void status_settext(char *str);
#define SB_TEXT 0x60 #define SB_TEXT 0x60
#define UNUSED(x) (void)x #define UNUSED(x) (void)x
/* Configuration values. */
#define SERIAL_MAX 2
#define PARALLEL_MAX 1

14
src/intel_flash.c
View File

@@ -21,7 +21,7 @@
#include "cpu/cpu.h" #include "cpu/cpu.h"
#include "device.h" #include "device.h"
#include "mem.h" #include "mem.h"
#include "model.h" #include "machine/machine.h"
#include "rom.h" #include "rom.h"
#define FLASH_IS_BXB 2 #define FLASH_IS_BXB 2
@@ -177,16 +177,16 @@ void *intel_flash_init(uint8_t type)
FILE *f; FILE *f;
int i; int i;
flash_t *flash; flash_t *flash;
wchar_t *model_name; wchar_t *machine_name;
wchar_t *flash_name; wchar_t *flash_name;
flash = malloc(sizeof(flash_t)); flash = malloc(sizeof(flash_t));
memset(flash, 0, sizeof(flash_t)); memset(flash, 0, sizeof(flash_t));
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(model)) << 1) + 2); machine_name = (wchar_t *) malloc((strlen(machine_get_internal_name_ex(machine)) << 1) + 2);
mbstowcs(model_name, model_get_internal_name_ex(model), strlen(model_get_internal_name_ex(model)) + 1); mbstowcs(machine_name, machine_get_internal_name_ex(machine), strlen(machine_get_internal_name_ex(machine)) + 1);
flash_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8); flash_name = (wchar_t *) malloc((wcslen(machine_name) << 1) + 2 + 8);
_swprintf(flash_name, L"%s.bin", model_name); _swprintf(flash_name, L"%s.bin", machine_name);
wcscpy(flash_path, flash_name); wcscpy(flash_path, flash_name);
@@ -262,7 +262,7 @@ void *intel_flash_init(uint8_t type)
} }
free(flash_name); free(flash_name);
free(model_name); free(machine_name);
return flash; return flash;
} }

1
src/jim.h
View File

@@ -1 +0,0 @@
void jim_save_nvr(void);

267
src/machine/machine.c Normal file
View File

@@ -0,0 +1,267 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Handling of the emulated machines.
*
* Version: @(#)machine.c 1.0.9 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
*/
#include <stdint.h>
#include <stdio.h>
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../device.h"
#include "../disc.h"
#include "../fdc.h"
#include "../fdd.h"
#include "../io.h"
#include "machine.h"
#include "machine_common.h"
#include "machine_amstrad.h"
#include "machine_europc.h"
#include "machine_olivetti_m24.h"
#include "machine_pcjr.h"
#include "machine_tandy.h"
#include "machine_xt.h"
#include "machine_xt_laserxt.h"
#include "machine_at.h"
#include "machine_at_ali1429.h"
#include "machine_at_commodore.h"
#include "machine_at_headland.h"
#include "machine_at_neat.h"
#include "machine_at_opti495.h"
#include "machine_at_scat.h"
#include "machine_at_wd76c10.h"
#include "machine_ps1.h"
#include "machine_ps2_isa.h"
#include "machine_ps2_mca.h"
#include "machine_at_sis_85c471.h"
#include "machine_at_sis_85c496.h"
#include "machine_at_430lx_nx.h"
#include "machine_at_430fx.h"
#include "machine_at_430hx.h"
#include "machine_at_430vx.h"
#include "machine_at_440fx.h"
#include "../video/vid_pcjr.h"
#include "../video/vid_tandy.h"
#include "../video/vid_tandysl.h"
int machine;
int AMSTRAD, AT, PCI, TANDY;
int serial_enabled[SERIAL_MAX] = { 0, 0 };
int lpt_enabled = 0, bugger_enabled = 0;
int romset;
machine_t machines[] =
{
{"[8088] AMI XT clone", ROM_AMIXT, "amixt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 128, 640, 128, 0, machine_xt_init, NULL },
{"[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 32, 0, machine_xt_init, NULL },
{"[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{"[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"", cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 512, 640, 128, 0, machine_europc_init, NULL },
{"[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 128, 0, machine_tandy1k_init, tandy1000_get_device },
{"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 256, 640, 128, 0, machine_tandy1k_init, tandy1000hx_get_device },
{"[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 1152, 64, 0, machine_xt_laserxt_init, NULL },
{"[8088] VTech Laser XT3", ROM_LXT3, "lxt3", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 1152, 64, 0, machine_xt_laserxt_init, NULL },
{"[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AMSTRAD, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_OLIM24, 128, 640, 128, 0, machine_olim24_init, NULL },
{"[8086] Sinclair PC200", ROM_PC200, "pc200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AMSTRAD, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 512, 768, 128, 0, machine_tandy1ksl2_init, NULL },
{"[286 ISA] AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_neat_init, NULL },
{"[286 ISA] Award 286 clone", ROM_AWARD286, "award286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_scat_init, NULL },
{"[286 ISA] Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 640,16384, 128, 127, machine_at_cmdpc_init, NULL },
{"[286 ISA] Hyundai Super-286TR", ROM_SUPER286TR, "super286tr", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_scat_init, NULL },
{"[286 ISA] IBM AT", ROM_IBMAT, "ibmat", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT, 256,15872, 128, 63, machine_at_top_remap_init, NULL },
{"[286 ISA] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 512,16384, 512, 127, machine_ps1_m2011_init, NULL },
{"[286 ISA] IBM PS/2 model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
{"[286 ISA] Samsung SPC-4200P", ROM_SPC4200P, "spc4200p", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_scat_init, NULL },
{"[286 MCA] IBM PS/2 model 50", ROM_IBMPS2_M50, "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD | MACHINE_MCA, 1, 16, 1, 63, machine_ps2_model_50_init, NULL },
{"[386SX ISA] AMI 386SX clone", ROM_AMI386SX, "ami386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_headland_init, NULL },
{"[386SX ISA] Amstrad MegaPC", ROM_MEGAPC, "megapc", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386SX ISA] Award 386SX clone", ROM_AWARD386SX_OPTI495, "award386sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386SX ISA] DTK 386SX clone", ROM_DTK386, "dtk386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 512,16384, 128, 127, machine_at_neat_init, NULL },
{"[386SX ISA] IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD | MACHINE_MCA, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
{"[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386DX ISA] Award 386DX clone", ROM_AWARD386DX_OPTI495, "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD | MACHINE_MCA, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
{"[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_at_dtk486_init, NULL },
{"[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE, 1, 64, 1, 127, machine_ps1_m2133_init, NULL },
{"[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD | MACHINE_MCA, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL },
{"[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE | MACHINE_PCI, 1, 64, 1, 127, machine_at_r418_init, NULL },
{"[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_batman_init, NULL },
{"[Socket 5 NX] Intel Premiere/PCI II", ROM_PLATO, "plato", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_plato_init, NULL },
{"[Socket 5 FX] ASUS P/I-P54TP4XE", ROM_P54TP4XE, "p54tp4xe", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_p54tp4xe_init, NULL },
{"[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_endeavor_init, NULL },
{"[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_zappa_init, NULL },
{"[Socket 5 FX] PC Partner MB500N", ROM_MB500N, "mb500n", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_mb500n_init, NULL },
{"[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_HAS_IDE | MACHINE_PCI, 1, 128, 1, 127, machine_at_president_init, NULL },
{"[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_thor_init, NULL },
{"[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_thor_init, NULL },
{"[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_acerm3a_init, NULL },
{"[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_acerv35n_init, NULL },
{"[Socket 7 HX] AOpen AP53", ROM_AP53, "ap53", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_ap53_init, NULL },
{"[Socket 7 HX] ASUS P/I-P55T2P4", ROM_P55T2P4, "p55t2p4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_p55t2p4_init, NULL },
{"[Socket 7 HX] ASUS P/I-P55T2S", ROM_P55T2S, "p55t2s", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_p55t2s_init, NULL },
{"[Socket 7 VX] ASUS P/I-P55TVP4", ROM_P55TVP4, "p55tvp4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_p55tvp4_init, NULL },
{"[Socket 7 VX] Award 430VX PCI", ROM_430VX, "430vx", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_i430vx_init, NULL },
{"[Socket 7 VX] Epox P55-VA", ROM_P55VA, "p55va", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_p55va_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro AT", ROM_440FX, "440fx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_i440fx_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro ATX", ROM_S1668, "tpatx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_IDE | MACHINE_PCI, 1, 256, 1, 127, machine_at_s1668_init, NULL },
{"", -1, "", {{"", 0}, {"", 0}, {"", 0}}, 0,0,0,0, 0 }
};
int machine_count(void)
{
return (sizeof(machines) / sizeof(machine)) - 1;
}
int machine_getromset(void)
{
return machines[machine].id;
}
int machine_getromset_ex(int m)
{
return machines[m].id;
}
int machine_getmachine(int romset)
{
int c = 0;
while (machines[c].id != -1)
{
if (machines[c].id == romset)
return c;
c++;
}
return 0;
}
char *machine_getname(void)
{
return machines[machine].name;
}
device_t *machine_getdevice(int machine)
{
if (machines[machine].get_device)
{
return machines[machine].get_device();
}
else
{
return NULL;
}
}
char *machine_get_internal_name(void)
{
return machines[machine].internal_name;
}
char *machine_get_internal_name_ex(int m)
{
return machines[m].internal_name;
}
int machine_get_nvrmask(int m)
{
return machines[m].nvrmask;
}
int machine_get_machine_from_internal_name(char *s)
{
int c = 0;
while (machines[c].id != -1)
{
if (!strcmp(machines[c].internal_name, s))
return c;
c++;
}
return 0;
}
void machine_init(void)
{
pclog("Initializing as %s\n", machine_getname());
AMSTRAD = AT = PCI = TANDY = 0;
io_init();
fdc_update_is_nsc(0);
machines[machine].init();
if (machines[machine].get_device)
device_add(machines[machine].get_device());
}

79
src/machine/machine.h Normal file
View File

@@ -0,0 +1,79 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Handling of the emulated machines.
*
* Version: @(#)machine.h 1.0.3 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#ifndef EMU_MACHINE_H
# define EMU_MACHINE_H
#define MACHINE_AT 1
#define MACHINE_PS2 2
#define MACHINE_AMSTRAD 4
#define MACHINE_OLIM24 8
#define MACHINE_HAS_IDE 16
#define MACHINE_MCA 32
#define MACHINE_PCI 64
#define MACHINE_PS2_HDD 128
#define MACHINE_NEC 256
#define MACHINE_FUJITSU 512
#define MACHINE_RM 1024
typedef struct {
char name[64];
int id;
char internal_name[24];
struct {
char name[16];
CPU *cpus;
} cpu[5];
int fixed_gfxcard;
int flags;
int min_ram, max_ram;
int ram_granularity;
int nvrmask;
void (*init)(void);
device_t *(*get_device)(void);
} machine_t;
/* Global variables. */
extern machine_t machines[];
extern int machine;
/* Core functions. */
extern int machine_count(void);
extern int machine_getromset(void);
extern int machine_getmachine(int romset);
extern char *machine_getname(void);
extern char *machine_get_internal_name(void);
extern int machine_get_machine_from_internal_name(char *s);
extern void machine_init(void);
extern device_t *machine_getdevice(int machine);
extern int machine_getromset_ex(int m);
extern char *machine_get_internal_name_ex(int m);
extern int machine_get_nvrmask(int m);
/* Global variables for boards and systems. */
#ifdef EMU_MOUSE_H
extern mouse_t mouse_amstrad;
extern mouse_t mouse_olim24;
#endif
#endif /*EMU_MACHINE_H*/

46
src/amstrad.c → src/machine/machine_amstrad.c
View File

@@ -1,12 +1,22 @@
#include <stdlib.h> #include <stdlib.h>
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "device.h" #include "../device.h"
#include "model.h" #include "../disc.h"
#include "keyboard.h" #include "../fdd.h"
#include "lpt.h" #include "../fdc.h"
#include "mouse.h" #include "../gameport.h"
#include "../io.h"
#include "../keyboard.h"
#include "../keyboard_amstrad.h"
#include "../lpt.h"
#include "../mem.h"
#include "../mouse.h"
#include "../nmi.h"
#include "../nvr.h"
#include "machine_common.h"
static uint8_t amstrad_dead; static uint8_t amstrad_dead;
@@ -44,7 +54,6 @@ static void amstrad_write(uint16_t port, uint8_t val, void *priv)
static uint8_t mousex, mousey; static uint8_t mousex, mousey;
static void amstrad_mouse_write(uint16_t addr, uint8_t val, void *p) static void amstrad_mouse_write(uint16_t addr, uint8_t val, void *p)
{ {
// pclog("Write mouse %04X %02X %04X:%04X\n", addr, val, CS, pc);
if (addr == 0x78) if (addr == 0x78)
mousex = 0; mousex = 0;
else else
@@ -53,7 +62,6 @@ static void amstrad_mouse_write(uint16_t addr, uint8_t val, void *p)
static uint8_t amstrad_mouse_read(uint16_t addr, void *p) static uint8_t amstrad_mouse_read(uint16_t addr, void *p)
{ {
// printf("Read mouse %04X %04X:%04X %02X\n", addr, CS, pc, (addr == 0x78) ? mousex : mousey);
if (addr == 0x78) if (addr == 0x78)
return mousex; return mousex;
return mousey; return mousey;
@@ -114,7 +122,7 @@ mouse_t mouse_amstrad =
}; };
void amstrad_init(void) static void amstrad_init(void)
{ {
lpt2_remove_ams(); lpt2_remove_ams();
@@ -123,3 +131,19 @@ void amstrad_init(void)
io_sethandler(0x0379, 0x0002, amstrad_read, NULL, NULL, NULL, NULL, NULL, NULL); io_sethandler(0x0379, 0x0002, amstrad_read, NULL, NULL, NULL, NULL, NULL, NULL);
io_sethandler(0xdead, 0x0001, amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, NULL); io_sethandler(0xdead, 0x0001, amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, NULL);
} }
void machine_amstrad_init(void)
{
AMSTRAD = 1;
machine_common_init();
mem_add_bios();
amstrad_init();
keyboard_amstrad_init();
nvr_init();
nmi_init();
fdc_set_dskchg_activelow();
if (joystick_type != 7)
device_add(&gameport_device);
}

1
src/machine/machine_amstrad.h Normal file
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@@ -0,0 +1 @@
void machine_amstrad_init(void);

53
src/machine/machine_at.c Normal file
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@@ -0,0 +1,53 @@
#include "../ibm.h"
#include "../bugger.h"
#include "../device.h"
#include "../dma.h"
#include "../gameport.h"
#include "../hdd/hdd_ide_at.h"
#include "../keyboard_at.h"
#include "../lpt.h"
#include "../mem.h"
#include "../nvr.h"
#include "../pic.h"
#include "../pit.h"
#include "machine_common.h"
#include "machine_at.h"
void machine_at_init(void)
{
AT = 1;
machine_common_init();
if (lpt_enabled)
lpt2_remove();
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
keyboard_at_init();
nvr_init();
pic2_init();
if (joystick_type != 7)
device_add(&gameport_device);
if (bugger_enabled)
bugger_init();
}
void machine_at_ide_init(void)
{
machine_at_init();
ide_init();
}
void machine_at_top_remap_init(void)
{
machine_at_init();
mem_remap_top_384k();
}
void machine_at_ide_top_remap_init(void)
{
machine_at_ide_init();
mem_remap_top_384k();
}

4
src/machine/machine_at.h Normal file
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@@ -0,0 +1,4 @@
void machine_at_init(void);
void machine_at_ide_init(void);
void machine_at_top_remap_init(void);
void machine_at_ide_top_remap_init(void);

134
src/i430fx.c → src/machine/machine_at_430fx.c
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@@ -8,7 +8,7 @@
* *
* Implementation of the Intel 430FX PCISet chip. * Implementation of the Intel 430FX PCISet chip.
* *
* Version: @(#)i430fx.c 1.0.2 2017/08/23 * Version: @(#)machine_at_430fx.c 1.0.3 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -16,12 +16,22 @@
* Copyright 2016-2017 Miran Grca. * Copyright 2016-2017 Miran Grca.
*/ */
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "mem.h"
#include "pci.h" #include "../cpu/cpu.h"
#include "device.h" #include "../device.h"
#include "model.h" #include "../fdc37c665.h"
#include "../intel_flash.h"
#include "../mem.h"
#include "../memregs.h"
#include "../pc87306.h"
#include "../pci.h"
#include "../piix.h"
#include "../w83877f.h"
#include "machine_at.h"
#include "machine_at_430fx.h"
static uint8_t card_i430fx[256]; static uint8_t card_i430fx[256];
@@ -179,7 +189,7 @@ static void i430fx_pci_reset(void)
} }
void i430fx_init(void) static void i430fx_init(void)
{ {
pci_add_card(0, i430fx_read, i430fx_write, NULL); pci_add_card(0, i430fx_read, i430fx_write, NULL);
@@ -187,3 +197,111 @@ void i430fx_init(void)
pci_reset_handler.pci_master_reset = i430fx_pci_reset; pci_reset_handler.pci_master_reset = i430fx_pci_reset;
} }
void machine_at_p54tp4xe_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_endeavor_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_ONBOARD, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void machine_at_zappa_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void machine_at_mb500n_init(void)
{
machine_at_ide_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_president_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_thor_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_ONBOARD, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430fx_init();
piix_init(7);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}

23
src/machine/machine_at_430fx.h Normal file
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@@ -0,0 +1,23 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Header of the implementation of the Intel 430FX PCISet chip.
*
* Version: @(#)machine_at_430fx.h 1.0.0 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void machine_at_p54tp4xe_init(void);
void machine_at_endeavor_init(void);
void machine_at_zappa_init(void);
void machine_at_mb500n_init(void);
void machine_at_president_init(void);
void machine_at_thor_init(void);

124
src/i430hx.c → src/machine/machine_at_430hx.c
View File

@@ -8,7 +8,7 @@
* *
* Implementation of the Intel 430HX PCISet chip. * Implementation of the Intel 430HX PCISet chip.
* *
* Version: @(#)i430hx.c 1.0.2 2017/08/23 * Version: @(#)machine_at_430hx.c 1.0.3 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -16,13 +16,24 @@
* Copyright 2016-2017 Miran Grca. * Copyright 2016-2017 Miran Grca.
*/ */
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "pci.h" #include "../device.h"
#include "device.h" #include "../fdc37c669.h"
#include "model.h" #include "../fdc37c932fr.h"
#include "../io.h"
#include "../intel_flash.h"
#include "../mem.h"
#include "../memregs.h"
#include "../pc87306.h"
#include "../pci.h"
#include "../piix.h"
#include "../w83877f.h"
#include "machine_at.h"
#include "machine_at_430hx.h"
static uint8_t card_i430hx[256]; static uint8_t card_i430hx[256];
@@ -167,7 +178,7 @@ static void i430hx_pci_reset(void)
} }
void i430hx_init(void) static void i430hx_init(void)
{ {
pci_add_card(0, i430hx_read, i430hx_write, NULL); pci_add_card(0, i430hx_read, i430hx_write, NULL);
@@ -175,3 +186,98 @@ void i430hx_init(void)
pci_reset_handler.pci_master_reset = i430hx_pci_reset; pci_reset_handler.pci_master_reset = i430hx_pci_reset;
} }
void machine_at_acerm3a_init(void)
{
machine_at_ide_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_ONBOARD, 4, 0, 0, 0);
i430hx_init();
piix3_init(7);
fdc37c932fr_init();
device_add(&intel_flash_bxb_device);
}
void machine_at_acerv35n_init(void)
{
machine_at_ide_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
i430hx_init();
piix3_init(7);
fdc37c932fr_init();
device_add(&intel_flash_bxb_device);
}
void machine_at_ap53_init(void)
{
machine_at_ide_init();
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_ONBOARD, 1, 2, 3, 4);
i430hx_init();
piix3_init(7);
fdc37c669_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_p55t2p4_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430hx_init();
piix3_init(7);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_p55t2s_init(void)
{
machine_at_ide_init();
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430hx_init();
piix3_init(7);
pc87306_init();
device_add(&intel_flash_bxt_device);
}

22
src/machine/machine_at_430hx.h Normal file
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@@ -0,0 +1,22 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Header of the implementation of the Intel 430HX PCISet chip.
*
* Version: @(#)machine_at_430hx.h 1.0.0 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void machine_at_acerm3a_init(void);
void machine_at_acerv35n_init(void);
void machine_at_ap53_init(void);
void machine_at_p55t2p4_init(void);
void machine_at_p55t2s_init(void);

241
src/machine/machine_at_430lx_nx.c Normal file
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@@ -0,0 +1,241 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430LX and 430NX PCISet chips.
*
* Version: @(#)machine_at_430lx_nx.c 1.0.3 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../device.h"
#include "../fdc37c665.h"
#include "../intel.h"
#include "../intel_flash.h"
#include "../mem.h"
#include "../memregs.h"
#include "../pci.h"
#include "../sio.h"
#include "machine_at.h"
#include "machine_at_430lx_nx.h"
static uint8_t card_i430_lx_nx[256];
static void i430lx_nx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
{
case 0:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
break;
case 1:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
break;
case 2:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
break;
case 3:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
}
flushmmucache_nopc();
}
static void i430lx_nx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
if ((addr >= 0x10) && (addr < 0x4f))
return;
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0c: case 0x0e:
return;
case 0x04: /*Command register*/
val &= 0x42;
val |= 0x04;
break;
case 0x05:
val &= 0x01;
break;
case 0x06: /*Status*/
val = 0;
break;
case 0x07:
val = 0x02;
break;
case 0x59: /*PAM0*/
if ((card_i430_lx_nx[0x59] ^ val) & 0xf0)
{
i430lx_nx_map(0xf0000, 0x10000, val >> 4);
shadowbios = (val & 0x10);
}
pclog("i430lx_write : PAM0 write %02X\n", val);
break;
case 0x5a: /*PAM1*/
if ((card_i430_lx_nx[0x5a] ^ val) & 0x0f)
i430lx_nx_map(0xc0000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5a] ^ val) & 0xf0)
i430lx_nx_map(0xc4000, 0x04000, val >> 4);
break;
case 0x5b: /*PAM2*/
if (romset == ROM_REVENGE)
{
if ((card_i430_lx_nx[0x5b] ^ val) & 0x0f)
i430lx_nx_map(0xc8000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5b] ^ val) & 0xf0)
i430lx_nx_map(0xcc000, 0x04000, val >> 4);
}
break;
case 0x5c: /*PAM3*/
if ((card_i430_lx_nx[0x5c] ^ val) & 0x0f)
i430lx_nx_map(0xd0000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5c] ^ val) & 0xf0)
i430lx_nx_map(0xd4000, 0x04000, val >> 4);
break;
case 0x5d: /*PAM4*/
if ((card_i430_lx_nx[0x5d] ^ val) & 0x0f)
i430lx_nx_map(0xd8000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5d] ^ val) & 0xf0)
i430lx_nx_map(0xdc000, 0x04000, val >> 4);
break;
case 0x5e: /*PAM5*/
if ((card_i430_lx_nx[0x5e] ^ val) & 0x0f)
i430lx_nx_map(0xe0000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5e] ^ val) & 0xf0)
i430lx_nx_map(0xe4000, 0x04000, val >> 4);
pclog("i430lx_write : PAM5 write %02X\n", val);
break;
case 0x5f: /*PAM6*/
if ((card_i430_lx_nx[0x5f] ^ val) & 0x0f)
i430lx_nx_map(0xe8000, 0x04000, val & 0xf);
if ((card_i430_lx_nx[0x5f] ^ val) & 0xf0)
i430lx_nx_map(0xec000, 0x04000, val >> 4);
pclog("i430lx_write : PAM6 write %02X\n", val);
break;
}
card_i430_lx_nx[addr] = val;
}
static uint8_t i430lx_nx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
return card_i430_lx_nx[addr];
}
static void i430lx_nx_reset_common(void)
{
memset(card_i430_lx_nx, 0, 256);
card_i430_lx_nx[0x00] = 0x86; card_i430_lx_nx[0x01] = 0x80; /*Intel*/
card_i430_lx_nx[0x02] = 0xa3; card_i430_lx_nx[0x03] = 0x04; /*82434LX/NX*/
card_i430_lx_nx[0x04] = 0x06; card_i430_lx_nx[0x05] = 0x00;
card_i430_lx_nx[0x06] = 0x00; card_i430_lx_nx[0x07] = 0x02;
card_i430_lx_nx[0x09] = 0x00; card_i430_lx_nx[0x0a] = 0x00; card_i430_lx_nx[0x0b] = 0x06;
card_i430_lx_nx[0x57] = 0x31;
card_i430_lx_nx[0x60] = card_i430_lx_nx[0x61] = card_i430_lx_nx[0x62] = card_i430_lx_nx[0x63] = card_i430_lx_nx[0x64] = 0x02;
}
static void i430lx_reset(void)
{
i430lx_nx_reset_common();
card_i430_lx_nx[0x08] = 0x03; /*A3 stepping*/
card_i430_lx_nx[0x50] = 0x80;
card_i430_lx_nx[0x52] = 0x40; /*256kb PLB cache*/
}
static void i430nx_reset(void)
{
i430lx_nx_reset_common();
card_i430_lx_nx[0x08] = 0x10; /*A0 stepping*/
card_i430_lx_nx[0x50] = 0xA0;
card_i430_lx_nx[0x52] = 0x44; /*256kb PLB cache*/
card_i430_lx_nx[0x66] = card_i430_lx_nx[0x67] = 0x02;
}
static void i430lx_nx_pci_reset(void)
{
i430lx_nx_write(0, 0x59, 0x00, NULL);
}
static void i430lx_init(void)
{
pci_add_card(0, i430lx_nx_read, i430lx_nx_write, NULL);
i430lx_reset();
pci_reset_handler.pci_master_reset = i430lx_nx_pci_reset;
}
static void i430nx_init(void)
{
pci_add_card(0, i430lx_nx_read, i430lx_nx_write, NULL);
i430nx_reset();
pci_reset_handler.pci_master_reset = i430lx_nx_pci_reset;
}
static void machine_at_premiere_common_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SPECIAL, 0, 0, 0, 0);
sio_init(2);
fdc37c665_init();
intel_batman_init();
device_add(&intel_flash_bxt_ami_device);
}
void machine_at_batman_init(void)
{
machine_at_premiere_common_init();
i430lx_init();
}
void machine_at_plato_init(void)
{
machine_at_premiere_common_init();
i430nx_init();
}

20
src/machine/machine_at_430lx_nx.h Normal file
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@@ -0,0 +1,20 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Header of the implementation of the Intel 430LX and 430NX
* PCISet chips.
*
* Version: @(#)machine_at_430lx_nx.h 1.0.0 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void machine_at_batman_init(void);
void machine_at_plato_init(void);

79
src/i430vx.c → src/machine/machine_at_430vx.c
View File

@@ -8,7 +8,7 @@
* *
* Implementation of the Intel 430VX PCISet chip. * Implementation of the Intel 430VX PCISet chip.
* *
* Version: @(#)i430vx.c 1.0.3 2017/08/23 * Version: @(#)machine_at_430vx.c 1.0.4 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -16,13 +16,23 @@
* Copyright 2016-2017 Miran Grca. * Copyright 2016-2017 Miran Grca.
*/ */
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "pci.h" #include "../device.h"
#include "device.h" #include "../fdc37c932fr.h"
#include "model.h" #include "../io.h"
#include "../mem.h"
#include "../memregs.h"
#include "../intel_flash.h"
#include "../pci.h"
#include "../piix.h"
#include "../um8669f.h"
#include "../w83877f.h"
#include "machine_at.h"
#include "machine_at_430vx.h"
static uint8_t card_i430vx[256]; static uint8_t card_i430vx[256];
@@ -178,3 +188,56 @@ void i430vx_init(void)
pci_reset_handler.pci_master_reset = i430vx_pci_reset; pci_reset_handler.pci_master_reset = i430vx_pci_reset;
} }
void machine_at_p55tvp4_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430vx_init();
piix3_init(7);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_i430vx_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430vx_init();
piix3_init(7);
um8669f_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_p55va_init(void)
{
machine_at_ide_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i430vx_init();
piix3_init(7);
fdc37c932fr_init();
device_add(&intel_flash_bxt_device);
}

20
src/machine/machine_at_430vx.h Normal file
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@@ -0,0 +1,20 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Header of the implementation of the Intel 430VX PCISet chip.
*
* Version: @(#)machine_at_430vx.h 1.0.0 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void machine_at_p55tvp4_init(void);
void machine_at_i430vx_init(void);
void machine_at_p55va_init(void);

64
src/i440fx.c → src/machine/machine_at_440fx.c
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@@ -8,7 +8,7 @@
* *
* Implementation of the Intel 440FX PCISet chip. * Implementation of the Intel 440FX PCISet chip.
* *
* Version: @(#)i440fx.c 1.0.2 2017/08/23 * Version: @(#)machine_at_440fx.c 1.0.3 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -16,13 +16,21 @@
* Copyright 2016-2017 Miran Grca. * Copyright 2016-2017 Miran Grca.
*/ */
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "pci.h" #include "../device.h"
#include "device.h" #include "../fdc37c665.h"
#include "model.h" #include "../intel_flash.h"
#include "../io.h"
#include "../mem.h"
#include "../memregs.h"
#include "../pci.h"
#include "../piix.h"
#include "machine_at.h"
#include "machine_at_440fx.h"
static uint8_t card_i440fx[256]; static uint8_t card_i440fx[256];
@@ -171,7 +179,7 @@ static void i440fx_pci_reset(void)
} }
void i440fx_init(void) static void i440fx_init(void)
{ {
pci_add_card(0, i440fx_read, i440fx_write, NULL); pci_add_card(0, i440fx_read, i440fx_write, NULL);
@@ -179,3 +187,41 @@ void i440fx_init(void)
pci_reset_handler.pci_master_reset = i440fx_pci_reset; pci_reset_handler.pci_master_reset = i440fx_pci_reset;
} }
void machine_at_i440fx_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
i440fx_init();
piix3_init(7);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void machine_at_s1668_init(void)
{
machine_at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
i440fx_init();
piix3_init(7);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}

19
src/machine/machine_at_440fx.h Normal file
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@@ -0,0 +1,19 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Header of the implementation of the Intel 440FX PCISet chip.
*
* Version: @(#)machine_at_440fx.h 1.0.0 2017/09/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void machine_at_i440fx_init(void);
void machine_at_s1668_init(void);

30
src/ali1429.c → src/machine/machine_at_ali1429.c
View File

@@ -2,12 +2,16 @@
see COPYING for more details see COPYING for more details
*/ */
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "device.h" #include "../hdd/hdd_ide_at.h"
#include "model.h" #include "../io.h"
#include "../mem.h"
#include "machine_at.h"
#include "machine_at_ali1429.h"
static int ali1429_index; static int ali1429_index;
@@ -77,13 +81,23 @@ uint8_t ali1429_read(uint16_t port, void *priv)
} }
void ali1429_reset(void) static void ali1429_reset(void)
{ {
memset(ali1429_regs, 0xff, 256); memset(ali1429_regs, 0xff, 256);
} }
void ali1429_init(void) static void ali1429_init(void)
{ {
io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, NULL); io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, NULL);
} }
void machine_at_ali1429_init(void)
{
ali1429_reset();
machine_at_ide_init();
ali1429_init();
secondary_ide_check();
}

1
src/machine/machine_at_ali1429.h Normal file
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@@ -0,0 +1 @@
void machine_at_ali1429_init(void);

20
src/cbm_io.c → src/machine/machine_at_commodore.c
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@@ -1,7 +1,11 @@
#include "ibm.h" #include "../ibm.h"
#include "io.h"
#include "lpt.h" #include "../io.h"
#include "serial.h" #include "../lpt.h"
#include "../serial.h"
#include "machine_at.h"
#include "machine_at_commodore.h"
static void cbm_io_write(uint16_t port, uint8_t val, void *p) static void cbm_io_write(uint16_t port, uint8_t val, void *p)
{ {
@@ -30,7 +34,13 @@ static void cbm_io_write(uint16_t port, uint8_t val, void *p)
} }
} }
void cbm_io_init() static void cbm_io_init()
{ {
io_sethandler(0x0230, 0x0001, NULL,NULL,NULL, cbm_io_write,NULL,NULL, NULL); io_sethandler(0x0230, 0x0001, NULL,NULL,NULL, cbm_io_write,NULL,NULL, NULL);
} }
void machine_at_cmdpc_init(void)
{
machine_at_ide_top_remap_init();
cbm_io_init();
}

1
src/machine/machine_at_commodore.h Normal file
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@@ -0,0 +1 @@
void machine_at_cmdpc_init(void);

26
src/compaq.c → src/machine/machine_at_compaq.c
View File

@@ -1,18 +1,20 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "device.h" #include "../mem.h"
#include "model.h"
#include "machine_at.h"
#include "machine_at_compaq.h"
/* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */ /* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */
static mem_mapping_t compaq_ram_mapping; static mem_mapping_t compaq_ram_mapping;
uint8_t compaq_read_ram(uint32_t addr, void *priv) static uint8_t compaq_read_ram(uint32_t addr, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr); addreadlookup(mem_logical_addr, addr);
@@ -20,7 +22,7 @@ uint8_t compaq_read_ram(uint32_t addr, void *priv)
} }
uint16_t compaq_read_ramw(uint32_t addr, void *priv) static uint16_t compaq_read_ramw(uint32_t addr, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr); addreadlookup(mem_logical_addr, addr);
@@ -28,7 +30,7 @@ uint16_t compaq_read_ramw(uint32_t addr, void *priv)
} }
uint32_t compaq_read_raml(uint32_t addr, void *priv) static uint32_t compaq_read_raml(uint32_t addr, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr); addreadlookup(mem_logical_addr, addr);
@@ -36,7 +38,7 @@ uint32_t compaq_read_raml(uint32_t addr, void *priv)
} }
void compaq_write_ram(uint32_t addr, uint8_t val, void *priv) static void compaq_write_ram(uint32_t addr, uint8_t val, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr); addwritelookup(mem_logical_addr, addr);
@@ -44,7 +46,7 @@ void compaq_write_ram(uint32_t addr, uint8_t val, void *priv)
} }
void compaq_write_ramw(uint32_t addr, uint16_t val, void *priv) static void compaq_write_ramw(uint32_t addr, uint16_t val, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr); addwritelookup(mem_logical_addr, addr);
@@ -52,7 +54,7 @@ void compaq_write_ramw(uint32_t addr, uint16_t val, void *priv)
} }
void compaq_write_raml(uint32_t addr, uint32_t val, void *priv) static void compaq_write_raml(uint32_t addr, uint32_t val, void *priv)
{ {
addr = (addr & 0x7ffff) + 0x80000; addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr); addwritelookup(mem_logical_addr, addr);
@@ -60,7 +62,7 @@ void compaq_write_raml(uint32_t addr, uint32_t val, void *priv)
} }
void compaq_init(void) static void compaq_init(void)
{ {
mem_mapping_add(&compaq_ram_mapping, 0xfa0000, 0x60000, mem_mapping_add(&compaq_ram_mapping, 0xfa0000, 0x60000,
compaq_read_ram, compaq_read_ramw, compaq_read_raml, compaq_read_ram, compaq_read_ramw, compaq_read_raml,

13
src/machine/machine_at_compaq.h Normal file
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@@ -0,0 +1,13 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* Emulation of the Compaq chips.
*
* Version: @(#)machine_at_compaq.h 1.0.0 2017/09/02
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca.
*/

23
src/headland.c → src/machine/machine_at_headland.c
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@@ -1,12 +1,14 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "mem.h" #include "../io.h"
#include "device.h" #include "../mem.h"
#include "model.h"
#include "machine_at.h"
#include "machine_at_headland.h"
static int headland_index; static int headland_index;
@@ -46,7 +48,14 @@ static uint8_t headland_read(uint16_t addr, void *priv)
} }
void headland_init(void) static void headland_init(void)
{ {
io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL); io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
} }
void machine_at_headland_init(void)
{
machine_at_ide_init();
headland_init();
}

1
src/machine/machine_at_headland.h Normal file
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@@ -0,0 +1 @@
void machine_at_headland_init(void);

21
src/neat.c → src/machine/machine_at_neat.c
View File

@@ -2,11 +2,13 @@
see COPYING for more details see COPYING for more details
*/ */
/*This is the chipset used in the AMI 286 clone model*/ /*This is the chipset used in the AMI 286 clone model*/
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "device.h" #include "../io.h"
#include "model.h"
#include "machine_at.h"
#include "machine_at_neat.h"
static uint8_t neat_regs[256]; static uint8_t neat_regs[256];
@@ -71,7 +73,7 @@ static uint8_t neat_readems(uint32_t addr)
#endif #endif
void neat_init(void) static void neat_init(void)
{ {
io_sethandler(0x0022, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL); io_sethandler(0x0022, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);
io_sethandler(0x0208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL); io_sethandler(0x0208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);
@@ -79,3 +81,10 @@ void neat_init(void)
io_sethandler(0x8208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL); io_sethandler(0x8208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);
io_sethandler(0xc208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL); io_sethandler(0xc208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);
} }
void machine_at_neat_init(void)
{
machine_at_ide_init();
neat_init();
}

1
src/machine/machine_at_neat.h Normal file
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@@ -0,0 +1 @@
void machine_at_neat_init(void);

23
src/opti495.c → src/machine/machine_at_opti495.c
View File

@@ -251,12 +251,14 @@ Note: the block address is forced to be a multiple of the block size by
ignoring the appropriate number of the least-significant bits ignoring the appropriate number of the least-significant bits
SeeAlso: #P0178,#P0187 SeeAlso: #P0178,#P0187
*/ */
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "mem.h" #include "../io.h"
#include "device.h" #include "../mem.h"
#include "model.h"
#include "machine_at.h"
#include "machine_at_opti495.h"
static uint8_t optiregs[0x10]; static uint8_t optiregs[0x10];
@@ -307,9 +309,16 @@ static uint8_t opti495_read(uint16_t addr, void *p)
} }
void opti495_init(void) static void opti495_init(void)
{ {
io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL); io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL); io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
optiregs[0x22-0x20] = 0x80; optiregs[0x22-0x20] = 0x80;
} }
void machine_at_opti495_init(void)
{
machine_at_ide_init();
opti495_init();
}

1
src/machine/machine_at_opti495.h Normal file
View File

@@ -0,0 +1 @@
void machine_at_opti495_init(void);

45
src/scat.c → src/machine/machine_at_scat.c
View File

@@ -1,12 +1,34 @@
/*This is the chipset used in the Award 286 clone model*/ /*This is the chipset used in the Award 286 clone model*/
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "scat.h"
#include "cpu/x86.h"
#include "cpu/cpu.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"
#include "../cpu/x86.h"
#include "machine_at.h"
#include "machine_at_scat.h"
#define SCAT_DMA_WAIT_STATE_CONTROL 0x01
#define SCAT_VERSION 0x40
#define SCAT_CLOCK_CONTROL 0x41
#define SCAT_PERIPHERAL_CONTROL 0x44
#define SCAT_MISCELLANEOUS_STATUS 0x45
#define SCAT_POWER_MANAGEMENT 0x46
#define SCAT_ROM_ENABLE 0x48
#define SCAT_RAM_WRITE_PROTECT 0x49
#define SCAT_SHADOW_RAM_ENABLE_1 0x4A
#define SCAT_SHADOW_RAM_ENABLE_2 0x4B
#define SCAT_SHADOW_RAM_ENABLE_3 0x4C
#define SCAT_DRAM_CONFIGURATION 0x4D
#define SCAT_EXTENDED_BOUNDARY 0x4E
#define SCAT_EMS_CONTROL 0x4F
typedef struct scat_t
{
uint8_t regs_2x8;
uint8_t regs_2x9;
} scat_t;
static uint8_t scat_regs[256]; static uint8_t scat_regs[256];
static int scat_index; static int scat_index;
@@ -466,7 +488,7 @@ void mem_write_scatems(uint32_t addr, uint8_t val, void *priv)
} }
void scat_init(void) static void scat_init(void)
{ {
int i; int i;
@@ -526,3 +548,10 @@ void scat_init(void)
scat_set_xms_bound(0); scat_set_xms_bound(0);
scat_shadow_state_update(); scat_shadow_state_update();
} }
void machine_at_scat_init(void)
{
machine_at_ide_init();
scat_init();
}

1
src/machine/machine_at_scat.h Normal file
View File

@@ -0,0 +1 @@
extern void machine_at_scat_init(void);

121
src/sis85c471.c → src/machine/machine_at_sis_85c471.c
View File

@@ -7,50 +7,54 @@
* Emulation of the SiS 85c471 chip. * Emulation of the SiS 85c471 chip.
* *
* SiS sis85c471 Super I/O Chip * SiS sis85c471 Super I/O Chip
* Used by Batman's Revenge * Used by DTK PKM-0038S E-2
* *
* Version: @(#)sis85c471.c 1.0.2 2017/08/24 * Version: @(#)sis85c471.c 1.0.3 2017/09/02
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca. * Copyright 2017 Miran Grca.
*/ */
#include "ibm.h" #include "../ibm.h"
#include "io.h"
#include "lpt.h" #include "../disc.h"
#include "disc.h" #include "../fdc.h"
#include "fdc.h" #include "../fdd.h"
#include "fdd.h" #include "../hdd/hdd_ide_at.h"
#include "serial.h" #include "../io.h"
#include "hdd/hdd_ide_at.h" #include "../lpt.h"
#include "sis85c471.h" #include "../memregs.h"
#include "../serial.h"
#include "machine_at.h"
#include "machine_at_sis_85c471.h"
static int sis85c471_curreg; static int sis_85c471_curreg;
static uint8_t sis85c471_regs[39]; static uint8_t sis_85c471_regs[39];
static void sis85c471_write(uint16_t port, uint8_t val, void *priv) static void sis_85c471_write(uint16_t port, uint8_t val, void *priv)
{ {
uint8_t index = (port & 1) ? 0 : 1; uint8_t index = (port & 1) ? 0 : 1;
uint8_t x; uint8_t x;
if (index) if (index)
{ {
if ((val >= 0x50) && (val <= 0x76)) sis85c471_curreg = val; if ((val >= 0x50) && (val <= 0x76)) sis_85c471_curreg = val;
return; return;
} }
else else
{ {
if ((sis85c471_curreg < 0x50) || (sis85c471_curreg > 0x76)) return; if ((sis_85c471_curreg < 0x50) || (sis_85c471_curreg > 0x76)) return;
x = val ^ sis85c471_regs[sis85c471_curreg - 0x50]; x = val ^ sis_85c471_regs[sis_85c471_curreg - 0x50];
/* Writes to 0x52 are blocked as otherwise, large hard disks don't read correctly. */ /* Writes to 0x52 are blocked as otherwise, large hard disks don't read correctly. */
if (sis85c471_curreg != 0x52) sis85c471_regs[sis85c471_curreg - 0x50] = val; if (sis_85c471_curreg != 0x52) sis_85c471_regs[sis_85c471_curreg - 0x50] = val;
goto process_value; goto process_value;
} }
return; return;
process_value: process_value:
switch(sis85c471_curreg) switch(sis_85c471_curreg)
{ {
case 0x73: case 0x73:
#if 0 #if 0
@@ -87,22 +91,22 @@ process_value:
break; break;
} }
sis85c471_curreg = 0; sis_85c471_curreg = 0;
} }
static uint8_t sis85c471_read(uint16_t port, void *priv) static uint8_t sis_85c471_read(uint16_t port, void *priv)
{ {
uint8_t index = (port & 1) ? 0 : 1; uint8_t index = (port & 1) ? 0 : 1;
uint8_t temp; uint8_t temp;
if (index) if (index)
return sis85c471_curreg; return sis_85c471_curreg;
else else
if ((sis85c471_curreg >= 0x50) && (sis85c471_curreg <= 0x76)) if ((sis_85c471_curreg >= 0x50) && (sis_85c471_curreg <= 0x76))
{ {
temp = sis85c471_regs[sis85c471_curreg - 0x50]; temp = sis_85c471_regs[sis_85c471_curreg - 0x50];
sis85c471_curreg = 0; sis_85c471_curreg = 0;
return temp; return temp;
} }
else else
@@ -110,67 +114,67 @@ static uint8_t sis85c471_read(uint16_t port, void *priv)
} }
void sis85c471_init(void) static void sis_85c471_init(void)
{ {
int i = 0; int i = 0;
lpt2_remove(); lpt2_remove();
sis85c471_curreg = 0; sis_85c471_curreg = 0;
for (i = 0; i < 0x27; i++) for (i = 0; i < 0x27; i++)
{ {
sis85c471_regs[i] = 0; sis_85c471_regs[i] = 0;
} }
sis85c471_regs[9] = 0x40; sis_85c471_regs[9] = 0x40;
switch (mem_size) switch (mem_size)
{ {
case 0: case 0:
case 1: case 1:
sis85c471_regs[9] |= 0; sis_85c471_regs[9] |= 0;
break; break;
case 2: case 2:
case 3: case 3:
sis85c471_regs[9] |= 1; sis_85c471_regs[9] |= 1;
break; break;
case 4: case 4:
sis85c471_regs[9] |= 2; sis_85c471_regs[9] |= 2;
break; break;
case 5: case 5:
sis85c471_regs[9] |= 0x20; sis_85c471_regs[9] |= 0x20;
break; break;
case 6: case 6:
case 7: case 7:
sis85c471_regs[9] |= 9; sis_85c471_regs[9] |= 9;
break; break;
case 8: case 8:
case 9: case 9:
sis85c471_regs[9] |= 4; sis_85c471_regs[9] |= 4;
break; break;
case 10: case 10:
case 11: case 11:
sis85c471_regs[9] |= 5; sis_85c471_regs[9] |= 5;
break; break;
case 12: case 12:
case 13: case 13:
case 14: case 14:
case 15: case 15:
sis85c471_regs[9] |= 0xB; sis_85c471_regs[9] |= 0xB;
break; break;
case 16: case 16:
sis85c471_regs[9] |= 0x13; sis_85c471_regs[9] |= 0x13;
break; break;
case 17: case 17:
sis85c471_regs[9] |= 0x21; sis_85c471_regs[9] |= 0x21;
break; break;
case 18: case 18:
case 19: case 19:
sis85c471_regs[9] |= 6; sis_85c471_regs[9] |= 6;
break; break;
case 20: case 20:
case 21: case 21:
case 22: case 22:
case 23: case 23:
sis85c471_regs[9] |= 0xD; sis_85c471_regs[9] |= 0xD;
break; break;
case 24: case 24:
case 25: case 25:
@@ -180,19 +184,19 @@ void sis85c471_init(void)
case 29: case 29:
case 30: case 30:
case 31: case 31:
sis85c471_regs[9] |= 0xE; sis_85c471_regs[9] |= 0xE;
break; break;
case 32: case 32:
case 33: case 33:
case 34: case 34:
case 35: case 35:
sis85c471_regs[9] |= 0x1B; sis_85c471_regs[9] |= 0x1B;
break; break;
case 36: case 36:
case 37: case 37:
case 38: case 38:
case 39: case 39:
sis85c471_regs[9] |= 0xF; sis_85c471_regs[9] |= 0xF;
break; break;
case 40: case 40:
case 41: case 41:
@@ -202,34 +206,43 @@ void sis85c471_init(void)
case 45: case 45:
case 46: case 46:
case 47: case 47:
sis85c471_regs[9] |= 0x17; sis_85c471_regs[9] |= 0x17;
break; break;
case 48: case 48:
sis85c471_regs[9] |= 0x1E; sis_85c471_regs[9] |= 0x1E;
break; break;
default: default:
if (mem_size < 64) if (mem_size < 64)
{ {
sis85c471_regs[9] |= 0x1E; sis_85c471_regs[9] |= 0x1E;
} }
else if ((mem_size >= 65) && (mem_size < 68)) else if ((mem_size >= 65) && (mem_size < 68))
{ {
sis85c471_regs[9] |= 0x22; sis_85c471_regs[9] |= 0x22;
} }
else else
{ {
sis85c471_regs[9] |= 0x24; sis_85c471_regs[9] |= 0x24;
} }
break; break;
} }
sis85c471_regs[0x11] = 9; sis_85c471_regs[0x11] = 9;
sis85c471_regs[0x12] = 0xFF; sis_85c471_regs[0x12] = 0xFF;
sis85c471_regs[0x23] = 0xF0; sis_85c471_regs[0x23] = 0xF0;
sis85c471_regs[0x26] = 1; sis_85c471_regs[0x26] = 1;
fdc_update_densel_polarity(1); fdc_update_densel_polarity(1);
fdc_update_densel_force(0); fdc_update_densel_force(0);
fdd_swap = 0; fdd_swap = 0;
io_sethandler(0x0022, 0x0002, sis85c471_read, NULL, NULL, sis85c471_write, NULL, NULL, NULL); io_sethandler(0x0022, 0x0002, sis_85c471_read, NULL, NULL, sis_85c471_write, NULL, NULL, NULL);
}
void machine_at_dtk486_init(void)
{
machine_at_ide_init();
memregs_init();
sis_85c471_init();
secondary_ide_check();
} }

4
src/sis85c471.h → src/machine/machine_at_sis_85c471.h
View File

@@ -6,10 +6,10 @@
* *
* Emulation of the SiS 85c471 chip. * Emulation of the SiS 85c471 chip.
* *
* Version: @(#)sis85c471.h 1.0.1 2017/08/23 * Version: @(#)machine_at_sis_85c471.h 1.0.2 2017/09/02
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca. * Copyright 2017 Miran Grca.
*/ */
extern void sis85c471_init(void); extern void machine_at_dtk486_init(void);

74
src/sis496.c → src/machine/machine_at_sis_85c496.c
View File

@@ -2,25 +2,30 @@
see COPYING for more details see COPYING for more details
*/ */
#include <stdlib.h> #include <stdlib.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../cpu/cpu.h"
#include "pci.h" #include "../fdc37c665.h"
#include "device.h" #include "../io.h"
#include "model.h" #include "../mem.h"
#include "../memregs.h"
#include "../pci.h"
#include "machine_at.h"
#include "machine_at_sis_85c496.h"
typedef struct sis496_t typedef struct sis_85c496_t
{ {
uint8_t pci_conf[256]; uint8_t pci_conf[256];
} sis496_t; } sis_85c496_t;
sis496_t sis496; sis_85c496_t sis496;
static void sis496_recalcmapping(void) static void sis_85c496_recalcmapping(void)
{ {
int c; int c;
@@ -54,7 +59,7 @@ static void sis496_recalcmapping(void)
} }
static void sis496_write(int func, int addr, uint8_t val, void *p) static void sis_85c496_write(int func, int addr, uint8_t val, void *p)
{ {
switch (addr) switch (addr)
{ {
@@ -62,14 +67,14 @@ static void sis496_write(int func, int addr, uint8_t val, void *p)
if ((sis496.pci_conf[0x44] & val) ^ 0xf0) if ((sis496.pci_conf[0x44] & val) ^ 0xf0)
{ {
sis496.pci_conf[0x44] = val; sis496.pci_conf[0x44] = val;
sis496_recalcmapping(); sis_85c496_recalcmapping();
} }
break; break;
case 0x45: /*Shadow configure*/ case 0x45: /*Shadow configure*/
if ((sis496.pci_conf[0x45] & val) ^ 0x01) if ((sis496.pci_conf[0x45] & val) ^ 0x01)
{ {
sis496.pci_conf[0x45] = val; sis496.pci_conf[0x45] = val;
sis496_recalcmapping(); sis_85c496_recalcmapping();
} }
break; break;
@@ -104,15 +109,15 @@ static void sis496_write(int func, int addr, uint8_t val, void *p)
} }
static uint8_t sis496_read(int func, int addr, void *p) static uint8_t sis_85c496_read(int func, int addr, void *p)
{ {
return sis496.pci_conf[addr]; return sis496.pci_conf[addr];
} }
static void sis496_reset(void) static void sis_85c496_reset(void)
{ {
memset(&sis496, 0, sizeof(sis496_t)); memset(&sis496, 0, sizeof(sis_85c496_t));
sis496.pci_conf[0x00] = 0x39; /*SiS*/ sis496.pci_conf[0x00] = 0x39; /*SiS*/
sis496.pci_conf[0x01] = 0x10; sis496.pci_conf[0x01] = 0x10;
@@ -135,28 +140,41 @@ static void sis496_reset(void)
} }
static void sis496_pci_reset(void) static void sis_85c496_pci_reset(void)
{ {
uint8_t val = 0; uint8_t val = 0;
val = sis496_read(0, 0x44, NULL); /* Read current value of 0x44. */ val = sis_85c496_read(0, 0x44, NULL); /* Read current value of 0x44. */
sis496_write(0, 0x44, val & 0xf, NULL); /* Turn off shadow BIOS but keep the lower 4 bits. */ sis_85c496_write(0, 0x44, val & 0xf, NULL); /* Turn off shadow BIOS but keep the lower 4 bits. */
} }
void sis496_init(void) static void sis_85c496_init(void)
{ {
pci_add_card(5, sis496_read, sis496_write, NULL); pci_add_card(5, sis_85c496_read, sis_85c496_write, NULL);
sis496_reset(); sis_85c496_reset();
pci_reset_handler.pci_master_reset = sis496_pci_reset; pci_reset_handler.pci_master_reset = sis_85c496_pci_reset;
} }
void sis496_close(void *p) static void machine_at_sis_85c496_common_init(void)
{ {
sis496_t *sis496 = (sis496_t *)p; machine_at_ide_init();
memregs_init();
free(sis496); pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x05, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x07, PCI_CARD_NORMAL, 4, 1, 2, 3);
sis_85c496_init();
}
void machine_at_r418_init(void)
{
machine_at_sis_85c496_common_init();
fdc37c665_init();
} }

1
src/machine/machine_at_sis_85c496.h Normal file
View File

@@ -0,0 +1 @@
extern void machine_at_r418_init(void);

171
src/sis50x.c → src/machine/machine_at_sis_85c50x.c
View File

@@ -6,45 +6,48 @@
* *
* Emulation of the SiS 50x PCI chips. * Emulation of the SiS 50x PCI chips.
* *
* Version: @(#)sis50x.c 1.0.1 2017/08/23 * Version: @(#)machine_at_sis_85c50x.c 1.0.2 2017/09/02
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca. * Copyright 2017 Miran Grca.
*/ */
#include <stdlib.h> #include <stdlib.h>
#include "ibm.h"
#include "device.h" #include "../ibm.h"
#include "io.h"
#include "mem.h" #include "../io.h"
#include "pci.h" #include "../mem.h"
#include "sis50x.h" #include "../pci.h"
#include "machine_at.h"
#include "machine_at_sis_85c50x.h"
typedef struct sis501_t typedef struct sis_85c501_t
{ {
uint8_t pci_conf[256]; uint8_t pci_conf[256];
uint8_t turbo_reg; uint8_t turbo_reg;
} sis501_t; } sis_85c501_t;
sis501_t sis501; sis_85c501_t sis_85c501;
typedef struct sis503_t typedef struct sis_85c503_t
{ {
uint8_t pci_conf[256]; uint8_t pci_conf[256];
} sis503_t; } sis_85c503_t;
sis503_t sis503; sis_85c503_t sis_85c503;
typedef struct sis50x_t typedef struct sis_85c50x_t
{ {
uint8_t isa_conf[12]; uint8_t isa_conf[12];
uint8_t reg; uint8_t reg;
} sis50x_isa_t; } sis_85c50x_isa_t;
sis50x_isa_t sis50x_isa; sis_85c50x_isa_t sis_85c50x_isa;
static void sis501_recalcmapping(void) static void sis_85c501_recalcmapping(void)
{ {
int c, d; int c, d;
@@ -53,9 +56,9 @@ static void sis501_recalcmapping(void)
for (d = 0; d < 4; d++) for (d = 0; d < 4; d++)
{ {
uint32_t base = 0xe0000 + (d << 14); uint32_t base = 0xe0000 + (d << 14);
if (sis501.pci_conf[0x54 + c] & (1 << (d + 4))) if (sis_85c501.pci_conf[0x54 + c] & (1 << (d + 4)))
{ {
switch (sis501.pci_conf[0x53] & 0x60) switch (sis_85c501.pci_conf[0x53] & 0x60)
{ {
case 0x00: case 0x00:
mem_set_mem_state(base, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL); mem_set_mem_state(base, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
@@ -81,9 +84,9 @@ static void sis501_recalcmapping(void)
} }
static void sis501_write(int func, int addr, uint8_t val, void *p) static void sis_85c501_write(int func, int addr, uint8_t val, void *p)
{ {
/* pclog("sis501_write : addr=%02x val=%02x\n", addr, val); */ /* pclog("sis_85c501_write : addr=%02x val=%02x\n", addr, val); */
if (func) if (func)
return; return;
@@ -113,21 +116,21 @@ static void sis501_write(int func, int addr, uint8_t val, void *p)
break; break;
case 0x54: /*Shadow configure*/ case 0x54: /*Shadow configure*/
if ((sis501.pci_conf[0x54] & val) ^ 0xf0) if ((sis_85c501.pci_conf[0x54] & val) ^ 0xf0)
{ {
sis501.pci_conf[0x54] = val; sis_85c501.pci_conf[0x54] = val;
sis501_recalcmapping(); sis_85c501_recalcmapping();
} }
break; break;
} }
sis501.pci_conf[addr] = val; sis_85c501.pci_conf[addr] = val;
} }
static void sis503_write(int func, int addr, uint8_t val, void *p) static void sis_85c503_write(int func, int addr, uint8_t val, void *p)
{ {
/* pclog("sis503_write : addr=%02x val=%02x\n", addr, val); */ /* pclog("sis_85c503_write : addr=%02x val=%02x\n", addr, val); */
if (func > 0) if (func > 0)
return; return;
@@ -187,126 +190,126 @@ static void sis503_write(int func, int addr, uint8_t val, void *p)
break; break;
} }
sis503.pci_conf[addr] = val; sis_85c503.pci_conf[addr] = val;
} }
static void sis50x_isa_write(uint16_t port, uint8_t val, void *priv) static void sis_85c50x_isa_write(uint16_t port, uint8_t val, void *priv)
{ {
if (port & 1) if (port & 1)
{ {
if (sis50x_isa.reg <= 0xB) sis50x_isa.isa_conf[sis50x_isa.reg] = val; if (sis_85c50x_isa.reg <= 0xB) sis_85c50x_isa.isa_conf[sis_85c50x_isa.reg] = val;
} }
else else
{ {
sis50x_isa.reg = val; sis_85c50x_isa.reg = val;
} }
} }
static uint8_t sis501_read(int func, int addr, void *p) static uint8_t sis_85c501_read(int func, int addr, void *p)
{ {
if (func) if (func)
return 0xff; return 0xff;
return sis501.pci_conf[addr]; return sis_85c501.pci_conf[addr];
} }
static uint8_t sis503_read(int func, int addr, void *p) static uint8_t sis_85c503_read(int func, int addr, void *p)
{ {
if (func > 0) if (func > 0)
return 0xff; return 0xff;
return sis503.pci_conf[addr]; return sis_85c503.pci_conf[addr];
} }
static uint8_t sis50x_isa_read(uint16_t port, void *priv) static uint8_t sis_85c50x_isa_read(uint16_t port, void *priv)
{ {
if (port & 1) if (port & 1)
{ {
if (sis50x_isa.reg <= 0xB) if (sis_85c50x_isa.reg <= 0xB)
return sis50x_isa.isa_conf[sis50x_isa.reg]; return sis_85c50x_isa.isa_conf[sis_85c50x_isa.reg];
else else
return 0xff; return 0xff;
} }
else else
{ {
return sis50x_isa.reg; return sis_85c50x_isa.reg;
} }
} }
static void sis501_reset(void) static void sis_85c501_reset(void)
{ {
memset(&sis501, 0, sizeof(sis501_t)); memset(&sis_85c501, 0, sizeof(sis_85c501_t));
sis501.pci_conf[0x00] = 0x39; /*SiS*/ sis_85c501.pci_conf[0x00] = 0x39; /*SiS*/
sis501.pci_conf[0x01] = 0x10; sis_85c501.pci_conf[0x01] = 0x10;
sis501.pci_conf[0x02] = 0x06; /*501/502*/ sis_85c501.pci_conf[0x02] = 0x06; /*501/502*/
sis501.pci_conf[0x03] = 0x04; sis_85c501.pci_conf[0x03] = 0x04;
sis501.pci_conf[0x04] = 7; sis_85c501.pci_conf[0x04] = 7;
sis501.pci_conf[0x05] = 0; sis_85c501.pci_conf[0x05] = 0;
sis501.pci_conf[0x06] = 0x80; sis_85c501.pci_conf[0x06] = 0x80;
sis501.pci_conf[0x07] = 0x02; sis_85c501.pci_conf[0x07] = 0x02;
sis501.pci_conf[0x08] = 0; /*Device revision*/ sis_85c501.pci_conf[0x08] = 0; /*Device revision*/
sis501.pci_conf[0x09] = 0x00; /*Device class (PCI bridge)*/ sis_85c501.pci_conf[0x09] = 0x00; /*Device class (PCI bridge)*/
sis501.pci_conf[0x0a] = 0x00; sis_85c501.pci_conf[0x0a] = 0x00;
sis501.pci_conf[0x0b] = 0x06; sis_85c501.pci_conf[0x0b] = 0x06;
sis501.pci_conf[0x0e] = 0x00; /*Single function device*/ sis_85c501.pci_conf[0x0e] = 0x00; /*Single function device*/
sis501.pci_conf[0x50] = 0xbc; sis_85c501.pci_conf[0x50] = 0xbc;
sis501.pci_conf[0x51] = 0xfb; sis_85c501.pci_conf[0x51] = 0xfb;
sis501.pci_conf[0x52] = 0xad; sis_85c501.pci_conf[0x52] = 0xad;
sis501.pci_conf[0x53] = 0xfe; sis_85c501.pci_conf[0x53] = 0xfe;
shadowbios = 1; shadowbios = 1;
} }
void sis501_init(void) static void sis_85c501_init(void)
{ {
pci_add_card(0, sis501_read, sis501_write, NULL); pci_add_card(0, sis_85c501_read, sis_85c501_write, NULL);
sis501_reset(); sis_85c501_reset();
pci_reset_handler.pci_master_reset = NULL; pci_reset_handler.pci_master_reset = NULL;
} }
void sis503_reset(void) static void sis_85c503_reset(void)
{ {
memset(&sis503, 0, sizeof(sis503_t)); memset(&sis_85c503, 0, sizeof(sis_85c503_t));
sis503.pci_conf[0x00] = 0x39; /*SiS*/ sis_85c503.pci_conf[0x00] = 0x39; /*SiS*/
sis503.pci_conf[0x01] = 0x10; sis_85c503.pci_conf[0x01] = 0x10;
sis503.pci_conf[0x02] = 0x08; /*503*/ sis_85c503.pci_conf[0x02] = 0x08; /*503*/
sis503.pci_conf[0x03] = 0x00; sis_85c503.pci_conf[0x03] = 0x00;
sis503.pci_conf[0x04] = 7; sis_85c503.pci_conf[0x04] = 7;
sis503.pci_conf[0x05] = 0; sis_85c503.pci_conf[0x05] = 0;
sis503.pci_conf[0x06] = 0x80; sis_85c503.pci_conf[0x06] = 0x80;
sis503.pci_conf[0x07] = 0x02; sis_85c503.pci_conf[0x07] = 0x02;
sis503.pci_conf[0x08] = 0; /*Device revision*/ sis_85c503.pci_conf[0x08] = 0; /*Device revision*/
sis503.pci_conf[0x09] = 0x00; /*Device class (PCI bridge)*/ sis_85c503.pci_conf[0x09] = 0x00; /*Device class (PCI bridge)*/
sis503.pci_conf[0x0a] = 0x01; sis_85c503.pci_conf[0x0a] = 0x01;
sis503.pci_conf[0x0b] = 0x06; sis_85c503.pci_conf[0x0b] = 0x06;
sis503.pci_conf[0x0e] = 0x00; /*Single function device*/ sis_85c503.pci_conf[0x0e] = 0x00; /*Single function device*/
sis503.pci_conf[0x41] = sis503.pci_conf[0x42] = sis503.pci_conf[0x43] = sis503.pci_conf[0x44] = 0x80; sis_85c503.pci_conf[0x41] = sis_85c503.pci_conf[0x42] = sis_85c503.pci_conf[0x43] = sis_85c503.pci_conf[0x44] = 0x80;
} }
void sis503_init(int card) static void sis_85c503_init(int card)
{ {
pci_add_card(card, sis503_read, sis503_write, NULL); pci_add_card(card, sis_85c503_read, sis_85c503_write, NULL);
sis503_reset(); sis_85c503_reset();
trc_init(); trc_init();
@@ -314,13 +317,13 @@ void sis503_init(int card)
port_92_add(); port_92_add();
pci_reset_handler.pci_set_reset = sis503_reset; pci_reset_handler.pci_set_reset = sis_85c503_reset;
} }
void sis50x_isa_init(void) static void sis_85c50x_isa_init(void)
{ {
memset(&sis50x_isa, 0, sizeof(sis50x_isa_t)); memset(&sis_85c50x_isa, 0, sizeof(sis_85c50x_isa_t));
io_sethandler(0x22, 0x0002, sis50x_isa_read, NULL, NULL, sis50x_isa_write, NULL, NULL, NULL); io_sethandler(0x22, 0x0002, sis_85c50x_isa_read, NULL, NULL, sis_85c50x_isa_write, NULL, NULL, NULL);
} }

6
src/sis50x.h → src/machine/machine_at_sis_85c50x.h
View File

@@ -6,12 +6,8 @@
* *
* Emulation of the SiS 50x PCI chips. * Emulation of the SiS 50x PCI chips.
* *
* Version: @(#)sis50x.h 1.0.1 2017/08/23 * Version: @(#)machine_at_sis_85c50x.h 1.0.2 2017/09/02
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca. * Copyright 2017 Miran Grca.
*/ */
void sis501_init(void);
void sis503_init(int card);
void sis50x_isa_init(void);

25
src/wd76c10.c → src/machine/machine_at_wd76c10.c
View File

@@ -1,13 +1,16 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
#include "ibm.h" #include "../ibm.h"
#include "disc.h"
#include "fdc.h" #include "../disc.h"
#include "io.h" #include "../fdc.h"
#include "mem.h" #include "../io.h"
#include "serial.h" #include "../mem.h"
#include "wd76c10.h" #include "../serial.h"
#include "machine_at.h"
#include "machine_at_wd76c10.h"
static uint16_t wd76c10_0092; static uint16_t wd76c10_0092;
@@ -114,7 +117,7 @@ wd76c10_writeb(uint16_t port, uint8_t val, void *priv)
} }
void wd76c10_init(void) static void wd76c10_init(void)
{ {
io_sethandler(0x0092, 2, io_sethandler(0x0092, 2,
wd76c10_readb, wd76c10_read, NULL, wd76c10_readb, wd76c10_read, NULL,
@@ -129,3 +132,9 @@ void wd76c10_init(void)
wd76c10_readb, wd76c10_read, NULL, wd76c10_readb, wd76c10_read, NULL,
wd76c10_writeb, wd76c10_write, NULL, NULL); wd76c10_writeb, wd76c10_write, NULL, NULL);
} }
void machine_at_wd76c10_init(void)
{
machine_at_ide_init();
wd76c10_init();
}

2
src/wd76c10.h → src/machine/machine_at_wd76c10.h
View File

@@ -1,4 +1,4 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
extern void wd76c10_init(void); extern void machine_at_wd76c10_init(void);

37
src/machine/machine_common.c Normal file
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@@ -0,0 +1,37 @@
#include "../ibm.h"
#include "../dma.h"
#include "../disc.h"
#include "../fdd.h"
#include "../fdc.h"
#include "../lpt.h"
#include "../pic.h"
#include "../pit.h"
#include "../serial.h"
#include "machine_common.h"
void machine_common_init(void)
{
/* System devices first. */
dma_init();
pic_init();
pit_init();
fdc_add();
if (lpt_enabled)
{
lpt_init();
}
if (serial_enabled[0])
{
serial_setup(1, SERIAL1_ADDR, SERIAL1_IRQ);
}
if (serial_enabled[1])
{
serial_setup(2, SERIAL2_ADDR, SERIAL2_IRQ);
}
}

1
src/machine/machine_common.h Normal file
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@@ -0,0 +1 @@
extern void machine_common_init(void);

38
src/jim.c → src/machine/machine_europc.c
View File

@@ -3,14 +3,21 @@
*/ */
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include "ibm.h"
#include "cpu/cpu.h" #include "../ibm.h"
#include "io.h"
#include "device.h" #include "../cpu/cpu.h"
#include "jim.h" #include "../io.h"
#include "mem.h" #include "../device.h"
#include "model.h" #include "../gameport.h"
#include "rom.h" #include "../keyboard_xt.h"
#include "../lpt.h"
#include "../mem.h"
#include "../nmi.h"
#include "../rom.h"
#include "machine_common.h"
#include "machine_europc.h"
uint8_t europcdat[16]; uint8_t europcdat[16];
@@ -104,7 +111,7 @@ static uint8_t readjim(uint16_t addr, void *p)
} }
void jim_init(void) static void jim_init(void)
{ {
uint8_t viddat; uint8_t viddat;
memset(europc_rtc.dat,0,16); memset(europc_rtc.dat,0,16);
@@ -122,3 +129,16 @@ void jim_init(void)
europc_rtc.dat[0xD]=viddat; /*Checksum*/ europc_rtc.dat[0xD]=viddat; /*Checksum*/
io_sethandler(0x250, 0x10, readjim, NULL, NULL, writejim, NULL, NULL, NULL); io_sethandler(0x250, 0x10, readjim, NULL, NULL, writejim, NULL, NULL, NULL);
} }
void machine_europc_init(void)
{
machine_common_init();
mem_add_bios();
lpt3_init(0x3bc);
jim_init();
keyboard_xt_init();
nmi_init();
if (joystick_type != 7)
device_add(&gameport_device);
}

3
src/machine/machine_europc.h Normal file
View File

@@ -0,0 +1,3 @@
void jim_save_nvr(void);
void machine_europc_init(void);

47
src/machine/machine_olivetti_m24.c Normal file
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@@ -0,0 +1,47 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../device.h"
#include "../gameport.h"
#include "../keyboard_olim24.h"
#include "../mem.h"
#include "../nmi.h"
#include "../nvr.h"
#include "../io.h"
#include "machine_common.h"
#include "machine_olivetti_m24.h"
static uint8_t olivetti_m24_read(uint16_t port, void *priv)
{
switch (port)
{
case 0x66:
return 0x00;
case 0x67:
return 0x20 | 0x40 | 0x0C;
}
return 0xff;
}
static void olivetti_m24_init(void)
{
io_sethandler(0x0066, 0x0002, olivetti_m24_read, NULL, NULL, NULL, NULL, NULL, NULL);
}
void machine_olim24_init(void)
{
machine_common_init();
mem_add_bios();
keyboard_olim24_init();
nvr_init();
olivetti_m24_init();
nmi_init();
if (joystick_type != 7) device_add(&gameport_device);
}

1
src/machine/machine_olivetti_m24.h Normal file
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@@ -0,0 +1 @@
void machine_olim24_init(void);

29
src/machine/machine_pcjr.c Normal file
View File

@@ -0,0 +1,29 @@
#include "../ibm.h"
#include "../device.h"
#include "../disc.h"
#include "../fdc.h"
#include "../fdd.h"
#include "../keyboard_pcjr.h"
#include "../mem.h"
#include "../nmi.h"
#include "../pic.h"
#include "../pit.h"
#include "../serial.h"
#include "../sound/snd_sn76489.h"
#include "machine_pcjr.h"
void machine_pcjr_init(void)
{
mem_add_bios();
fdc_add_pcjr();
pic_init();
pit_init();
pit_set_out_func(&pit, 0, pit_irq0_timer_pcjr);
if (serial_enabled[0])
serial_setup(1, 0x2f8, 3);
keyboard_pcjr_init();
device_add(&sn76489_device);
nmi_mask = 0x80;
}

1
src/machine/machine_pcjr.h Normal file
View File

@@ -0,0 +1 @@
void machine_pcjr_init(void);

82
src/ps1.c → src/machine/machine_ps1.c
View File

@@ -1,15 +1,29 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "mem.h" #include "../device.h"
#include "rom.h" #include "../disc.h"
#include "device.h" #include "../dma.h"
#include "model.h" #include "../gameport.h"
#include "lpt.h" #include "../hdd/hdd_ide_at.h"
#include "serial.h" #include "../fdd.h"
#include "../fdc.h"
#include "../io.h"
#include "../keyboard_at.h"
#include "../lpt.h"
#include "../mem.h"
#include "../nvr.h"
#include "../pic.h"
#include "../pit.h"
#include "../rom.h"
#include "../serial.h"
#include "../sound/snd_ps1.h"
#include "machine_common.h"
#include "machine_ps1.h"
static rom_t ps1_high_rom; static rom_t ps1_high_rom;
@@ -284,7 +298,7 @@ void ps1_m2121_write(uint16_t port, uint8_t val, void *p)
} }
} }
void ps1mb_m2121_init(void) static void ps1mb_m2121_init(void)
{ {
io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL); io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL); io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
@@ -308,7 +322,7 @@ void ps1mb_m2121_init(void)
mem_remap_top_384k(); mem_remap_top_384k();
} }
void ps1mb_m2133_init(void) static void ps1mb_m2133_init(void)
{ {
io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL); io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL); io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
@@ -323,3 +337,49 @@ void ps1mb_m2133_init(void)
mem_remap_top_384k(); mem_remap_top_384k();
} }
static void machine_ps1_common_init(void)
{
AT = 1;
machine_common_init();
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
if (romset != ROM_IBMPS1_2011)
{
ide_init();
}
keyboard_at_init();
nvr_init();
pic2_init();
if (romset != ROM_IBMPS1_2133)
{
fdc_set_dskchg_activelow();
device_add(&ps1_audio_device);
}
/*PS/1 audio uses ports 200h and 202-207h, so only initialise gameport on 201h*/
if (joystick_type != 7)
device_add(&gameport_201_device);
}
void machine_ps1_m2011_init(void)
{
machine_ps1_common_init();
ps1mb_init();
mem_remap_top_384k();
}
void machine_ps1_m2121_init(void)
{
machine_ps1_common_init();
ps1mb_m2121_init();
fdc_set_ps1();
}
void machine_ps1_m2133_init(void)
{
machine_ps1_common_init();
ps1mb_m2133_init();
}

3
src/machine/machine_ps1.h Normal file
View File

@@ -0,0 +1,3 @@
void machine_ps1_m2011_init(void);
void machine_ps1_m2121_init(void);
void machine_ps1_m2133_init(void);

49
src/ps2.c → src/machine/machine_ps2_isa.c
View File

@@ -1,12 +1,24 @@
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "mem.h" #include "../device.h"
#include "rom.h" #include "../disc.h"
#include "device.h" #include "../dma.h"
#include "model.h" #include "../fdd.h"
#include "lpt.h" #include "../fdc.h"
#include "serial.h" #include "../io.h"
#include "../keyboard.h"
#include "../keyboard_at.h"
#include "../lpt.h"
#include "../mem.h"
#include "../nvr.h"
#include "../pic.h"
#include "../pit.h"
#include "../rom.h"
#include "../serial.h"
#include "machine_common.h"
#include "machine_ps2_isa.h"
static uint8_t ps2_92, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190; static uint8_t ps2_92, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190;
@@ -120,7 +132,7 @@ static void ps2_write(uint16_t port, uint8_t val, void *p)
} }
void ps2board_init(void) static void ps2board_init(void)
{ {
io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0092, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
@@ -138,3 +150,20 @@ void ps2board_init(void)
memset(&ps2_hd, 0, sizeof(ps2_hd)); memset(&ps2_hd, 0, sizeof(ps2_hd));
} }
void machine_ps2_m30_286_init(void)
{
AT = 1;
machine_common_init();
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
keyboard_at_init();
nvr_init();
pic2_init();
ps2board_init();
fdc_set_dskchg_activelow();
fdc_set_ps1();
}

1
src/machine/machine_ps2_isa.h Normal file
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@@ -0,0 +1 @@
void machine_ps2_m30_286_init(void);

84
src/ps2_mca.c → src/machine/machine_ps2_mca.c
View File

@@ -1,15 +1,24 @@
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "cpu/x86.h" #include "../cpu/cpu.h"
#include "io.h" #include "../cpu/x86.h"
#include "mca.h" #include "../device.h"
#include "mem.h" #include "../dma.h"
#include "rom.h" #include "../io.h"
#include "device.h" #include "../keyboard_at.h"
#include "lpt.h" #include "../lpt.h"
#include "ps2_mca.h" #include "../mca.h"
#include "ps2_nvr.h" #include "../mem.h"
#include "serial.h" #include "../mouse.h"
#include "../nvr.h"
#include "../pic.h"
#include "../pit.h"
#include "../rom.h"
#include "../ps2_nvr.h"
#include "../serial.h"
#include "machine_common.h"
#include "machine_ps2_mca.h"
static struct static struct
@@ -555,7 +564,7 @@ static void ps2_mca_board_common_init()
lpt1_init(0x3bc); lpt1_init(0x3bc);
} }
void ps2_mca_board_model_50_init() static void ps2_mca_board_model_50_init()
{ {
ps2_mca_board_common_init(); ps2_mca_board_common_init();
@@ -566,7 +575,7 @@ void ps2_mca_board_model_50_init()
ps2.planar_write = model_50_write; ps2.planar_write = model_50_write;
} }
void ps2_mca_board_model_55sx_init() static void ps2_mca_board_model_55sx_init()
{ {
ps2_mca_board_common_init(); ps2_mca_board_common_init();
@@ -690,7 +699,7 @@ static void ps2_mem_expansion_write(int port, uint8_t val, void *p)
mem_mapping_disable(&ps2.expansion_mapping); mem_mapping_disable(&ps2.expansion_mapping);
} }
void ps2_mca_board_model_80_type2_init() static void ps2_mca_board_model_80_type2_init()
{ {
ps2_mca_board_common_init(); ps2_mca_board_common_init();
@@ -790,3 +799,48 @@ void ps2_mca_board_model_80_type2_init()
mem_mapping_disable(&ps2.expansion_mapping); mem_mapping_disable(&ps2.expansion_mapping);
} }
} }
static void machine_ps2_common_init(void)
{
AT = 1;
machine_common_init();
mem_add_bios();
dma16_init();
ps2_dma_init();
keyboard_at_init();
keyboard_at_init_ps2();
mouse_ps2_init();
nvr_init();
pic2_init();
pit_ps2_init();
}
void machine_ps2_model_50_init(void)
{
machine_ps2_common_init();
ps2_mca_board_model_50_init();
}
void machine_ps2_model_55sx_init(void)
{
machine_ps2_common_init();
ps2_mca_board_model_55sx_init();
}
void machine_ps2_model_80_init(void)
{
machine_ps2_common_init();
ps2_mca_board_model_80_type2_init();
}
void machine_ps2_model_80_486_init(void)
{
machine_ps2_common_init();
ps2_mca_board_model_80_type2_init();
}

4
src/machine/machine_ps2_mca.h Normal file
View File

@@ -0,0 +1,4 @@
extern void machine_ps2_model_50_init(void);
extern void machine_ps2_model_55sx_init(void);
extern void machine_ps2_model_80_init(void);
extern void machine_ps2_model_80_486_init(void);

44
src/machine/machine_tandy.c Normal file
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@@ -0,0 +1,44 @@
#include "../ibm.h"
#include "../device.h"
#include "../gameport.h"
#include "../keyboard_xt.h"
#include "../mem.h"
#include "../nmi.h"
#include "../tandy_eeprom.h"
#include "../tandy_rom.h"
#include "../sound/snd_pssj.h"
#include "../sound/snd_sn76489.h"
#include "machine_common.h"
void machine_tandy1k_init(void)
{
TANDY = 1;
machine_common_init();
mem_add_bios();
keyboard_tandy_init();
if (romset == ROM_TANDY)
device_add(&sn76489_device);
else
device_add(&ncr8496_device);
nmi_init();
if (romset != ROM_TANDY)
device_add(&tandy_eeprom_device);
if (joystick_type != 7)
device_add(&gameport_device);
}
void machine_tandy1ksl2_init(void)
{
machine_common_init();
mem_add_bios();
keyboard_tandy_init();
device_add(&pssj_device);
nmi_init();
device_add(&tandy_rom_device);
device_add(&tandy_eeprom_device);
if (joystick_type != 7) device_add(&gameport_device);
}

2
src/machine/machine_tandy.h Normal file
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@@ -0,0 +1,2 @@
void machine_tandy1k_init(void);
void machine_tandy1ksl2_init(void);

29
src/machine/machine_xt.c Normal file
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@@ -0,0 +1,29 @@
#include "../ibm.h"
#include "../bugger.h"
#include "../device.h"
#include "../gameport.h"
#include "../keyboard_xt.h"
#include "../mem.h"
#include "../nmi.h"
#include "../pit.h"
#include "machine_common.h"
#include "machine_xt.h"
void machine_xt_init(void)
{
machine_common_init();
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_xt);
keyboard_xt_init();
nmi_init();
if (joystick_type != 7)
device_add(&gameport_device);
if (bugger_enabled)
bugger_init();
}

1
src/machine/machine_xt.h Normal file
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@@ -0,0 +1 @@
void machine_xt_init(void);

29
src/laserxt.c → src/machine/machine_xt_laserxt.c
View File

@@ -1,10 +1,12 @@
/*This is the chipset used in the LaserXT series model*/ /*This is the chipset used in the LaserXT series model*/
#include "ibm.h" #include "../ibm.h"
#include "cpu/cpu.h"
#include "io.h" #include "../cpu/cpu.h"
#include "mem.h" #include "../io.h"
#include "device.h" #include "../mem.h"
#include "model.h"
#include "machine_xt.h"
#include "machine_xt_laserxt.h"
static int laserxt_emspage[4]; static int laserxt_emspage[4];
@@ -36,15 +38,12 @@ static void laserxt_write(uint16_t port, uint8_t val, void *priv)
{ {
mem_mapping_enable(&laserxt_ems_mapping[port >> 14]); mem_mapping_enable(&laserxt_ems_mapping[port >> 14]);
vaddr = get_laserxt_ems_addr(paddr); vaddr = get_laserxt_ems_addr(paddr);
//pclog("Mapping address %05X to %06X\n", paddr, vaddr);
mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr); mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr);
} }
else else
{ {
//pclog("Unmap address %05X\n", paddr);
mem_mapping_disable(&laserxt_ems_mapping[port >> 14]); mem_mapping_disable(&laserxt_ems_mapping[port >> 14]);
} }
//pclog("Write LaserXT port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc);
flushmmucache(); flushmmucache();
break; break;
case 0x0209: case 0x4209: case 0x8209: case 0xC209: case 0x0209: case 0x4209: case 0x8209: case 0xC209:
@@ -54,7 +53,6 @@ static void laserxt_write(uint16_t port, uint8_t val, void *priv)
{ {
laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i); laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i);
} }
//pclog("Set base_index to %d\n", laserxt_ems_baseaddr_index);
if(laserxt_ems_baseaddr_index < 3) if(laserxt_ems_baseaddr_index < 3)
{ {
mem_mapping_disable(&romext_mapping); mem_mapping_disable(&romext_mapping);
@@ -68,7 +66,6 @@ static void laserxt_write(uint16_t port, uint8_t val, void *priv)
mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000); mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000); mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000); mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000);
//pclog("Write LaserXT port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc);
flushmmucache(); flushmmucache();
break; break;
} }
@@ -80,7 +77,6 @@ static uint8_t laserxt_read(uint16_t port, void *priv)
switch (port) switch (port)
{ {
case 0x0208: case 0x4208: case 0x8208: case 0xC208: case 0x0208: case 0x4208: case 0x8208: case 0xC208:
//pclog("Read LaserXT port %04X at %04X:%04X\n", port, CS, cpu_state.pc);
return laserxt_emspage[port >> 14]; return laserxt_emspage[port >> 14];
case 0x0209: case 0x4209: case 0x8209: case 0xC209: case 0x0209: case 0x4209: case 0x8209: case 0xC209:
return laserxt_emscontrol[port >> 14]; return laserxt_emscontrol[port >> 14];
@@ -108,7 +104,7 @@ static uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
} }
void laserxt_init(void) static void laserxt_init(void)
{ {
int i; int i;
@@ -129,3 +125,10 @@ void laserxt_init(void)
} }
mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
} }
void machine_xt_laserxt_init(void)
{
machine_xt_init();
laserxt_init();
}

1
src/machine/machine_xt_laserxt.h Normal file
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@@ -0,0 +1 @@
void machine_xt_laserxt_init(void);

1120
src/model.c
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File diff suppressed because it is too large Load Diff

109
src/model.h
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@@ -1,109 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Handling of the emulated machines.
*
* Version: @(#)model.h 1.0.2 2017/06/17
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#ifndef EMU_MODEL_H
# define EMU_MODEL_H
#define MODEL_AT 1
#define MODEL_PS2 2
#define MODEL_AMSTRAD 4
#define MODEL_OLIM24 8
#define MODEL_HAS_IDE 16
#define MODEL_MCA 32
#define MODEL_PCI 64
#define MODEL_PS2_HDD 128
#define MODEL_NEC 256
#define MODEL_FUJITSU 512
#define MODEL_RM 1024
typedef struct {
char name[64];
int id;
char internal_name[24];
struct {
char name[16];
CPU *cpus;
} cpu[5];
int fixed_gfxcard;
int flags;
int min_ram, max_ram;
int ram_granularity;
int nvrmask;
void (*init)(void);
device_t *(*get_device)(void);
} MODEL;
/* Global variables. */
extern MODEL models[];
extern int model;
/* Core functions. */
extern int model_count(void);
extern int model_getromset(void);
extern int model_getmodel(int romset);
extern char *model_getname(void);
extern char *model_get_internal_name(void);
extern int model_get_model_from_internal_name(char *s);
extern void model_init(void);
extern device_t *model_getdevice(int model);
extern int model_getromset_ex(int m);
extern char *model_get_internal_name_ex(int m);
extern int model_get_nvrmask(int m);
/* Global variables for boards and systems. */
#ifdef EMU_MOUSE_H
extern mouse_t mouse_amstrad;
extern mouse_t mouse_olim24;
#endif
/* Initialization functions for boards and systems. */
extern void acer386sx_init(void);
extern void acerm3a_io_init(void);
extern void ali1429_init(void);
extern void ali1429_reset(void);
extern void amstrad_init(void);
extern void compaq_init(void);
extern void headland_init(void);
extern void i430fx_init(void);
extern void i430hx_init(void);
extern void i430lx_init(void);
extern void i430nx_init(void);
extern void i430vx_init(void);
extern void i440fx_init(void);
extern void jim_init(void);
extern void laserxt_init(void);
extern void neat_init(void);
extern void olivetti_m24_init(void);
extern void opti495_init(void);
extern void ps1mb_init(void);
extern void ps1mb_m2121_init(void);
extern void ps1mb_m2133_init(void);
extern void ps2board_init(void);
extern void scat_init(void);
extern void sis496_init(void);
#endif /*EMU_MODEL_H*/

4
src/mouse.c
View File

@@ -8,7 +8,7 @@
* *
* Common driver module for MOUSE devices. * Common driver module for MOUSE devices.
* *
* Version: @(#)mouse.c 1.0.6 2017/08/23 * Version: @(#)mouse.c 1.0.7 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,7 @@
#include "cpu/cpu.h" #include "cpu/cpu.h"
#include "device.h" #include "device.h"
#include "mouse.h" #include "mouse.h"
#include "model.h" #include "machine/machine.h"
static mouse_t mouse_none = { static mouse_t mouse_none = {

46
src/nvr.c
View File

@@ -25,9 +25,9 @@
#include "cpu/cpu.h" #include "cpu/cpu.h"
#include "device.h" #include "device.h"
#include "io.h" #include "io.h"
#include "jim.h" #include "machine/machine.h"
#include "machine/machine_europc.h"
#include "mem.h" #include "mem.h"
#include "model.h"
#include "nmi.h" #include "nmi.h"
#include "nvr.h" #include "nvr.h"
#include "pic.h" #include "pic.h"
@@ -36,7 +36,7 @@
#include "rtc.h" #include "rtc.h"
int oldmodel; int oldmachine;
int nvrmask=63; int nvrmask=63;
char nvrram[128]; char nvrram[128];
int nvraddr; int nvraddr;
@@ -220,25 +220,25 @@ void loadnvr(void)
FILE *f = NULL; FILE *f = NULL;
int c; int c;
nvrmask=63; nvrmask=63;
oldmodel = model; oldmachine = machine;
wchar_t *model_name; wchar_t *machine_name;
wchar_t *nvr_name; wchar_t *nvr_name;
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(model)) << 1) + 2); machine_name = (wchar_t *) malloc((strlen(machine_get_internal_name_ex(machine)) << 1) + 2);
mbstowcs(model_name, model_get_internal_name_ex(model), strlen(model_get_internal_name_ex(model)) + 1); mbstowcs(machine_name, machine_get_internal_name_ex(machine), strlen(machine_get_internal_name_ex(machine)) + 1);
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8); nvr_name = (wchar_t *) malloc((wcslen(machine_name) << 1) + 2 + 8);
_swprintf(nvr_name, L"%s.nvr", model_name); _swprintf(nvr_name, L"%s.nvr", machine_name);
pclog_w(L"Opening NVR file: %s...\n", nvr_name); pclog_w(L"Opening NVR file: %s...\n", nvr_name);
if (model_get_nvrmask(model) != 0) if (machine_get_nvrmask(machine) != 0)
{ {
f = nvrfopen(nvr_name, L"rb"); f = nvrfopen(nvr_name, L"rb");
nvrmask = model_get_nvrmask(model); nvrmask = machine_get_nvrmask(machine);
} }
if (!f || (model_get_nvrmask(model) == 0)) if (!f || (machine_get_nvrmask(machine) == 0))
{ {
if (f) if (f)
{ {
@@ -255,7 +255,7 @@ void loadnvr(void)
} }
free(nvr_name); free(nvr_name);
free(model_name); free(machine_name);
return; return;
} }
fread(nvrram,128,1,f); fread(nvrram,128,1,f);
@@ -270,14 +270,14 @@ void loadnvr(void)
rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT)); rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
free(nvr_name); free(nvr_name);
free(model_name); free(machine_name);
} }
void savenvr(void) void savenvr(void)
{ {
FILE *f = NULL; FILE *f = NULL;
wchar_t *model_name; wchar_t *machine_name;
wchar_t *nvr_name; wchar_t *nvr_name;
if (romset == ROM_EUROPC) if (romset == ROM_EUROPC)
@@ -286,19 +286,19 @@ void savenvr(void)
return; return;
} }
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(oldmodel)) << 1) + 2); machine_name = (wchar_t *) malloc((strlen(machine_get_internal_name_ex(oldmachine)) << 1) + 2);
mbstowcs(model_name, model_get_internal_name_ex(oldmodel), strlen(model_get_internal_name_ex(oldmodel)) + 1); mbstowcs(machine_name, machine_get_internal_name_ex(oldmachine), strlen(machine_get_internal_name_ex(oldmachine)) + 1);
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8); nvr_name = (wchar_t *) malloc((wcslen(machine_name) << 1) + 2 + 8);
_swprintf(nvr_name, L"%s.nvr", model_name); _swprintf(nvr_name, L"%s.nvr", machine_name);
pclog_w(L"Saving NVR file: %s...\n", nvr_name); pclog_w(L"Saving NVR file: %s...\n", nvr_name);
if (model_get_nvrmask(oldmodel) != 0) if (machine_get_nvrmask(oldmachine) != 0)
{ {
f = nvrfopen(nvr_name, L"wb"); f = nvrfopen(nvr_name, L"wb");
} }
if (!f || (model_get_nvrmask(oldmodel) == 0)) if (!f || (machine_get_nvrmask(oldmachine) == 0))
{ {
if (f) if (f)
{ {
@@ -306,7 +306,7 @@ void savenvr(void)
} }
free(nvr_name); free(nvr_name);
free(model_name); free(machine_name);
return; return;
} }
@@ -314,7 +314,7 @@ void savenvr(void)
fclose(f); fclose(f);
free(nvr_name); free(nvr_name);
free(model_name); free(machine_name);
} }
void nvr_init(void) void nvr_init(void)

27
src/olivetti_m24.c
View File

@@ -1,27 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "device.h"
#include "model.h"
static uint8_t olivetti_m24_read(uint16_t port, void *priv)
{
switch (port)
{
case 0x66:
return 0x00;
case 0x67:
return 0x20 | 0x40 | 0x0C;
}
return 0xff;
}
void olivetti_m24_init(void)
{
io_sethandler(0x0066, 0x0002, olivetti_m24_read, NULL, NULL, NULL, NULL, NULL, NULL);
}

28
src/pc.c
View File

@@ -30,7 +30,7 @@
#include "pit.h" #include "pit.h"
#include "timer.h" #include "timer.h"
#include "device.h" #include "device.h"
#include "model.h" #include "machine/machine.h"
#include "disc.h" #include "disc.h"
#include "disc_86f.h" #include "disc_86f.h"
@@ -277,7 +277,7 @@ void pc_reset(void)
serial_reset(); serial_reset();
if (AT) if (AT)
setpitclock(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed); setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
else else
setpitclock(14318184.0); setpitclock(14318184.0);
} }
@@ -517,7 +517,7 @@ void resetpchard_init(void)
#ifndef WALTJE #ifndef WALTJE
serial_init(); serial_init();
#endif #endif
model_init(); machine_init();
video_init(); video_init();
speaker_init(); speaker_init();
@@ -593,7 +593,7 @@ int serial_fifo_read, serial_fifo_write;
int emu_fps = 0; int emu_fps = 0;
static wchar_t wmodel[2048]; static wchar_t wmachine[2048];
static wchar_t wcpu[2048]; static wchar_t wcpu[2048];
void runpc(void) void runpc(void)
@@ -602,22 +602,22 @@ void runpc(void)
int done=0; int done=0;
startblit(); startblit();
clockrate = models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed; clockrate = machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed;
if (is386) if (is386)
{ {
if (cpu_use_dynarec) if (cpu_use_dynarec)
exec386_dynarec(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100); exec386_dynarec(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100);
else else
exec386(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100); exec386(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100);
} }
else if (AT) else if (AT)
{ {
exec386(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100); exec386(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100);
} }
else else
{ {
execx86(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100); execx86(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed / 100);
} }
keyboard_process(); keyboard_process();
@@ -673,9 +673,9 @@ void runpc(void)
if (win_title_update) if (win_title_update)
{ {
win_title_update=0; win_title_update=0;
mbstowcs(wmodel, model_getname(), strlen(model_getname()) + 1); mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1);
mbstowcs(wcpu, models[model].cpu[cpu_manufacturer].cpus[cpu].name, strlen(models[model].cpu[cpu_manufacturer].cpus[cpu].name) + 1); mbstowcs(wcpu, machines[machine].cpu[cpu_manufacturer].cpus[cpu].name, strlen(machines[machine].cpu[cpu_manufacturer].cpus[cpu].name) + 1);
_swprintf(s, L"%s v%s - %i%% - %s - %s - %s", EMU_NAME_W, EMU_VERSION_W, fps, wmodel, wcpu, (!mousecapture) ? plat_get_string_from_id(IDS_2077) : ((mouse_get_type(mouse_type) & MOUSE_TYPE_3BUTTON) ? plat_get_string_from_id(IDS_2078) : plat_get_string_from_id(IDS_2079))); _swprintf(s, L"%s v%s - %i%% - %s - %s - %s", EMU_NAME_W, EMU_VERSION_W, fps, wmachine, wcpu, (!mousecapture) ? plat_get_string_from_id(IDS_2077) : ((mouse_get_type(mouse_type) & MOUSE_TYPE_3BUTTON) ? plat_get_string_from_id(IDS_2078) : plat_get_string_from_id(IDS_2079)));
set_window_title(s); set_window_title(s);
} }
done++; done++;
@@ -688,7 +688,7 @@ void fullspeed(void)
{ {
printf("Set fullspeed - %i %i %i\n",is386,AT,cpuspeed2); printf("Set fullspeed - %i %i %i\n",is386,AT,cpuspeed2);
if (AT) if (AT)
setpitclock(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed); setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
else else
setpitclock(14318184.0); setpitclock(14318184.0);
} }
@@ -699,7 +699,7 @@ void fullspeed(void)
void speedchanged(void) void speedchanged(void)
{ {
if (AT) if (AT)
setpitclock(models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed); setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
else else
setpitclock(14318184.0); setpitclock(14318184.0);
nvr_recalc(); nvr_recalc();

78
src/pci.c
View File

@@ -1,7 +1,13 @@
#include <stdarg.h> #include <stdarg.h>
#include "ibm.h" #include "ibm.h"
#include "cdrom.h"
#include "disc.h"
#include "fdc.h"
#include "hdd/hdd_ide_at.h"
#include "io.h" #include "io.h"
#include "keyboard_at.h"
#include "mem.h" #include "mem.h"
#include "pic.h" #include "pic.h"
#include "pci.h" #include "pci.h"
@@ -32,6 +38,10 @@ int pci_burst_time, pci_nonburst_time;
int pci_do_log = 0; int pci_do_log = 0;
static int trc_reg = 0;
PCI_RESET pci_reset_handler;
void pci_log(const char *format, ...) void pci_log(const char *format, ...)
{ {
#ifdef ENABLE_PCI_LOG #ifdef ENABLE_PCI_LOG
@@ -490,6 +500,68 @@ static void pci_slots_clear(void)
} }
} }
static uint8_t trc_read(uint16_t port, void *priv)
{
return trc_reg & 0xfb;
}
static void trc_reset(uint8_t val)
{
int i = 0;
if (val & 2)
{
if (pci_reset_handler.pci_master_reset)
{
pci_reset_handler.pci_master_reset();
}
if (pci_reset_handler.pci_set_reset)
{
pci_reset_handler.pci_set_reset();
}
fdc_hard_reset();
if (pci_reset_handler.super_io_reset)
{
pci_reset_handler.super_io_reset();
}
resetide();
for (i = 0; i < CDROM_NUM; i++)
{
if (!cdrom_drives[i].bus_type)
{
cdrom_reset(i);
}
}
port_92_reset();
keyboard_at_reset();
pci_reset();
}
resetx86();
}
static void trc_write(uint16_t port, uint8_t val, void *priv)
{
/* pclog("TRC Write: %02X\n", val); */
if (!(trc_reg & 4) && (val & 4))
{
trc_reset(val);
}
trc_reg = val & 0xfd;
}
void trc_init(void)
{
trc_reg = 0;
io_sethandler(0x0cf9, 0x0001, trc_read, NULL, NULL, trc_write, NULL, NULL, NULL);
}
void pci_init(int type) void pci_init(int type)
{ {
int c; int c;
@@ -500,6 +572,8 @@ void pci_init(int type)
pci_reset(); pci_reset();
trc_init();
io_sethandler(0x04d0, 0x0002, elcr_read, NULL, NULL, elcr_write, NULL, NULL, NULL); io_sethandler(0x04d0, 0x0002, elcr_read, NULL, NULL, elcr_write, NULL, NULL, NULL);
if (type == PCI_CONFIG_TYPE_1) if (type == PCI_CONFIG_TYPE_1)
@@ -517,6 +591,10 @@ void pci_init(int type)
{ {
pci_irqs[c] = PCI_IRQ_DISABLED; pci_irqs[c] = PCI_IRQ_DISABLED;
} }
pci_reset_handler.pci_master_reset = NULL;
pci_reset_handler.pci_set_reset = NULL;
pci_reset_handler.super_io_reset = NULL;
} }
void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd) void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd)

4
src/piix.c
View File

@@ -693,8 +693,6 @@ void piix_init(int card)
ide_set_bus_master(piix_bus_master_dma_read, piix_bus_master_dma_write, piix_bus_master_set_irq); ide_set_bus_master(piix_bus_master_dma_read, piix_bus_master_dma_write, piix_bus_master_set_irq);
trc_init();
port_92_reset(); port_92_reset();
port_92_add(); port_92_add();
@@ -714,8 +712,6 @@ void piix3_init(int card)
ide_set_bus_master(piix_bus_master_dma_read, piix_bus_master_dma_write, piix_bus_master_set_irq); ide_set_bus_master(piix_bus_master_dma_read, piix_bus_master_dma_write, piix_bus_master_set_irq);
trc_init();
port_92_reset(); port_92_reset();
port_92_add(); port_92_add();

4
src/pit.c
View File

@@ -12,7 +12,7 @@
#include "pit.h" #include "pit.h"
#include "device.h" #include "device.h"
#include "timer.h" #include "timer.h"
#include "model.h" #include "machine/machine.h"
#include "sound/snd_speaker.h" #include "sound/snd_speaker.h"
#include "video/video.h" #include "video/video.h"
@@ -43,7 +43,7 @@ void setpitclock(float clock)
bus_timing = clock/(double)cpu_busspeed; bus_timing = clock/(double)cpu_busspeed;
video_updatetiming(); video_updatetiming();
xt_cpu_multi = (int)((14318184.0*(double)(1 << TIMER_SHIFT)) / (double)models[model].cpu[cpu_manufacturer].cpus[cpu].rspeed); xt_cpu_multi = (int)((14318184.0*(double)(1 << TIMER_SHIFT)) / (double)machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
RTCCONST=clock/32768.0; RTCCONST=clock/32768.0;
TIMER_USEC = (int)((clock / 1000000.0f) * (float)(1 << TIMER_SHIFT)); TIMER_USEC = (int)((clock / 1000000.0f) * (float)(1 << TIMER_SHIFT));
device_speed_changed(); device_speed_changed();

3
src/ps2_mca.h
View File

@@ -1,3 +0,0 @@
extern void ps2_mca_board_model_50_init(void);
extern void ps2_mca_board_model_55sx_init(void);
extern void ps2_mca_board_model_80_type2_init(void);

22
src/scat.h
View File

@@ -1,22 +0,0 @@
#define SCAT_DMA_WAIT_STATE_CONTROL 0x01
#define SCAT_VERSION 0x40
#define SCAT_CLOCK_CONTROL 0x41
#define SCAT_PERIPHERAL_CONTROL 0x44
#define SCAT_MISCELLANEOUS_STATUS 0x45
#define SCAT_POWER_MANAGEMENT 0x46
#define SCAT_ROM_ENABLE 0x48
#define SCAT_RAM_WRITE_PROTECT 0x49
#define SCAT_SHADOW_RAM_ENABLE_1 0x4A
#define SCAT_SHADOW_RAM_ENABLE_2 0x4B
#define SCAT_SHADOW_RAM_ENABLE_3 0x4C
#define SCAT_DRAM_CONFIGURATION 0x4D
#define SCAT_EXTENDED_BOUNDARY 0x4E
#define SCAT_EMS_CONTROL 0x4F
typedef struct scat_t
{
uint8_t regs_2x8;
uint8_t regs_2x9;
} scat_t;
extern void scat_init(void);

78
src/sio.c
View File

@@ -6,7 +6,7 @@
* *
* Emulation of Intel System I/O PCI chip. * Emulation of Intel System I/O PCI chip.
* *
* Version: @(#)sio.c 1.0.3 2017/08/24 * Version: @(#)sio.c 1.0.4 2017/09/02
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -15,12 +15,7 @@
*/ */
#include <string.h> #include <string.h>
#include "ibm.h" #include "ibm.h"
#include "cdrom.h"
#include "disc.h"
#include "dma.h" #include "dma.h"
#include "fdc.h"
#include "keyboard_at.h"
#include "hdd/hdd_ide_at.h"
#include "io.h" #include "io.h"
#include "mem.h" #include "mem.h"
#include "pci.h" #include "pci.h"
@@ -129,75 +124,6 @@ uint8_t sio_read(int func, int addr, void *priv)
} }
static int trc_reg = 0;
uint8_t trc_read(uint16_t port, void *priv)
{
return trc_reg & 0xfb;
}
void trc_reset(uint8_t val)
{
int i = 0;
if (val & 2)
{
if (pci_reset_handler.pci_master_reset)
{
pci_reset_handler.pci_master_reset();
}
if (pci_reset_handler.pci_set_reset)
{
pci_reset_handler.pci_set_reset();
}
fdc_hard_reset();
if (pci_reset_handler.super_io_reset)
{
pci_reset_handler.super_io_reset();
}
resetide();
for (i = 0; i < CDROM_NUM; i++)
{
if (!cdrom_drives[i].bus_type)
{
cdrom_reset(i);
}
}
port_92_reset();
keyboard_at_reset();
pci_reset();
}
resetx86();
}
void trc_write(uint16_t port, uint8_t val, void *priv)
{
pclog("TRC Write: %02X\n", val);
if (!(trc_reg & 4) && (val & 4))
{
trc_reset(val);
}
trc_reg = val & 0xfd;
}
void trc_init(void)
{
trc_reg = 0;
io_sethandler(0x0cf9, 0x0001, trc_read, NULL, NULL, trc_write, NULL, NULL, NULL);
}
void sio_reset(void) void sio_reset(void)
{ {
memset(card_sio, 0, 256); memset(card_sio, 0, 256);
@@ -229,8 +155,6 @@ void sio_init(int card)
sio_reset(); sio_reset();
trc_init();
port_92_reset(); port_92_reset();
port_92_add(); port_92_add();

1
src/sio.h
View File

@@ -14,5 +14,4 @@
* Copyright 2016,2017 Miran Grca. * Copyright 2016,2017 Miran Grca.
*/ */
void trc_init(void);
void sio_init(int card); void sio_init(int card);

2
src/video/vid_pcjr.c
View File

@@ -519,7 +519,7 @@ static void *pcjr_video_init()
pcjr_t *pcjr = malloc(sizeof(pcjr_t)); pcjr_t *pcjr = malloc(sizeof(pcjr_t));
memset(pcjr, 0, sizeof(pcjr_t)); memset(pcjr, 0, sizeof(pcjr_t));
display_type = model_get_config_int("display_type"); display_type = machine_get_config_int("display_type");
pcjr->composite = (display_type != PCJR_RGB); pcjr->composite = (display_type != PCJR_RGB);
pcjr->memctrl = -1; pcjr->memctrl = -1;

2
src/video/vid_tandy.c
View File

@@ -587,7 +587,7 @@ void *tandy_init()
tandy_t *tandy = malloc(sizeof(tandy_t)); tandy_t *tandy = malloc(sizeof(tandy_t));
memset(tandy, 0, sizeof(tandy_t)); memset(tandy, 0, sizeof(tandy_t));
display_type = model_get_config_int("display_type"); display_type = machine_get_config_int("display_type");
tandy->composite = (display_type != TANDY_RGB); tandy->composite = (display_type != TANDY_RGB);
cga_comp_init(1); cga_comp_init(1);

24
src/win/win.c
View File

@@ -34,7 +34,7 @@
#include "../rom.h" #include "../rom.h"
#include "../nvr.h" #include "../nvr.h"
#include "../config.h" #include "../config.h"
#include "../model.h" #include "../machine/machine.h"
#include "../hdd/hdd_ide_at.h" #include "../hdd/hdd_ide_at.h"
#include "../cdrom.h" #include "../cdrom.h"
#include "../cdrom_null.h" #include "../cdrom_null.h"
@@ -1130,11 +1130,11 @@ void update_status_bar_panes(HWND hwnds)
} }
for (i = 0; i < CDROM_NUM; i++) for (i = 0; i < CDROM_NUM; i++)
{ {
if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) && !(models[model].flags & MODEL_HAS_IDE)) if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) && !(machines[machine].flags & MACHINE_HAS_IDE))
{ {
continue; continue;
} }
if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA) && !(models[model].flags & MODEL_HAS_IDE)) if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA) && !(machines[machine].flags & MACHINE_HAS_IDE))
{ {
continue; continue;
} }
@@ -1154,7 +1154,7 @@ void update_status_bar_panes(HWND hwnds)
sb_parts++; sb_parts++;
} }
} }
if (c_mfm && !(models[model].flags & MODEL_HAS_IDE) && !!memcmp(hdd_controller_name, "none", 4) && !!memcmp(hdd_controller_name, "xtide", 5) && !!memcmp(hdd_controller_name, "esdi", 4)) if (c_mfm && !(machines[machine].flags & MACHINE_HAS_IDE) && !!memcmp(hdd_controller_name, "none", 4) && !!memcmp(hdd_controller_name, "xtide", 5) && !!memcmp(hdd_controller_name, "esdi", 4))
{ {
sb_parts++; sb_parts++;
} }
@@ -1166,11 +1166,11 @@ void update_status_bar_panes(HWND hwnds)
{ {
sb_parts++; sb_parts++;
} }
if (c_ide_pio && (models[model].flags & MODEL_HAS_IDE)) if (c_ide_pio && (machines[machine].flags & MACHINE_HAS_IDE))
{ {
sb_parts++; sb_parts++;
} }
if (c_ide_dma && (models[model].flags & MODEL_HAS_IDE)) if (c_ide_dma && (machines[machine].flags & MACHINE_HAS_IDE))
{ {
sb_parts++; sb_parts++;
} }
@@ -1215,11 +1215,11 @@ void update_status_bar_panes(HWND hwnds)
} }
for (i = 0; i < CDROM_NUM; i++) for (i = 0; i < CDROM_NUM; i++)
{ {
if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) && !(models[model].flags & MODEL_HAS_IDE)) if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) && !(machines[machine].flags & MACHINE_HAS_IDE))
{ {
continue; continue;
} }
if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA) && !(models[model].flags & MODEL_HAS_IDE)) if ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA) && !(machines[machine].flags & MACHINE_HAS_IDE))
{ {
continue; continue;
} }
@@ -1245,7 +1245,7 @@ void update_status_bar_panes(HWND hwnds)
sb_parts++; sb_parts++;
} }
} }
if (c_mfm && !(models[model].flags & MODEL_HAS_IDE) && !!memcmp(hdd_controller_name, "none", 4) && !!memcmp(hdd_controller_name, "xtide", 5) && !!memcmp(hdd_controller_name, "esdi", 4)) if (c_mfm && !(machines[machine].flags & MACHINE_HAS_IDE) && !!memcmp(hdd_controller_name, "none", 4) && !!memcmp(hdd_controller_name, "xtide", 5) && !!memcmp(hdd_controller_name, "esdi", 4))
{ {
edge += SB_ICON_WIDTH; edge += SB_ICON_WIDTH;
iStatusWidths[sb_parts] = edge; iStatusWidths[sb_parts] = edge;
@@ -1266,14 +1266,14 @@ void update_status_bar_panes(HWND hwnds)
sb_part_meanings[sb_parts] = SB_HDD | HDD_BUS_XTIDE; sb_part_meanings[sb_parts] = SB_HDD | HDD_BUS_XTIDE;
sb_parts++; sb_parts++;
} }
if (c_ide_pio && (models[model].flags & MODEL_HAS_IDE)) if (c_ide_pio && (machines[machine].flags & MACHINE_HAS_IDE))
{ {
edge += SB_ICON_WIDTH; edge += SB_ICON_WIDTH;
iStatusWidths[sb_parts] = edge; iStatusWidths[sb_parts] = edge;
sb_part_meanings[sb_parts] = SB_HDD | HDD_BUS_IDE_PIO_ONLY; sb_part_meanings[sb_parts] = SB_HDD | HDD_BUS_IDE_PIO_ONLY;
sb_parts++; sb_parts++;
} }
if (c_ide_dma && (models[model].flags & MODEL_HAS_IDE)) if (c_ide_dma && (machines[machine].flags & MACHINE_HAS_IDE))
{ {
edge += SB_ICON_WIDTH; edge += SB_ICON_WIDTH;
iStatusWidths[sb_parts] = edge; iStatusWidths[sb_parts] = edge;
@@ -1743,7 +1743,7 @@ int WINAPI WinMain (HINSTANCE hThisInstance, HINSTANCE hPrevInstance, LPSTR lpsz
if (romspresent[c]) if (romspresent[c])
{ {
romset = c; romset = c;
model = model_getmodel(romset); machine = machine_getmachine(romset);
saveconfig(); saveconfig();
resetpchard(); resetpchard();
break; break;

118
src/win/win_settings.c
View File

@@ -26,7 +26,7 @@
#include "../cpu/cpu.h" #include "../cpu/cpu.h"
#include "../nvr.h" #include "../nvr.h"
#include "../device.h" #include "../device.h"
#include "../model.h" #include "../machine/machine.h"
#include "../cdrom.h" #include "../cdrom.h"
#include "../disc.h" #include "../disc.h"
#include "../fdd.h" #include "../fdd.h"
@@ -50,7 +50,7 @@
/* Machine category */ /* Machine category */
static int temp_model, temp_cpu_m, temp_cpu, temp_wait_states, temp_mem_size, temp_dynarec, temp_fpu, temp_sync; static int temp_machine, temp_cpu_m, temp_cpu, temp_wait_states, temp_mem_size, temp_dynarec, temp_fpu, temp_sync;
static wchar_t temp_nvr_path[520]; static wchar_t temp_nvr_path[520];
/* Video category */ /* Video category */
@@ -91,7 +91,7 @@ int hdd_controller_current;
static int displayed_category = 0; static int displayed_category = 0;
extern int is486; extern int is486;
static int romstolist[ROM_MAX], listtomodel[ROM_MAX], romstomodel[ROM_MAX], modeltolist[ROM_MAX]; static int romstolist[ROM_MAX], listtomachine[ROM_MAX], romstomachine[ROM_MAX], machinetolist[ROM_MAX];
static int settings_sound_to_list[20], settings_list_to_sound[20]; static int settings_sound_to_list[20], settings_list_to_sound[20];
static int settings_midi_to_list[20], settings_list_to_midi[20]; static int settings_midi_to_list[20], settings_list_to_midi[20];
static int settings_mouse_to_list[20], settings_list_to_mouse[20]; static int settings_mouse_to_list[20], settings_list_to_mouse[20];
@@ -108,7 +108,7 @@ static void win_settings_init(void)
int i = 0; int i = 0;
/* Machine category */ /* Machine category */
temp_model = model; temp_machine = machine;
temp_cpu_m = cpu_manufacturer; temp_cpu_m = cpu_manufacturer;
temp_wait_states = cpu_waitstates; temp_wait_states = cpu_waitstates;
temp_cpu = cpu; temp_cpu = cpu;
@@ -179,7 +179,7 @@ static int win_settings_changed(void)
int j = 0; int j = 0;
/* Machine category */ /* Machine category */
i = i || (model != temp_model); i = i || (machine != temp_machine);
i = i || (cpu_manufacturer != temp_cpu_m); i = i || (cpu_manufacturer != temp_cpu_m);
i = i || (cpu_waitstates != temp_wait_states); i = i || (cpu_waitstates != temp_wait_states);
i = i || (cpu != temp_cpu); i = i || (cpu != temp_cpu);
@@ -282,8 +282,8 @@ static void win_settings_save(void)
resetpchard_close(); resetpchard_close();
/* Machine category */ /* Machine category */
model = temp_model; machine = temp_machine;
romset = model_getromset(); romset = machine_getromset();
cpu_manufacturer = temp_cpu_m; cpu_manufacturer = temp_cpu_m;
cpu_waitstates = temp_wait_states; cpu_waitstates = temp_wait_states;
cpu = temp_cpu; cpu = temp_cpu;
@@ -373,10 +373,10 @@ static void win_settings_machine_recalc_cpu(HWND hdlg)
int cpu_flags; int cpu_flags;
int cpu_type; int cpu_type;
temp_romset = model_getromset_ex(temp_model); temp_romset = machine_getromset_ex(temp_machine);
h = GetDlgItem(hdlg, IDC_COMBO_WS); h = GetDlgItem(hdlg, IDC_COMBO_WS);
cpu_type = models[romstomodel[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_type; cpu_type = machines[romstomachine[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_type;
if ((cpu_type >= CPU_286) && (cpu_type <= CPU_386DX)) if ((cpu_type >= CPU_286) && (cpu_type <= CPU_386DX))
{ {
EnableWindow(h, TRUE); EnableWindow(h, TRUE);
@@ -387,7 +387,7 @@ static void win_settings_machine_recalc_cpu(HWND hdlg)
} }
h=GetDlgItem(hdlg, IDC_CHECK_DYNAREC); h=GetDlgItem(hdlg, IDC_CHECK_DYNAREC);
cpu_flags = models[romstomodel[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_flags; cpu_flags = machines[romstomachine[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_flags;
if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) && (cpu_flags & CPU_REQUIRES_DYNAREC)) if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) && (cpu_flags & CPU_REQUIRES_DYNAREC))
{ {
fatal("Attempting to select a CPU that requires the recompiler and does not support it at the same time\n"); fatal("Attempting to select a CPU that requires the recompiler and does not support it at the same time\n");
@@ -411,7 +411,7 @@ static void win_settings_machine_recalc_cpu(HWND hdlg)
} }
h = GetDlgItem(hdlg, IDC_CHECK_FPU); h = GetDlgItem(hdlg, IDC_CHECK_FPU);
cpu_type = models[romstomodel[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_type; cpu_type = machines[romstomachine[temp_romset]].cpu[temp_cpu_m].cpus[temp_cpu].cpu_type;
if ((cpu_type < CPU_i486DX) && (cpu_type >= CPU_286)) if ((cpu_type < CPU_i486DX) && (cpu_type >= CPU_286))
{ {
EnableWindow(h, TRUE); EnableWindow(h, TRUE);
@@ -438,15 +438,15 @@ static void win_settings_machine_recalc_cpu_m(HWND hdlg)
LPTSTR lptsTemp; LPTSTR lptsTemp;
char *stransi; char *stransi;
temp_romset = model_getromset_ex(temp_model); temp_romset = machine_getromset_ex(temp_machine);
lptsTemp = (LPTSTR) malloc(512); lptsTemp = (LPTSTR) malloc(512);
h = GetDlgItem(hdlg, IDC_COMBO_CPU); h = GetDlgItem(hdlg, IDC_COMBO_CPU);
SendMessage(h, CB_RESETCONTENT, 0, 0); SendMessage(h, CB_RESETCONTENT, 0, 0);
c = 0; c = 0;
while (models[romstomodel[temp_romset]].cpu[temp_cpu_m].cpus[c].cpu_type != -1) while (machines[romstomachine[temp_romset]].cpu[temp_cpu_m].cpus[c].cpu_type != -1)
{ {
stransi = models[romstomodel[temp_romset]].cpu[temp_cpu_m].cpus[c].name; stransi = machines[romstomachine[temp_romset]].cpu[temp_cpu_m].cpus[c].name;
mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); mbstowcs(lptsTemp, stransi, strlen(stransi) + 1);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp);
c++; c++;
@@ -464,7 +464,7 @@ static void win_settings_machine_recalc_cpu_m(HWND hdlg)
} }
static void win_settings_machine_recalc_model(HWND hdlg) static void win_settings_machine_recalc_machine(HWND hdlg)
{ {
HWND h; HWND h;
int c = 0; int c = 0;
@@ -473,11 +473,11 @@ static void win_settings_machine_recalc_model(HWND hdlg)
char *stransi; char *stransi;
UDACCEL accel; UDACCEL accel;
temp_romset = model_getromset_ex(temp_model); temp_romset = machine_getromset_ex(temp_machine);
lptsTemp = (LPTSTR) malloc(512); lptsTemp = (LPTSTR) malloc(512);
h = GetDlgItem(hdlg, IDC_CONFIGURE_MACHINE); h = GetDlgItem(hdlg, IDC_CONFIGURE_MACHINE);
if (model_getdevice(temp_model)) if (machine_getdevice(temp_machine))
{ {
EnableWindow(h, TRUE); EnableWindow(h, TRUE);
} }
@@ -489,9 +489,9 @@ static void win_settings_machine_recalc_model(HWND hdlg)
h = GetDlgItem(hdlg, IDC_COMBO_CPU_TYPE); h = GetDlgItem(hdlg, IDC_COMBO_CPU_TYPE);
SendMessage(h, CB_RESETCONTENT, 0, 0); SendMessage(h, CB_RESETCONTENT, 0, 0);
c = 0; c = 0;
while (models[romstomodel[temp_romset]].cpu[c].cpus != NULL && c < 4) while (machines[romstomachine[temp_romset]].cpu[c].cpus != NULL && c < 4)
{ {
stransi = models[romstomodel[temp_romset]].cpu[c].name; stransi = machines[romstomachine[temp_romset]].cpu[c].name;
mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); mbstowcs(lptsTemp, stransi, strlen(stransi) + 1);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp);
c++; c++;
@@ -514,11 +514,11 @@ static void win_settings_machine_recalc_model(HWND hdlg)
win_settings_machine_recalc_cpu_m(hdlg); win_settings_machine_recalc_cpu_m(hdlg);
h = GetDlgItem(hdlg, IDC_MEMSPIN); h = GetDlgItem(hdlg, IDC_MEMSPIN);
SendMessage(h, UDM_SETRANGE, 0, (models[romstomodel[temp_romset]].min_ram << 16) | models[romstomodel[temp_romset]].max_ram); SendMessage(h, UDM_SETRANGE, 0, (machines[romstomachine[temp_romset]].min_ram << 16) | machines[romstomachine[temp_romset]].max_ram);
accel.nSec = 0; accel.nSec = 0;
accel.nInc = models[romstomodel[temp_romset]].ram_granularity; accel.nInc = machines[romstomachine[temp_romset]].ram_granularity;
SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel);
if (!(models[romstomodel[temp_romset]].flags & MODEL_AT) || (models[romstomodel[temp_romset]].ram_granularity >= 128)) if (!(machines[romstomachine[temp_romset]].flags & MACHINE_AT) || (machines[romstomachine[temp_romset]].ram_granularity >= 128))
{ {
SendMessage(h, UDM_SETPOS, 0, temp_mem_size); SendMessage(h, UDM_SETPOS, 0, temp_mem_size);
h = GetDlgItem(hdlg, IDC_TEXT_MB); h = GetDlgItem(hdlg, IDC_TEXT_MB);
@@ -555,22 +555,22 @@ static BOOL CALLBACK win_settings_machine_proc(HWND hdlg, UINT message, WPARAM w
romstolist[c] = 0; romstolist[c] = 0;
} }
c = d = 0; c = d = 0;
while (models[c].id != -1) while (machines[c].id != -1)
{ {
if (romspresent[models[c].id]) if (romspresent[machines[c].id])
{ {
stransi = models[c].name; stransi = machines[c].name;
mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); mbstowcs(lptsTemp, stransi, strlen(stransi) + 1);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM) lptsTemp); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) lptsTemp);
modeltolist[c] = d; machinetolist[c] = d;
listtomodel[d] = c; listtomachine[d] = c;
romstolist[models[c].id] = d; romstolist[machines[c].id] = d;
romstomodel[models[c].id] = c; romstomachine[machines[c].id] = c;
d++; d++;
} }
c++; c++;
} }
SendMessage(h, CB_SETCURSEL, modeltolist[temp_model], 0); SendMessage(h, CB_SETCURSEL, machinetolist[temp_machine], 0);
h = GetDlgItem(hdlg, IDC_COMBO_WS); h = GetDlgItem(hdlg, IDC_COMBO_WS);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM) win_language_get_string_from_id(IDS_2131)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) win_language_get_string_from_id(IDS_2131));
@@ -592,7 +592,7 @@ static BOOL CALLBACK win_settings_machine_proc(HWND hdlg, UINT message, WPARAM w
h=GetDlgItem(hdlg, IDC_CHECK_SYNC); h=GetDlgItem(hdlg, IDC_CHECK_SYNC);
SendMessage(h, BM_SETCHECK, temp_sync, 0); SendMessage(h, BM_SETCHECK, temp_sync, 0);
win_settings_machine_recalc_model(hdlg); win_settings_machine_recalc_machine(hdlg);
h = GetDlgItem(hdlg, IDC_EDIT_NVR_PATH); h = GetDlgItem(hdlg, IDC_EDIT_NVR_PATH);
SendMessage(h, WM_SETTEXT, 0, (LPARAM) temp_nvr_path); SendMessage(h, WM_SETTEXT, 0, (LPARAM) temp_nvr_path);
@@ -608,9 +608,9 @@ static BOOL CALLBACK win_settings_machine_proc(HWND hdlg, UINT message, WPARAM w
if (HIWORD(wParam) == CBN_SELCHANGE) if (HIWORD(wParam) == CBN_SELCHANGE)
{ {
h = GetDlgItem(hdlg, IDC_COMBO_MACHINE); h = GetDlgItem(hdlg, IDC_COMBO_MACHINE);
temp_model = listtomodel[SendMessage(h,CB_GETCURSEL,0,0)]; temp_machine = listtomachine[SendMessage(h,CB_GETCURSEL,0,0)];
win_settings_machine_recalc_model(hdlg); win_settings_machine_recalc_machine(hdlg);
} }
break; break;
case IDC_COMBO_CPU_TYPE: case IDC_COMBO_CPU_TYPE:
@@ -634,9 +634,9 @@ static BOOL CALLBACK win_settings_machine_proc(HWND hdlg, UINT message, WPARAM w
break; break;
case IDC_CONFIGURE_MACHINE: case IDC_CONFIGURE_MACHINE:
h = GetDlgItem(hdlg, IDC_COMBO_MACHINE); h = GetDlgItem(hdlg, IDC_COMBO_MACHINE);
temp_model = listtomodel[SendMessage(h, CB_GETCURSEL, 0, 0)]; temp_machine = listtomachine[SendMessage(h, CB_GETCURSEL, 0, 0)];
deviceconfig_open(hdlg, (void *)model_getdevice(temp_model)); deviceconfig_open(hdlg, (void *)machine_getdevice(temp_machine));
break; break;
case IDC_BUTTON_NVR_PATH: case IDC_BUTTON_NVR_PATH:
p = BrowseFolder(temp_nvr_path, win_language_get_string_from_id(IDS_2056)); p = BrowseFolder(temp_nvr_path, win_language_get_string_from_id(IDS_2056));
@@ -680,16 +680,16 @@ static BOOL CALLBACK win_settings_machine_proc(HWND hdlg, UINT message, WPARAM w
SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp);
wcstombs(stransi, lptsTemp, 512); wcstombs(stransi, lptsTemp, 512);
sscanf(stransi, "%i", &temp_mem_size); sscanf(stransi, "%i", &temp_mem_size);
temp_mem_size &= ~(models[temp_model].ram_granularity - 1); temp_mem_size &= ~(machines[temp_machine].ram_granularity - 1);
if (temp_mem_size < models[temp_model].min_ram) if (temp_mem_size < machines[temp_machine].min_ram)
{ {
temp_mem_size = models[temp_model].min_ram; temp_mem_size = machines[temp_machine].min_ram;
} }
else if (temp_mem_size > models[temp_model].max_ram) else if (temp_mem_size > machines[temp_machine].max_ram)
{ {
temp_mem_size = models[temp_model].max_ram; temp_mem_size = machines[temp_machine].max_ram;
} }
if ((models[temp_model].flags & MODEL_AT) && (models[temp_model].ram_granularity < 128)) if ((machines[temp_machine].flags & MACHINE_AT) && (machines[temp_machine].ram_granularity < 128))
{ {
temp_mem_size *= 1024; temp_mem_size *= 1024;
} }
@@ -723,7 +723,7 @@ static void recalc_vid_list(HWND hdlg)
break; break;
if (video_card_available(c) && gfx_present[video_new_to_old(c)] && if (video_card_available(c) && gfx_present[video_new_to_old(c)] &&
((models[temp_model].flags & MODEL_PCI) || !(video_card_getdevice(c)->flags & DEVICE_PCI))) ((machines[temp_machine].flags & MACHINE_PCI) || !(video_card_getdevice(c)->flags & DEVICE_PCI)))
{ {
mbstowcs(szText, s, strlen(s) + 1); mbstowcs(szText, s, strlen(s) + 1);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM) szText); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) szText);
@@ -741,13 +741,13 @@ static void recalc_vid_list(HWND hdlg)
} }
if (!found_card) if (!found_card)
SendMessage(h, CB_SETCURSEL, 0, 0); SendMessage(h, CB_SETCURSEL, 0, 0);
EnableWindow(h, models[temp_model].fixed_gfxcard ? FALSE : TRUE); EnableWindow(h, machines[temp_machine].fixed_gfxcard ? FALSE : TRUE);
h = GetDlgItem(hdlg, IDC_CHECK_VOODOO); h = GetDlgItem(hdlg, IDC_CHECK_VOODOO);
EnableWindow(h, (models[temp_model].flags & MODEL_PCI) ? TRUE : FALSE); EnableWindow(h, (machines[temp_machine].flags & MACHINE_PCI) ? TRUE : FALSE);
h = GetDlgItem(hdlg, IDC_BUTTON_VOODOO); h = GetDlgItem(hdlg, IDC_BUTTON_VOODOO);
EnableWindow(h, ((models[temp_model].flags & MODEL_PCI) && temp_voodoo) ? TRUE : FALSE); EnableWindow(h, ((machines[temp_machine].flags & MACHINE_PCI) && temp_voodoo) ? TRUE : FALSE);
} }
@@ -877,18 +877,18 @@ static BOOL CALLBACK win_settings_video_proc(HWND hdlg, UINT message, WPARAM wPa
} }
static int mouse_valid(int type, int model) static int mouse_valid(int type, int machine)
{ {
type &= MOUSE_TYPE_MASK; type &= MOUSE_TYPE_MASK;
if ((type == MOUSE_TYPE_PS2) && if ((type == MOUSE_TYPE_PS2) &&
!(models[model].flags & MODEL_PS2)) return(0); !(machines[machine].flags & MACHINE_PS2)) return(0);
if ((type == MOUSE_TYPE_AMSTRAD) && if ((type == MOUSE_TYPE_AMSTRAD) &&
!(models[model].flags & MODEL_AMSTRAD)) return(0); !(machines[machine].flags & MACHINE_AMSTRAD)) return(0);
if ((type == MOUSE_TYPE_OLIM24) && if ((type == MOUSE_TYPE_OLIM24) &&
!(models[model].flags & MODEL_OLIM24)) return(0); !(machines[machine].flags & MACHINE_OLIM24)) return(0);
return(1); return(1);
} }
@@ -913,7 +913,7 @@ static BOOL CALLBACK win_settings_input_proc(HWND hdlg, UINT message, WPARAM wPa
settings_mouse_to_list[c] = d; settings_mouse_to_list[c] = d;
if (mouse_valid(type, temp_model)) if (mouse_valid(type, temp_machine))
{ {
str_id = IDS_3072 + c; str_id = IDS_3072 + c;
@@ -1007,7 +1007,7 @@ static BOOL CALLBACK win_settings_input_proc(HWND hdlg, UINT message, WPARAM wPa
} }
static void recalc_hdd_list(HWND hdlg, int model, int use_selected_hdd) static void recalc_hdd_list(HWND hdlg, int machine, int use_selected_hdd)
{ {
HWND h; HWND h;
@@ -1022,7 +1022,7 @@ static void recalc_hdd_list(HWND hdlg, int model, int use_selected_hdd)
h = GetDlgItem(hdlg, IDC_COMBO_HDC); h = GetDlgItem(hdlg, IDC_COMBO_HDC);
if (models[temp_model].flags & MODEL_HAS_IDE) if (machines[temp_machine].flags & MACHINE_HAS_IDE)
{ {
hdc_ignore = 1; hdc_ignore = 1;
@@ -1064,17 +1064,17 @@ static void recalc_hdd_list(HWND hdlg, int model, int use_selected_hdd)
{ {
break; break;
} }
if ((hdd_controller_get_flags(c) & DEVICE_AT) && !(models[model].flags & MODEL_AT)) if ((hdd_controller_get_flags(c) & DEVICE_AT) && !(machines[machine].flags & MACHINE_AT))
{ {
c++; c++;
continue; continue;
} }
if ((hdd_controller_get_flags(c) & DEVICE_PS2) && !(models[model].flags & MODEL_PS2_HDD)) if ((hdd_controller_get_flags(c) & DEVICE_PS2) && !(machines[machine].flags & MACHINE_PS2_HDD))
{ {
c++; c++;
continue; continue;
} }
if ((hdd_controller_get_flags(c) & DEVICE_MCA) && !(models[model].flags & MODEL_MCA)) if ((hdd_controller_get_flags(c) & DEVICE_MCA) && !(machines[machine].flags & MACHINE_MCA))
{ {
c++; c++;
continue; continue;
@@ -1206,7 +1206,7 @@ static BOOL CALLBACK win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wPa
{ {
sound_dev = sound_card_getdevice(c); sound_dev = sound_card_getdevice(c);
if (!sound_dev || (sound_dev->flags & DEVICE_MCA) == (models[temp_model].flags & MODEL_MCA)) if (!sound_dev || (sound_dev->flags & DEVICE_MCA) == (machines[temp_machine].flags & MACHINE_MCA))
{ {
if (c == 0) if (c == 0)
{ {
@@ -1253,7 +1253,7 @@ static BOOL CALLBACK win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wPa
{ {
midi_dev = midi_device_getdevice(c); midi_dev = midi_device_getdevice(c);
if (!midi_dev || (midi_dev->flags & DEVICE_MCA) == (models[temp_model].flags & MODEL_MCA)) if (!midi_dev || (midi_dev->flags & DEVICE_MCA) == (machines[temp_machine].flags & MACHINE_MCA))
{ {
if (c == 0) if (c == 0)
{ {
@@ -1447,7 +1447,7 @@ static BOOL CALLBACK win_settings_peripherals_proc(HWND hdlg, UINT message, WPAR
{ {
scsi_dev = scsi_card_getdevice(c); scsi_dev = scsi_card_getdevice(c);
if (!scsi_dev || (scsi_dev->flags & DEVICE_MCA) == (models[temp_model].flags & MODEL_MCA)) if (!scsi_dev || (scsi_dev->flags & DEVICE_MCA) == (machines[temp_machine].flags & MACHINE_MCA))
{ {
if (c == 0) if (c == 0)
{ {
@@ -1477,7 +1477,7 @@ static BOOL CALLBACK win_settings_peripherals_proc(HWND hdlg, UINT message, WPAR
EnableWindow(h, FALSE); EnableWindow(h, FALSE);
} }
recalc_hdd_list(hdlg, temp_model, 0); recalc_hdd_list(hdlg, temp_machine, 0);
h=GetDlgItem(hdlg, IDC_COMBO_IDE_TER); h=GetDlgItem(hdlg, IDC_COMBO_IDE_TER);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM) win_language_get_string_from_id(IDS_5376)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) win_language_get_string_from_id(IDS_5376));