From 3ef7f82c7886ae5b76dbf76b4ee11ff99c1e86fd Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Thu, 31 Jul 2025 18:26:27 +0200
Subject: [PATCH] FDC: Fix DOR FINTR disabling, fixes #5851.

---
 src/floppy/fdc.c | 25 ++++++++++++++++++-------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c
index 523ae6948..6f23eea9d 100644
--- a/src/floppy/fdc.c
+++ b/src/floppy/fdc.c
@@ -335,14 +335,17 @@ fdc_int(fdc_t *fdc, int set_fintr)
 {
     int ienable = 0;
 
-    if (!(fdc->flags & FDC_FLAG_PCJR))
+    if (fdc->flags & FDC_FLAG_PS2_MCA)
+        ienable = 1;
+    else if (!(fdc->flags & FDC_FLAG_PCJR))
         ienable = !!(fdc->dor & 8);
 
-    if (ienable)
+    if (ienable) {
         picint(1 << fdc->irq);
 
-    if (set_fintr)
-        fdc->fintr = 1;
+        if (set_fintr)
+            fdc->fintr = 1;
+    }
     fdc_log("fdc_int(%i): fdc->fintr = %i\n", set_fintr, fdc->fintr);
 }
 
@@ -762,9 +765,17 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                 fdc->st0 &= ~0x07;
                 fdc->st0 |= (fdd_get_head(0) ? 4 : 0);
             } else {
-                if (!(val & 8) && (fdc->dor & 8)) {
-                    fdc->tc = 1;
-                    fdc_int(fdc, 1);
+                /*
+                   Writing this bit to logic "1" will enable the DRQ,
+                   nDACK, TC and FINTR outputs. This bit being a
+                   logic "0" will disable the nDACK and TC inputs, and
+                   hold the DRQ and FINTR outputs in a high
+                   impedance state.
+                 */
+                if (!(val & 8) && (fdc->dor & 8) && !(fdc->flags & FDC_FLAG_PS2_MCA)) {
+                    fdc->tc    = 1;
+                    fdc->fintr = 0;
+                    picintc(1 << fdc->irq);
                 }
                 if (!(val & 4)) {
                     fdd_stop(real_drive(fdc, val & 3));