Updated CPU clock selection on Compaq 286/386 based machines.

Per their manuals, see above and below (manuals only)

src/cpu/cpu.h

@@ -86,33 +86,37 @@ enum {
 };
 
 enum {
-    CPU_PKG_8088          = (1 << 0),
+    CPU_PKG_8088                        = (1 << 0),
-    CPU_PKG_8088_EUROPC   = (1 << 1),
+    CPU_PKG_8088_EUROPC                 = (1 << 1),
-    CPU_PKG_8086          = (1 << 2),
+    CPU_PKG_8086                        = (1 << 2),
-    CPU_PKG_188           = (1 << 3),
+    CPU_PKG_188                         = (1 << 3),
-    CPU_PKG_186           = (1 << 4),
+    CPU_PKG_186                         = (1 << 4),
-    CPU_PKG_286           = (1 << 5),
+    CPU_PKG_286                         = (1 << 5),
-    CPU_PKG_386SX         = (1 << 6),
+    CPU_PKG_286_CPQ_PORTABLE_II         = (1 << 6),
-    CPU_PKG_386DX         = (1 << 7),
+    CPU_PKG_386SX                       = (1 << 7),
-    CPU_PKG_M6117         = (1 << 8),
+    CPU_PKG_386DX                       = (1 << 8),
-    CPU_PKG_386SLC_IBM    = (1 << 9),
+    CPU_PKG_386DX_CPQ_09_1986           = (1 << 9),
-    CPU_PKG_486SLC        = (1 << 10),
+    CPU_PKG_386DX_CPQ_1987              = (1 << 10),
-    CPU_PKG_486SLC_IBM    = (1 << 11),
+    CPU_PKG_386DX_CPQ_05_1988           = (1 << 11),
-    CPU_PKG_486BL         = (1 << 12),
+    CPU_PKG_M6117                       = (1 << 12),
-    CPU_PKG_486DLC        = (1 << 13),
+    CPU_PKG_386SLC_IBM                  = (1 << 13),
-    CPU_PKG_SOCKET1       = (1 << 14),
+    CPU_PKG_486SLC                      = (1 << 14),
-    CPU_PKG_SOCKET3       = (1 << 15),
+    CPU_PKG_486SLC_IBM                  = (1 << 15),
-    CPU_PKG_SOCKET3_PC330 = (1 << 16),
+    CPU_PKG_486BL                       = (1 << 16),
-    CPU_PKG_STPC          = (1 << 17),
+    CPU_PKG_486DLC                      = (1 << 17),
-    CPU_PKG_SOCKET4       = (1 << 18),
+    CPU_PKG_SOCKET1                     = (1 << 18),
-    CPU_PKG_SOCKET5_7     = (1 << 19),
+    CPU_PKG_SOCKET3                     = (1 << 19),
-    CPU_PKG_SOCKET8       = (1 << 20),
+    CPU_PKG_SOCKET3_PC330               = (1 << 20),
-    CPU_PKG_SLOT1         = (1 << 21),
+    CPU_PKG_STPC                        = (1 << 21),
-    CPU_PKG_SLOT2         = (1 << 22),
+    CPU_PKG_SOCKET4                     = (1 << 22),
-    CPU_PKG_SLOTA         = (1 << 23),
+    CPU_PKG_SOCKET5_7                   = (1 << 23),
-    CPU_PKG_SOCKET370     = (1 << 24),
+    CPU_PKG_SOCKET8                     = (1 << 24),
-    CPU_PKG_SOCKETA       = (1 << 25),
+    CPU_PKG_SLOT1                       = (1 << 25),
-    CPU_PKG_EBGA368       = (1 << 26)
+    CPU_PKG_SLOT2                       = (1 << 26),
+    CPU_PKG_SLOTA                       = (1 << 27),
+    CPU_PKG_SOCKET370                   = (1 << 28),
+    CPU_PKG_SOCKETA                     = (1 << 29),
+    CPU_PKG_EBGA368                     = (1 << 30)
 };
 
 #define MANU_INTEL           0

src/cpu/cpu_table.c

@@ -1004,6 +1004,65 @@ const cpu_family_t cpu_families[] = {
         { .name = "", 0 }
     }
     }, {
+    .package = CPU_PKG_286_CPQ_PORTABLE_II,
+    .manufacturer = "Intel",
+    .name = "80286",
+    .internal_name = "286",
+    .cpus = (const CPU[]) {
+        {
+            .name = "6",
+            .cpu_type = CPU_286,
+            .fpus = fpus_80286,
+            .rspeed = 6000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 2,
+            .mem_write_cycles = 2,
+            .cache_read_cycles = 2,
+            .cache_write_cycles = 2,
+            .atclk_div = 1
+        },
+        {
+            .name = "8",
+            .cpu_type = CPU_286,
+            .fpus = fpus_80286,
+            .rspeed = 8000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 2,
+            .mem_write_cycles = 2,
+            .cache_read_cycles = 2,
+            .cache_write_cycles = 2,
+            .atclk_div = 1
+        },
+        {
+            .name = "16",
+            .cpu_type = CPU_286,
+            .fpus = fpus_80286,
+            .rspeed = 16000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 3,
+            .mem_write_cycles = 3,
+            .cache_read_cycles = 3,
+            .cache_write_cycles = 3,
+            .atclk_div = 2
+        },
+        { .name = "", 0 }
+    }
+    }, {
     .package = CPU_PKG_386SX,
     .manufacturer = "Intel",
     .name = "i386SX",
@@ -1030,6 +1089,33 @@ const cpu_family_t cpu_families[] = {
         {"", 0}
     }
     }, {
+    .package = CPU_PKG_386DX_CPQ_09_1986,
+    .manufacturer = "Intel",
+    .name = "i386DX",
+    .internal_name = "i386dx",
+    .cpus = (const CPU[]) {
+        {"16",    CPU_386DX,      fpus_80286,  16000000, 1, 5000, 0x0308, 0, 0, 0, 3,3,3,3, 2},
+        {"", 0}
+    }
+    }, {
+    .package = CPU_PKG_386DX_CPQ_1987,
+    .manufacturer = "Intel",
+    .name = "i386DX",
+    .internal_name = "i386dx",
+    .cpus = (const CPU[]) {
+        {"20",    CPU_386DX,      fpus_80386,  20000000, 1, 5000, 0x0308, 0, 0, 0, 4,4,3,3, 3},
+        {"", 0}
+    }
+    }, {
+    .package = CPU_PKG_386DX_CPQ_05_1988,
+    .manufacturer = "Intel",
+    .name = "i386DX",
+    .internal_name = "i386dx",
+    .cpus = (const CPU[]) {
+        {"25",    CPU_386DX,      fpus_80386,  25000000, 1, 5000, 0x0308, 0, 0, 0, 4,4,3,3, 3},
+        {"", 0}
+    }
+    }, {
     .package = CPU_PKG_386DX,
     .manufacturer = "Intel",
     .name = "i386DX",
@@ -1170,6 +1256,15 @@ const cpu_family_t cpu_families[] = {
         {"", 0}
     }
     }, {
+    .package = CPU_PKG_386DX_CPQ_1987,
+    .manufacturer = "Cyrix",
+    .name = "Cx486DRx2",
+    .internal_name = "cx486drx2",
+    .cpus = (const CPU[]) {
+        {"40", CPU_486DLC, fpus_80386, 40000000, 2, 5000, 0x407, 0, 0x0007, 0,  8, 8,6,6, 6},
+        {"", 0}
+    }
+    }, {
     .package = CPU_PKG_386DX,
     .manufacturer = "Cyrix",
     .name = "Cx486DRx2",

src/machine/machine_table.c

@@ -2767,7 +2767,7 @@ const machine_t machines[] = {
         .available_flag = MACHINE_AVAILABLE,
         .gpio_acpi_handler = NULL,
         .cpu = {
-            .package = CPU_PKG_286,
+            .package = CPU_PKG_286_CPQ_PORTABLE_II,
             .block = CPU_BLOCK_NONE,
             .min_bus = 0,
             .max_bus = 0,
@@ -2807,7 +2807,7 @@ const machine_t machines[] = {
         .available_flag = MACHINE_AVAILABLE,
         .gpio_acpi_handler = NULL,
         .cpu = {
-            .package = CPU_PKG_286,
+            .package = CPU_PKG_286_CPQ_PORTABLE_II,
             .block = CPU_BLOCK_NONE,
             .min_bus = 0,
             .max_bus = 0,
@@ -4875,7 +4875,7 @@ const machine_t machines[] = {
         .available_flag = MACHINE_AVAILABLE,
         .gpio_acpi_handler = NULL,
         .cpu = {
-            .package = CPU_PKG_386DX,
+            .package = CPU_PKG_386DX_CPQ_09_1986,
             .block = CPU_BLOCK_NONE,
             .min_bus = 0,
             .max_bus = 0,
@@ -4914,7 +4914,7 @@ const machine_t machines[] = {
         .available_flag = MACHINE_AVAILABLE,
         .gpio_acpi_handler = NULL,
         .cpu = {
-            .package = CPU_PKG_386DX,
+            .package = CPU_PKG_386DX_CPQ_05_1988,
             .block = CPU_BLOCK_NONE,
             .min_bus = 0,
             .max_bus = 0,
@@ -4953,7 +4953,7 @@ const machine_t machines[] = {
         .available_flag = MACHINE_AVAILABLE,
         .gpio_acpi_handler = NULL,
         .cpu = {
-            .package = CPU_PKG_386DX,
+            .package = CPU_PKG_386DX_CPQ_1987,
             .block = CPU_BLOCK_NONE,
             .min_bus = 0,
             .max_bus = 0,