diff --git a/src/cpu/386.c b/src/cpu/386.c
index 8b612604d..21db155e9 100644
--- a/src/cpu/386.c
+++ b/src/cpu/386.c
@@ -268,7 +268,8 @@ exec386_2386(int32_t cycs)
             } else {
                 CHECK_READ_CS(MIN(ol, 4));
             }
-            ins_fetch_fault = cpu_386_check_instruction_fault();
+            if (is386)
+                ins_fetch_fault = cpu_386_check_instruction_fault();
 
             /* Breakpoint fault has priority over other faults. */
             if (ins_fetch_fault) {
@@ -336,6 +337,14 @@ exec386_2386(int32_t cycs)
 #endif
                     }
                 }
+            } else if (new_ne) {
+                flags_rebuild();
+                new_ne = 0;
+#ifndef USE_NEW_DYNAREC
+                oldcs = CS;
+#endif
+                cpu_state.oldpc = cpu_state.pc;
+                x86_int(16);
             } else if (trap) {
                 flags_rebuild();
                 if (trap & 2) dr[6] |= 0x8000;
diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c
index dcbe3608c..a68d866bf 100644
--- a/src/cpu/386_common.c
+++ b/src/cpu/386_common.c
@@ -72,6 +72,7 @@ extern uint8_t *pccache2;
 extern int      optype;
 extern uint32_t pccache;
 
+int      new_ne            = 0;
 int      in_sys            = 0;
 int      unmask_a20_in_smm = 0;
 uint32_t old_rammask       = 0xffffffff;
diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c
index 5991cf100..c4c095735 100644
--- a/src/cpu/386_dynarec.c
+++ b/src/cpu/386_dynarec.c
@@ -357,6 +357,8 @@ exec386_dynarec_int(void)
             CPU_BLOCK_END();
         if (smi_line)
             CPU_BLOCK_END();
+        else if (new_ne)
+            CPU_BLOCK_END();
         else if (trap)
             CPU_BLOCK_END();
         else if (nmi && nmi_enable && nmi_mask)
@@ -366,7 +368,7 @@ exec386_dynarec_int(void)
     }
 
 block_ended:
-    if (!cpu_state.abrt && trap) {
+    if (!cpu_state.abrt && !new_ne && trap) {
 #    ifdef USE_DEBUG_REGS_486
         //pclog("Debug trap 0x%X\n", trap);
         if (trap & 2) dr[6] |= 0x8000;
@@ -602,6 +604,8 @@ exec386_dynarec_dyn(void)
             if (cpu_init)
                 CPU_BLOCK_END();
 
+            if (new_ne)
+                CPU_BLOCK_END();
             if ((cpu_state.flags & T_FLAG) || (trap == 2))
                 CPU_BLOCK_END();
             if (smi_line)
@@ -626,7 +630,7 @@ exec386_dynarec_dyn(void)
 
         cpu_end_block_after_ins = 0;
 
-        if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !x86_was_reset)
+        if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !new_ne && !x86_was_reset)
             codegen_block_end_recompile(block);
 
         if (x86_was_reset)
@@ -702,6 +706,8 @@ exec386_dynarec_dyn(void)
             if (cpu_init)
                 CPU_BLOCK_END();
 
+            if (new_ne)
+                CPU_BLOCK_END();
             if (cpu_state.flags & T_FLAG)
                 CPU_BLOCK_END();
             if (smi_line)
@@ -726,7 +732,7 @@ exec386_dynarec_dyn(void)
 
         cpu_end_block_after_ins = 0;
 
-        if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !x86_was_reset)
+        if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !new_ne && !x86_was_reset)
             codegen_block_end();
 
         if (x86_was_reset)
@@ -809,6 +815,15 @@ exec386_dynarec(int32_t cycs)
                 }
             }
 
+            if (new_ne) {
+#    ifndef USE_NEW_DYNAREC
+                oldcs = CS;
+#    endif
+                cpu_state.oldpc = cpu_state.pc;
+                new_ne = 0;
+                x86_int(16);
+            }
+
             if (smi_line)
                 enter_smm_check(0);
             else if (nmi && nmi_enable && nmi_mask) {
@@ -977,6 +992,15 @@ block_ended:
 #endif
                     }
                 }
+            } else if (new_ne) {
+                flags_rebuild();
+
+                new_ne = 0;
+#ifndef USE_NEW_DYNAREC
+                oldcs = CS;
+#endif
+                cpu_state.oldpc = cpu_state.pc;
+                x86_int(16);
             } else if (trap) {
                 flags_rebuild();
 #ifdef USE_DEBUG_REGS_486
diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h
index f969390d2..bd841ccc6 100644
--- a/src/cpu/cpu.h
+++ b/src/cpu/cpu.h
@@ -814,6 +814,8 @@ extern int lock_legal_80[8];
 extern int lock_legal_f6[8];
 extern int lock_legal_fe[8];
 
+extern int new_ne;
+
 extern int in_lock;
 extern int cpu_override_interpreter;
 
diff --git a/src/cpu/x86.c b/src/cpu/x86.c
index 8a0bd830f..6f15560f3 100644
--- a/src/cpu/x86.c
+++ b/src/cpu/x86.c
@@ -271,6 +271,7 @@ reset_common(int hard)
     stack32        = 0;
     msr.fcr        = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
     msw            = 0;
+    new_ne         = 0;
     if (hascache)
         cr0 = 1 << 30;
     else
diff --git a/src/cpu/x86_ops_fpu.h b/src/cpu/x86_ops_fpu.h
index 11f603c19..74c67c2ee 100644
--- a/src/cpu/x86_ops_fpu.h
+++ b/src/cpu/x86_ops_fpu.h
@@ -99,8 +99,8 @@ opWAIT(uint32_t fetchdat)
 
     if (fpu_softfloat) {
         if (fpu_state.swd & FPU_SW_Summary) {
-            if (is486 && (cr0 & 0x20))
-                x86_int(16);
+            if (cr0 & 0x20)
+                new_ne = 1;
             else
                 picint(1 << 13);
             return 1;
diff --git a/src/cpu/x86_ops_fpu_2386.h b/src/cpu/x86_ops_fpu_2386.h
index d8996d2e1..cc9c6dcc2 100644
--- a/src/cpu/x86_ops_fpu_2386.h
+++ b/src/cpu/x86_ops_fpu_2386.h
@@ -99,7 +99,10 @@ opWAIT(uint32_t fetchdat)
 
     if (fpu_softfloat) {
         if (fpu_state.swd & FPU_SW_Summary) {
-            picint(1 << 13);
+            if (cr0 & 0x20)
+                new_ne = 1;
+            else
+                picint(1 << 13);
             return 1;
         }
     }
diff --git a/src/cpu/x87.c b/src/cpu/x87.c
index 577fa1a40..3b06cab3c 100644
--- a/src/cpu/x87.c
+++ b/src/cpu/x87.c
@@ -355,10 +355,10 @@ FPU_exception(uint32_t fetchdat, uint16_t exceptions, int store)
                 nmi = 1;
             }
 #else
-           if (is486 && (cr0 & 0x20))
-               x86_int(16);
-            else
-                picint(1 << 13);
+           if (cr0 & 0x20)
+               new_ne = 1;
+           else
+               picint(1 << 13);
 #endif // FPU_8087
         }
         return unmasked;
diff --git a/src/cpu/x87.h b/src/cpu/x87.h
index 2ad0c7b10..4d53725c9 100644
--- a/src/cpu/x87.h
+++ b/src/cpu/x87.h
@@ -228,8 +228,8 @@ FPU_save_regi_tag(extFloat80_t reg, int tag, int stnr)
 #define FPU_check_pending_exceptions()        \
     do {                                      \
         if (fpu_state.swd & FPU_SW_Summary) { \
-            if (is486 && (cr0 & 0x20))        \
-                x86_int(16);                  \
+            if (cr0 & 0x20)                   \
+                new_ne = 1;                   \
             else                              \
                 picint(1 << 13);              \
             return 1;                         \
diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h
index e1bc5858a..d33122b5c 100644
--- a/src/cpu/x87_ops.h
+++ b/src/cpu/x87_ops.h
@@ -99,8 +99,8 @@ typedef union {
                     dst = src1 / (double) src2;         \
                 else {                                  \
                     fpu_log("FPU : divide by zero\n");  \
-                    if (is486 && (cr0 & 0x20))          \
-                        x86_int(16);                    \
+                    if (cr0 & 0x20)                     \
+                        new_ne = 1;                     \
                     else                                \
                         picint(1 << 13);                \
                     return 1;                           \