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Mass ALi work

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It includes the M1489 which the rewritten M1429. Also a machine for the new 931APM SIO
This commit is contained in:
tiseno100
2020-08-10 12:20:29 +03:00
committed by GitHub
parent 965511c6a2
commit 415a4c4f58
8 changed files with 633 additions and 65 deletions
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164
src/chipset/ali1429.c
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@@ -6,103 +6,144 @@
*
* This file is part of the 86Box distribution.
*
* Implementation of the ALi M-1429/1431 chipset.
* Implementation of the ALi M1429 chipset.
*
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
*
* Authors: Tiseno100
*
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2020 Tiseno100
*
* Copyright 2008-2019 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/timer.h>
#include <86box/port_92.h>
#include <86box/chipset.h>
#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
#ifdef ENABLE_ALI1429_LOG
int ali1429_do_log = ENABLE_ALI1429_LOG;
static void
ali1429_log(const char *fmt, ...)
{
va_list ap;
if (ali1429_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define ali1429_log(fmt, ...)
#endif
typedef struct
{
uint8_t cur_reg,
regs[256];
uint8_t index, cfg_locked,
regs[256];
} ali1429_t;
static void
ali1429_recalc(ali1429_t *dev)
static void ali1429_shadow_recalc(ali1429_t *dev)
{
uint32_t base;
uint32_t i, shflags = 0;
shadowbios = 0;
shadowbios_write = 0;
uint32_t base, i, can_write, can_read;
for (i = 0; i < 8; i++) {
base = 0xc0000 + (i << 15);
shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
if (dev->regs[0x13] & (1 << i)) {
shadowbios |= (base >= 0xe8000) && !!(dev->regs[0x14] & 0x01);
shadowbios_write |= (base >= 0xe8000) && !!(dev->regs[0x14] & 0x02);
shflags = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
shflags |= !(dev->regs[0x14] & 0x02) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL;
mem_set_mem_state(base, 0x8000, shflags);
} else
mem_set_mem_state(base, 0x8000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
}
can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
for(i = 0; i < 8; i++)
{
base = 0xc0000 + (i << 15);
if(dev->regs[0x13] & (1 << i))
mem_set_mem_state_both(base, 0x8000, can_read | can_write);
else
mem_set_mem_state_both(base, 0x8000, disabled_shadow);
flushmmucache();
}
flushmmucache();
}
static void
ali1429_write(uint16_t port, uint8_t val, void *priv)
ali1429_write(uint16_t addr, uint8_t val, void *priv)
{
ali1429_t *dev = (ali1429_t *) priv;
if (port & 1) {
dev->regs[dev->cur_reg] = val;
switch (addr) {
case 0x22:
dev->index = val;
break;
case 0x23:
switch (dev->cur_reg) {
case 0x13:
ali1429_recalc(dev);
break;
case 0x14:
ali1429_recalc(dev);
break;
}
} else
dev->cur_reg = val;
/* Don't log register unlock patterns */
if(dev->index != 0x03)
{
ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
}
dev->regs[dev->index] = val;
/* Unlock/Lock Registers */
dev->cfg_locked = !(dev->regs[0x03] && 0xc5);
if(dev->cfg_locked == 0)
{
switch(dev->index){
/* Shadow RAM */
case 0x13:
case 0x14:
ali1429_shadow_recalc(dev);
break;
/* Cache */
case 0x18:
cpu_cache_ext_enabled = (val & 0x80);
break;
}
}
break;
}
}
static uint8_t
ali1429_read(uint16_t port, void *priv)
ali1429_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
ali1429_t *dev = (ali1429_t *) priv;
if (!(port & 1))
ret = dev->cur_reg;
else if (((dev->cur_reg >= 0xc0) || (dev->cur_reg == 0x20)) && cpu_iscyrix)
ret = 0xff; /*Don't conflict with Cyrix config registers*/
else
ret = dev->regs[dev->cur_reg];
switch (addr) {
case 0x23:
/* Do not conflict with Cyrix configuration registers */
if(!(((dev->index >= 0xc0) || (dev->index == 0x20)) && cpu_iscyrix))
ret = dev->regs[dev->index];
break;
}
return ret;
}
@@ -123,21 +164,28 @@ ali1429_init(const device_t *info)
ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t));
memset(dev, 0, sizeof(ali1429_t));
memset(dev->regs, 0xff, 256);
dev->regs[0x13] = dev->regs[0x14] = 0x00;
io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
ali1429_recalc(dev);
/*
M1429 Ports:
22h Index Port
23h Data Port
*/
io_sethandler(0x022, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
io_sethandler(0x023, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
dev->cfg_locked = 1;
device_add(&port_92_device);
dev->regs[0x13] = 0x00;
dev->regs[0x14] = 0x00;
ali1429_shadow_recalc(dev);
return dev;
}
const device_t ali1429_device = {
"ALi-M1429",
"ALi M1429",
0,
0,
ali1429_init, ali1429_close, NULL,