diff --git a/src/scat.c b/src/scat.c index 4846501a9..78f6b52d3 100644 --- a/src/scat.c +++ b/src/scat.c @@ -56,7 +56,7 @@ void scat_set_xms_bound(uint8_t val) uint32_t max_xms_size = (mem_size >= 16384) ? 0xFC0000 : mem_size << 10; int i; - switch (val) + switch (val & 0x0F) { case 1: scat_xms_bound = 0x100000; @@ -96,19 +96,21 @@ void scat_set_xms_bound(uint8_t val) break; } - if ((scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3) + if ((val & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3) { if (val != 1) { + if(mem_size > 1024) mem_mapping_disable(&ram_high_mapping); for(i=0;i<6;i++) mem_mapping_enable(&scat_shadowram_mapping[i]); - if (val == 0) + if ((val & 0x0F) == 0) scat_xms_bound = 0x160000; } else { for(i=0;i<6;i++) mem_mapping_disable(&scat_shadowram_mapping[i]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); } pclog("Set XMS bound(%02X) = %06X(%dKbytes for EMS access)\n", val, scat_xms_bound, (0x160000 - scat_xms_bound) >> 10); if (scat_xms_bound > 0x100000) @@ -118,6 +120,10 @@ void scat_set_xms_bound(uint8_t val) } else { + for(i=0;i<6;i++) + mem_mapping_disable(&scat_shadowram_mapping[i]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); + if (scat_xms_bound > max_xms_size) scat_xms_bound = max_xms_size; pclog("Set XMS bound(%02X) = %06X(%dKbytes for EMS access)\n", val, scat_xms_bound, ((mem_size << 10) - scat_xms_bound) >> 10); @@ -144,7 +150,7 @@ uint32_t get_scat_addr(uint32_t addr, scat_t *p) addr |= (addr & 0x180000) << 2; } - if ((scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3 && addr >= 0x100000 && addr < 0x160000) + if ((scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3 && (addr & ~0x600000) >= 0x100000 && (addr & ~0x600000) < 0x160000) addr ^= mem_size < 2048 ? 0x1F0000 : 0x670000; return addr; } @@ -246,8 +252,7 @@ void scat_write(uint16_t port, uint8_t val, void *priv) { if((val & 0x0F) == 3) { - if(mem_size > 640) mem_mapping_disable(&scat_A000_BFFF_mapping); - if(mem_size > 768) mem_mapping_disable(&ram_mid_mapping); + if(mem_size > 1024) mem_mapping_disable(&ram_high_mapping); for(index=0;index<6;index++) mem_mapping_enable(&scat_shadowram_mapping[index]); } @@ -255,13 +260,15 @@ void scat_write(uint16_t port, uint8_t val, void *priv) { for(index=0;index<6;index++) mem_mapping_disable(&scat_shadowram_mapping[index]); - if(mem_size > 640 && (val & 0x0F) > 3) - { - mem_mapping_enable(&scat_A000_BFFF_mapping); - if(mem_size > 768) mem_mapping_enable(&ram_mid_mapping); - } + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); } } + else + { + for(index=0;index<6;index++) + mem_mapping_disable(&scat_shadowram_mapping[index]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); + } scat_map_update = 1; cpu_waitstates = (val & 0x70) == 0 ? 1 : 2; @@ -270,9 +277,9 @@ void scat_write(uint16_t port, uint8_t val, void *priv) scat_reg_valid = 1; break; case SCAT_EXTENDED_BOUNDARY: - scat_set_xms_bound(val & 0x0f); + scat_set_xms_bound(val & 0x4f); mem_set_mem_state(0x40000, 0x60000, (val & 0x20) ? MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL : MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - scat_map_update = 1; + if((val ^ scat_regs[SCAT_EXTENDED_BOUNDARY]) & 0x40) scat_map_update = 1; scat_reg_valid = 1; break; case SCAT_ROM_ENABLE: