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More newline and whitespace cleanups

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This commit is contained in:
Jasmine Iwanek
2022-02-20 02:26:27 -05:00
parent a66e392b26
commit 4674756664
401 changed files with 6985 additions and 6985 deletions
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16
src/network/net_3c503.c
View File

@@ -129,7 +129,7 @@ threec503_interrupt(void *priv, int set)
case 5:
dev->regs.idcfr = 0x80;
break;
}
}
if (set)
picint(1 << dev->base_irq);
@@ -177,7 +177,7 @@ threec503_set_drq(threec503_t *dev)
case 3:
dev->regs.idcfr = 4;
break;
}
}
}
@@ -195,7 +195,7 @@ threec503_reset(void *priv)
memset(&dev->regs, 0, sizeof(dev->regs));
dev->regs.ctrl = 0x0a;
dev->regs.ctrl = 0x0a;
}
@@ -399,7 +399,7 @@ threec503_nic_hi_read(uint16_t addr, void *priv)
if (!(dev->regs.ctrl & 0x80))
return 0xff;
threec503_set_drq(dev);
threec503_set_drq(dev);
return dp8390_chipmem_read(dev->dp8390, dev->regs.da++, 1);
}
@@ -529,7 +529,7 @@ threec503_nic_hi_write(uint16_t addr, uint8_t val, void *priv)
if (!(dev->regs.ctrl & 0x80))
return;
threec503_set_drq(dev);
threec503_set_drq(dev);
dp8390_chipmem_write(dev->dp8390, dev->regs.da++, val, 1);
break;
@@ -542,7 +542,7 @@ threec503_nic_ioset(threec503_t *dev, uint16_t addr)
{
io_sethandler(addr, 0x10,
threec503_nic_lo_read, NULL, NULL,
threec503_nic_lo_write, NULL, NULL, dev);
threec503_nic_lo_write, NULL, NULL, dev);
io_sethandler(addr+0x400, 0x10,
threec503_nic_hi_read, NULL, NULL,
@@ -575,7 +575,7 @@ threec503_nic_init(const device_t *info)
* PnP and PCI devices start with address spaces inactive.
*/
threec503_nic_ioset(dev, dev->base_address);
/* Set up our BIA. */
if (mac & 0xff000000) {
/* Generate new local MAC. */
@@ -597,7 +597,7 @@ threec503_nic_init(const device_t *info)
dev->dp8390->interrupt = threec503_interrupt;
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ);
dp8390_mem_alloc(dev->dp8390, 0x2000, 0x2000);
memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal));
threec503_log("I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",

4
src/network/net_dp8390.c
View File

@@ -224,7 +224,7 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val)
/* Send the packet to the system driver */
dev->CR.tx_packet = 1;
network_tx(&dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes);
/* some more debug */
@@ -835,7 +835,7 @@ dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len)
{
dp8390_log("DP8390: Page2 read from register 0x%02x, len=%u\n",
off, len);
switch(off) {
case 0x01: /* PSTART */
return(dev->page_start);

30
src/network/net_ne2000.c
View File

@@ -84,7 +84,7 @@ static uint8_t rtl8019as_pnp_rom[] = {
0x4a, 0x8c, 0x80, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, /* RTL8019, dummy checksum (filled in by isapnp_add_card) */
0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */
0x82, 0x22, 0x00, 'R', 'E', 'A', 'L', 'T', 'E', 'K', ' ', 'P', 'L', 'U', 'G', ' ', '&', ' ', 'P', 'L', 'A', 'Y', ' ', 'E', 'T', 'H', 'E', 'R', 'N', 'E', 'T', ' ', 'C', 'A', 'R', 'D', 0x00, /* ANSI identifier */
0x16, 0x4a, 0x8c, 0x80, 0x19, 0x02, 0x00, /* logical device RTL8019 */
0x1c, 0x41, 0xd0, 0x80, 0xd6, /* compatible device PNP80D6 */
0x47, 0x00, 0x20, 0x02, 0x80, 0x03, 0x20, 0x20, /* I/O 0x220-0x380, decodes 10-bit, 32-byte alignment, 32 addresses */
@@ -303,8 +303,8 @@ asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
case 0x0f: /* Reset register */
/* end of reset pulse */
break;
break;
default: /* this is invalid, but happens under win95 device detection */
nelog(3, "%s: ASIC write invalid address %04x, ignoring\n",
dev->name, (unsigned)off);
@@ -316,7 +316,7 @@ asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
/* Writes to this page are illegal. */
static uint32_t
page3_read(nic_t *dev, uint32_t off, unsigned int len)
{
{
if (dev->board >= NE2K_RTL8019AS) switch(off) {
case 0x1: /* 9346CR */
return(dev->_9346cr);
@@ -573,7 +573,7 @@ nic_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv)
static void
nic_ioset(nic_t *dev, uint16_t addr)
{
{
if (dev->is_pci) {
io_sethandler(addr, 32,
nic_readb, nic_readw, nic_readl,
@@ -623,14 +623,14 @@ static void
nic_update_bios(nic_t *dev)
{
int reg_bios_enable;
reg_bios_enable = 1;
if (! dev->has_bios) return;
if (dev->is_pci)
reg_bios_enable = dev->pci_bar[1].addr_regs[0] & 0x01;
/* PCI BIOS stuff, just enable_disable. */
if (reg_bios_enable) {
mem_mapping_set_addr(&dev->bios_rom.mapping,
@@ -871,7 +871,7 @@ nic_mca_write(int port, uint8_t val, void *priv)
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
nic_ioremove(dev, dev->base_address);
nic_ioremove(dev, dev->base_address);
/* This is always necessary so that the old handler doesn't remain. */
/* Get the new assigned I/O base address. */
@@ -894,13 +894,13 @@ nic_mca_write(int port, uint8_t val, void *priv)
/* Initialize the device if fully configured. */
if (dev->pos_regs[2] & 0x01) {
/* Card enabled; register (new) I/O handler. */
nic_ioset(dev, dev->base_address);
nic_reset(dev);
nelog(2, "EtherNext/MC: Port=%04x, IRQ=%d\n", dev->base_address, dev->base_irq);
}
}
@@ -947,10 +947,10 @@ nic_init(const device_t *info)
} else {
dev->bios_addr = 0x00000;
dev->has_bios = 0;
}
}
}
else {
mca_add(nic_mca_read, nic_mca_write, nic_mca_feedb, NULL, dev);
mca_add(nic_mca_read, nic_mca_write, nic_mca_feedb, NULL, dev);
}
}
@@ -997,7 +997,7 @@ nic_init(const device_t *info)
DP8390_FLAG_CLEAR_IRQ);
dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000);
break;
case NE2K_ETHERNEXT_MC:
dev->maclocal[0] = 0x00; /* 00:00:D8 (Networth Inc. OID) */
dev->maclocal[1] = 0x00;

16
src/network/net_pcap.c
View File

@@ -58,8 +58,8 @@
#include <86box/network.h>
typedef int bpf_int32;
typedef unsigned int bpf_u_int32;
typedef int bpf_int32;
typedef unsigned int bpf_u_int32;
/*
* The instruction data structure.
@@ -79,7 +79,7 @@ struct bpf_program {
struct bpf_insn *bf_insns;
};
typedef struct pcap_if pcap_if_t;
typedef struct pcap_if pcap_if_t;
typedef struct net_timeval {
long tv_sec;
@@ -95,11 +95,11 @@ struct pcap_pkthdr {
};
struct pcap_if {
struct pcap_if *next;
char *name;
char *description;
void *addresses;
unsigned int flags;
struct pcap_if *next;
char *name;
char *description;
void *addresses;
unsigned int flags;
};

190
src/network/net_pcnet.c
View File

@@ -211,7 +211,7 @@ typedef struct {
int board;
int is_pci, is_vlb, is_isa;
int PCIBase;
int MMIOBase;
int MMIOBase;
uint32_t base_address;
int base_irq;
int dma_channel;
@@ -426,7 +426,7 @@ pcnet_do_irq(nic_t *dev, int issue)
picint(1<<dev->base_irq);
else
picintc(1<<dev->base_irq);
}
}
}
/**
@@ -582,7 +582,7 @@ pcnetRmdLoad(nic_t *dev, RMD *rmd, uint32_t addr, int fRetIfNotOwn)
/* Double check the own bit; guest drivers might be buggy and lock prefixes in the recompiler are ignored by other threads. */
if (rmd->rmd1.own == 1 && !(ownbyte & 0x80))
pcnetlog(3, "%s: pcnetRmdLoad: own bit flipped while reading!!\n", dev->name);
if (!(ownbyte & 0x80))
rmd->rmd1.own = 0;
@@ -660,7 +660,7 @@ struct ether_header /** @todo Use RTNETETHERHDR */
#define MULTICAST_FILTER_LEN 8
static __inline uint32_t
static __inline uint32_t
lnc_mchash(const uint8_t *ether_addr)
{
#define LNC_POLYNOMIAL 0xEDB88320UL
@@ -774,7 +774,7 @@ padr_match(nic_t *dev, const uint8_t *buf, int size)
hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2],
hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5],
padr[0],padr[1],padr[2],padr[3],padr[4],padr[5], result);
return result;
}
@@ -790,7 +790,7 @@ padr_bcast(nic_t *dev, const uint8_t *buf, size_t size)
}
static int
static int
ladr_match(nic_t *dev, const uint8_t *buf, size_t size)
{
struct ether_header *hdr = (struct ether_header *)buf;
@@ -815,7 +815,7 @@ ladr_match(nic_t *dev, const uint8_t *buf, size_t size)
/**
* Get the receive descriptor ring address with a given index.
*/
static __inline uint32_t
static __inline uint32_t
pcnetRdraAddr(nic_t *dev, int idx)
{
return dev->GCRDRA + ((CSR_RCVRL(dev) - idx) << dev->iLog2DescSize);
@@ -825,23 +825,23 @@ pcnetRdraAddr(nic_t *dev, int idx)
/**
* Get the transmit descriptor ring address with a given index.
*/
static __inline uint32_t
static __inline uint32_t
pcnetTdraAddr(nic_t *dev, int idx)
{
return dev->GCTDRA + ((CSR_XMTRL(dev) - idx) << dev->iLog2DescSize);
}
static void
static void
pcnetSoftReset(nic_t *dev)
{
pcnetlog(3, "%s: pcnetSoftReset\n", dev->name);
dev->u32Lnkst = 0x40;
dev->GCRDRA = 0;
dev->GCTDRA = 0;
dev->u32RAP = 0;
dev->aCSR[0] = 0x0004;
dev->aCSR[3] = 0x0000;
dev->aCSR[4] = 0x0115;
@@ -893,10 +893,10 @@ static void
pcnetUpdateIrq(nic_t *dev)
{
int iISR = 0;
uint16_t csr0;
uint16_t csr0;
csr0 = dev->aCSR[0];
csr0 &= ~0x0080; /* clear INTR */
if (((csr0 & ~dev->aCSR[3]) & 0x5f00) ||
@@ -905,7 +905,7 @@ pcnetUpdateIrq(nic_t *dev)
iISR = !!(csr0 & 0x0040); /* CSR_INEA */
csr0 |= 0x0080; /* set INTR */
}
if (dev->aCSR[4] & 0x0080) { /* UINTCMD */
dev->aCSR[4] &= ~0x0080; /* clear UINTCMD */
dev->aCSR[4] |= 0x0040; /* set UINT */
@@ -916,25 +916,25 @@ pcnetUpdateIrq(nic_t *dev)
csr0 |= 0x0080; /* set INTR */
iISR = 1;
}
if (((dev->aCSR[5]>>1) & dev->aCSR[5]) & 0x0500) {
iISR = 1;
csr0 |= 0x0080; /* set INTR */
}
if ((dev->aCSR[7] & 0x0c00) == 0x0c00) /* STINT + STINTE */
iISR = 1;
dev->aCSR[0] = csr0;
pcnetlog(2, "%s: pcnetUpdateIrq: iISR=%d\n", dev->name, iISR);
pcnet_do_irq(dev, iISR);
dev->iISR = iISR;
}
static void
static void
pcnetInit(nic_t *dev)
{
int i;
@@ -1023,7 +1023,7 @@ pcnetInit(nic_t *dev)
/**
* Start RX/TX operation.
*/
static void
static void
pcnetStart(nic_t *dev)
{
pcnetlog(3, "%s: pcnetStart: Poll timer\n", dev->name);
@@ -1037,7 +1037,7 @@ pcnetStart(nic_t *dev)
if (!CSR_DRX(dev))
dev->aCSR[0] |= 0x0020; /* set RXON */
dev->aCSR[0] &= ~0x0004; /* clear STOP bit */
dev->aCSR[0] |= 0x0002; /* STRT */
dev->aCSR[0] |= 0x0002; /* STRT */
pcnetPollTimer(dev);
}
@@ -1045,7 +1045,7 @@ pcnetStart(nic_t *dev)
/**
* Stop RX/TX operation.
*/
static void
static void
pcnetStop(nic_t *dev)
{
pcnetlog(3, "%s: pcnetStop: Poll timer\n", dev->name);
@@ -1062,7 +1062,7 @@ pcnetStop(nic_t *dev)
* by the host (the guest driver) anymore. Well, it could but the results are undefined by
* definition.
*/
static void
static void
pcnetRdtePoll(nic_t *dev)
{
/* assume lack of a next receive descriptor */
@@ -1140,7 +1140,7 @@ pcnetRdtePoll(nic_t *dev)
* Poll Transmit Descriptor Table Entry
* @return true if transmit descriptors available
*/
static int
static int
pcnetTdtePoll(nic_t *dev, TMD *tmd)
{
if (dev->GCTDRA) {
@@ -1178,7 +1178,7 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd)
* Poll Transmit Descriptor Table Entry
* @return true if transmit descriptors available
*/
static int
static int
pcnetCalcPacketLen(nic_t *dev, int cb)
{
TMD tmd;
@@ -1244,7 +1244,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
buf = buf1;
size = 60;
}
/*
* Drop packets if the cable is not connected
*/
@@ -1269,7 +1269,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
if (HOST_IS_OWNER(CSR_CRST(dev))) {
/* Not owned by controller. This should not be possible as
* we already called pcnetCanReceive(). */
* we already called pcnetCanReceive(). */
const unsigned cb = 1 << dev->iLog2DescSize;
uint32_t GCPhys = dev->GCRDRA;
iRxDesc = CSR_RCVRL(dev);
@@ -1290,7 +1290,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
uint32_t crda = CSR_CRDA(dev);
uint32_t next_crda;
RMD rmd, next_rmd;
/*
* Ethernet framing considers these two octets to be
* payload type; 802.3 framing considers them to be
@@ -1304,7 +1304,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
if (len_802_3 < 46 && CSR_ASTRP_RCV(dev)) {
size = MIN(sizeof(RTNETETHERHDR) + len_802_3, size);
fStrip = 1;
}
}
memcpy(src, buf, size);
@@ -1315,7 +1315,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
if (!CSR_LOOP(dev))
while (size < 60)
src[size++] = 0;
uint32_t fcs = UINT32_MAX;
uint8_t *p = src;
@@ -1327,7 +1327,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
size += 4;
}
cbPacket = (int)size;
cbPacket = (int)size;
pcnetRmdLoad(dev, &rmd, PHYSADDR(dev, crda), 0);
/* if (!CSR_LAPPEN(dev)) */
@@ -1351,7 +1351,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
*/
dma_bm_write(rbadr, src, cbBuf, dev->transfer_size);
/* RX disabled in the meantime? If so, abort RX. */
if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev)) {
pcnetlog(3, "%s: RX disabled 1\n", dev->name);
@@ -1435,7 +1435,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
dev->aCSR[0] |= 0x0400;
pcnetlog(1, "%s: RINT set, RCVRC=%d CRDA=%#010x\n", dev->name,
CSR_RCVRC(dev), PHYSADDR(dev, CSR_CRDA(dev)));
/* guest driver is owner: force repoll of current and next RDTEs */
CSR_CRST(dev) = 0;
}
@@ -1474,7 +1474,7 @@ pcnetXmitFailTMDGeneric(nic_t *dev, TMD *pTmd)
*
* @threads TX or EMT.
*/
static void
static void
pcnetAsyncTransmit(nic_t *dev)
{
/*
@@ -1502,7 +1502,7 @@ pcnetAsyncTransmit(nic_t *dev)
break;
pcnetlog(3, "%s: TMDLOAD %#010x\n", dev->name, PHYSADDR(dev, CSR_CXDA(dev)));
int fLoopback = CSR_LOOP(dev);
/*
@@ -1510,10 +1510,10 @@ pcnetAsyncTransmit(nic_t *dev)
*/
if (tmd.tmd1.stp && tmd.tmd1.enp) {
const int cb = 4096 - tmd.tmd1.bcnt;
pcnetlog("%s: pcnetAsyncTransmit: stp&enp: cb=%d xmtrc=%#x\n", dev->name, cb, CSR_XMTRC(dev));
pcnetlog("%s: pcnetAsyncTransmit: stp&enp: cb=%d xmtrc=%#x\n", dev->name, cb, CSR_XMTRC(dev));
if ((pcnetIsLinkUp(dev) || fLoopback)) {
/* From the manual: ``A zero length buffer is acceptable as
* long as it is not the last buffer in a chain (STP = 0 and
* ENP = 1).'' That means that the first buffer might have a
@@ -1526,10 +1526,10 @@ pcnetAsyncTransmit(nic_t *dev)
if (HOST_IS_OWNER(CSR_CRST(dev)))
pcnetRdtePoll(dev);
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
} else {
pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos);
network_tx(dev->abLoopBuf, dev->xmit_pos);
network_tx(dev->abLoopBuf, dev->xmit_pos);
}
} else if (cb == 4096) {
/* The Windows NT4 pcnet driver sometimes marks the first
@@ -1537,13 +1537,13 @@ pcnetAsyncTransmit(nic_t *dev)
* passing it back). Do not update the ring counter in this
* case (otherwise that driver becomes even more confused,
* which causes transmit to stall for about 10 seconds).
* This is just a workaround, not a final solution.
* This is just a workaround, not a final solution.
*/
/* r=frank: IMHO this is the correct implementation. The
* manual says: ``If the OWN bit is set and the buffer
* length is 0, the OWN bit will be cleared. In the C-LANCE
* the buffer length of 0 is interpreted as a 4096-byte
* buffer.''
* buffer.''
*/
/* r=michaln: Perhaps not quite right. The C-LANCE (Am79C90)
* datasheet explains that the old LANCE (Am7990) ignored
@@ -1637,12 +1637,12 @@ pcnetAsyncTransmit(nic_t *dev)
pcnetRdtePoll(dev);
pcnetlog(3, "%s: pcnetAsyncTransmit: receive loopback enp\n", dev->name);
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
} else {
pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name);
network_tx(dev->abLoopBuf, dev->xmit_pos);
}
/* Write back the TMD, pass it to the host */
pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev)));
@@ -1667,20 +1667,20 @@ pcnetAsyncTransmit(nic_t *dev)
if (--cMax == 0)
break;
} while (CSR_TXON(dev)); /* transfer on */
if (cFlushIrq) {
dev->aCSR[0] |= 0x0200; /* set TINT */
/* Don't allow the guest to clear TINT before reading it */
dev->u16CSR0LastSeenByGuest &= ~0x0200;
pcnetUpdateIrq(dev);
}
}
}
/**
* Poll for changes in RX and TX descriptor rings.
*/
static void
static void
pcnetPollRxTx(nic_t *dev)
{
if (CSR_RXON(dev)) {
@@ -1742,13 +1742,13 @@ pcnetHardReset(nic_t *dev)
dev->aBCR[BCR_PCISVID] = 0x1022;
/* Reset the error counter. */
dev->uCntBadRMD = 0;
dev->uCntBadRMD = 0;
pcnetSoftReset(dev);
}
static void
static void
pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
{
pcnetlog(1, "%s: pcnet_csr_writew: rap=%d val=%#06x\n", dev->name, rap, val);
@@ -1756,7 +1756,7 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
case 0:
{
uint16_t csr0 = dev->aCSR[0];
/* Clear any interrupt flags.
/* Clear any interrupt flags.
* Don't clear an interrupt flag which was not seen by the guest yet. */
csr0 &= ~(val & 0x7f00 & dev->u16CSR0LastSeenByGuest);
csr0 = (csr0 & ~0x0040) | (val & 0x0048);
@@ -1839,12 +1839,12 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
break;
case 4: /* Test and Features Control */
dev->aCSR[4] &= ~(val & 0x026a);
val &= ~0x026a;
val &= ~0x026a;
val |= dev->aCSR[4] & 0x026a;
break;
case 5: /* Extended Control and Interrupt 1 */
dev->aCSR[5] &= ~(val & 0x0a90);
val &= ~0x0a90;
val &= ~0x0a90;
val |= dev->aCSR[5] & 0x0a90;
break;
case 7: /* Extended Control and Interrupt 2 */
@@ -1896,12 +1896,12 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
dev->GCTDRA = (dev->GCTDRA & 0xffff0000) | (val & 0x0000ffff);
else
dev->GCTDRA = (dev->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCTDRA);
if (dev->GCTDRA & (dev->iLog2DescSize - 1))
pcnetlog(1, "%s: Warning: Misaligned TDRA (GCTDRA=%#010x)\n", dev->name, dev->GCTDRA);
break;
break;
case 58: /* Software Style */
pcnet_bcr_writew(dev,BCR_SWS,val);
break;
@@ -1925,7 +1925,7 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
* HACK ALERT! Set the counter registers too.
*/
dev->aCSR[rap - 4] = val;
break;
break;
default:
return;
}
@@ -2030,22 +2030,22 @@ pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val)
if (dev->board == DEV_AM79C973)
timer_set_delay_u64(&dev->timer_soft_int, (12.8 * val) * TIMER_USEC);
break;
case BCR_MIIMDR:
dev->aMII[dev->aBCR[BCR_MIIADDR] & 0x1f] = val;
break;
default:
break;
}
}
static uint16_t
static uint16_t
pcnet_mii_readw(nic_t *dev, uint16_t miiaddr)
{
uint16_t val;
int autoneg, duplex, fast, isolate;
/* If the DANAS (BCR32.7) bit is set, the MAC does not do any
* auto-negotiation and the PHY must be set up explicitly. DANAS
* effectively disables most other BCR32 bits.
@@ -2059,10 +2059,10 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr)
duplex = (dev->aBCR[BCR_MIICAS] & 0x10) != 0;
fast = (dev->aBCR[BCR_MIICAS] & 0x08) != 0;
}
/* Electrically isolating the PHY mostly disables it. */
isolate = (dev->aMII[0] & 0x400) != 0;
switch (miiaddr) {
case 0:
/* MII basic mode control register. */
@@ -2102,17 +2102,17 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr)
val &= ~0x6000; /* 10 Mbps forced */
}
break;
case 2:
/* PHY identifier 1. */
val = 0x22; /* Am79C874/AC101 PHY */
break;
case 3:
/* PHY identifier 2. */
val = 0x561b; /* Am79C874/AC101 PHY */
break;
case 4:
/* Advertisement control register. */
val = 0x01e0 /* Try 100mbps FD/HD and 10mbps FD/HD. */
@@ -2144,13 +2144,13 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr)
dev->cLinkDownReported++;
}
break;
case 18:
/* Diagnostic Register (FreeBSD pcn/ac101 driver reads this). */
if (dev->fLinkUp && !dev->fLinkTempDown && !isolate) {
val = 0x1000 /* Receive PLL locked. */
| 0x0200; /* Signal detected. */
if (autoneg) {
val |= 0x0400 /* 100Mbps rate. */
| 0x0800; /* Full duplex. */
@@ -2165,16 +2165,16 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr)
dev->cLinkDownReported++;
}
break;
default:
val = 0;
break;
}
return val;
}
static uint16_t
static uint16_t
pcnet_bcr_readw(nic_t *dev, uint16_t rap)
{
uint16_t val;
@@ -2192,7 +2192,7 @@ pcnet_bcr_readw(nic_t *dev, uint16_t rap)
}
val |= (val & 0x017f & dev->u32Lnkst) ? 0x8000 : 0;
break;
case BCR_MIIMDR:
if ((dev->board == DEV_AM79C973) && (((dev->aBCR[BCR_MIIADDR] >> 5) & 0x1f) == 0)) {
uint16_t miiaddr = dev->aBCR[BCR_MIIADDR] & 0x1f;
@@ -2263,7 +2263,7 @@ pcnet_byte_read(nic_t *dev, uint32_t addr)
static uint16_t
pcnet_word_read(nic_t *dev, uint32_t addr)
{
{
uint16_t val = 0xffff;
if (!BCR_DWIO(dev)) {
@@ -2273,7 +2273,7 @@ pcnet_word_read(nic_t *dev, uint32_t addr)
/** Polling is then useless here and possibly expensive. */
if (!CSR_DPOLL(dev))
pcnetPollTimer(dev);
val = pcnet_csr_readw(dev, dev->u32RAP);
if (dev->u32RAP == 0)
goto skip_update_irq;
@@ -2300,7 +2300,7 @@ skip_update_irq:
}
static void
static void
pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val)
{
if (BCR_DWIO(dev)) {
@@ -2327,7 +2327,7 @@ pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val)
static uint32_t
pcnet_dword_read(nic_t *dev, uint32_t addr)
{
{
uint32_t val = 0xffffffff;
if (BCR_DWIO(dev)) {
@@ -2360,7 +2360,7 @@ skip_update_irq:
}
static void
static void
pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val)
{
/* Check APROMWE bit to enable write access */
@@ -2369,7 +2369,7 @@ pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val)
}
static uint32_t
static uint32_t
pcnet_aprom_readb(nic_t *dev, uint32_t addr)
{
uint32_t val = dev->aPROM[addr & 15];
@@ -2547,7 +2547,7 @@ pcnet_mem_disable(nic_t *dev)
static void
pcnet_ioremove(nic_t *dev, uint16_t addr, int len)
{
{
if (dev->is_pci || dev->is_vlb) {
io_removehandler(addr, len,
pcnet_readb, pcnet_readw, pcnet_readl,
@@ -2562,7 +2562,7 @@ pcnet_ioremove(nic_t *dev, uint16_t addr, int len)
static void
pcnet_ioset(nic_t *dev, uint16_t addr, int len)
{
{
pcnet_ioremove(dev, addr, len);
if (dev->is_pci || dev->is_vlb) {
@@ -2572,7 +2572,7 @@ pcnet_ioset(nic_t *dev, uint16_t addr, int len)
} else {
io_sethandler(addr, len,
pcnet_readb, pcnet_readw, NULL,
pcnet_writeb, pcnet_writew, NULL, dev);
pcnet_writeb, pcnet_writew, NULL, dev);
}
}
@@ -2643,10 +2643,10 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
if (dev->MMIOBase != 0)
pcnet_mem_set_addr(dev, dev->MMIOBase);
}
return;
return;
case 0x3C:
dev->base_irq = val;
dev->base_irq = val;
pcnet_pci_regs[addr] = val;
return;
}
@@ -2796,7 +2796,7 @@ pcnet_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv)
*
* @param pThis The PCnet shared instance data.
*/
static void
static void
pcnetTempLinkDown(nic_t *dev)
{
if (dev->fLinkUp) {
@@ -2852,12 +2852,12 @@ pcnetSetLinkState(void *priv)
{
nic_t *dev = (nic_t *) priv;
int fLinkUp;
if (dev->fLinkTempDown) {
pcnetTempLinkDown(dev);
return 1;
}
fLinkUp = (dev->fLinkUp && !dev->fLinkTempDown);
if (dev->fLinkUp != fLinkUp) {
dev->fLinkUp = fLinkUp;
@@ -2871,7 +2871,7 @@ pcnetSetLinkState(void *priv)
dev->aCSR[0] |= 0x8000 | 0x2000; /* ERR | CERR (this is probably wrong) */
}
}
return 0;
}
@@ -2889,7 +2889,7 @@ static void
pcnetTimerRestore(void *priv)
{
nic_t *dev = (nic_t *) priv;
if (dev->cLinkDownReported <= PCNET_MAX_LINKDOWN_REPORTED) {
timer_advance_u64(&dev->timer_restore, 1500000 * TIMER_USEC);
} else {
@@ -2926,10 +2926,10 @@ pcnet_init(const device_t *info)
pcnet_mem_init(dev, 0x0fffff00);
pcnet_mem_disable(dev);
}
dev->fLinkUp = 1;
dev->cMsLinkUpDelay = 5000;
if (dev->board == DEV_AM79C960_EB) {
dev->maclocal[0] = 0x02; /* 02:07:01 (Racal OID) */
dev->maclocal[1] = 0x07;
@@ -2987,7 +2987,7 @@ pcnet_init(const device_t *info)
} else {
/* Must be ASCII W (57h) if compatibility to AMD
driver software is desired */
dev->aPROM[14] = dev->aPROM[15] = 0x57;
dev->aPROM[14] = dev->aPROM[15] = 0x57;
}
for (c = 0, checksum = 0; c < 16; c++)
@@ -3065,14 +3065,14 @@ pcnet_close(void *priv)
nic_t *dev = (nic_t *)priv;
pcnetlog(1, "%s: closed\n", dev->name);
/* Make sure the platform layer is shut down. */
network_close();
if (dev) {
free(dev);
dev = NULL;
}
}
@@ -3118,7 +3118,7 @@ static const device_config_t pcnet_isa_config[] =
},
{
"IRQ 4", 4
},
},
{
"IRQ 5", 5
},
@@ -3149,7 +3149,7 @@ static const device_config_t pcnet_isa_config[] =
""
}
},
},
},
{
"mac", "MAC Address", CONFIG_MAC, "", -1
},
@@ -3188,7 +3188,7 @@ static const device_config_t pcnet_vlb_config[] =
},
{
"IRQ 4", 4
},
},
{
"IRQ 5", 5
},

50
src/network/net_wd8003.c
View File

@@ -181,7 +181,7 @@ static uint8_t
wd_ram_read(uint32_t addr, void *priv)
{
wd_t *dev = (wd_t *)priv;
wdlog("WD80x3: RAM Read: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), dev->dp8390->mem[addr & (dev->ram_size - 1)]);
return dev->dp8390->mem[addr & (dev->ram_size - 1)];
}
@@ -190,7 +190,7 @@ static void
wd_ram_write(uint32_t addr, uint8_t val, void *priv)
{
wd_t *dev = (wd_t *)priv;
dev->dp8390->mem[addr & (dev->ram_size - 1)] = val;
wdlog("WD80x3: RAM Write: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), val);
}
@@ -246,7 +246,7 @@ wd_smc_read(wd_t *dev, uint32_t off)
if (dev->board_chip & WE_ID_SOFT_CONFIG)
retval = dev->laar;
break;
case 0x07:
if (dev->board_chip & WE_ID_SOFT_CONFIG)
retval = dev->if_chip;
@@ -254,32 +254,32 @@ wd_smc_read(wd_t *dev, uint32_t off)
case 0x08:
retval = dev->dp8390->physaddr[0];
break;
break;
case 0x09:
retval = dev->dp8390->physaddr[1];
break;
break;
case 0x0a:
retval = dev->dp8390->physaddr[2];
break;
break;
case 0x0b:
retval = dev->dp8390->physaddr[3];
break;
break;
case 0x0c:
retval = dev->dp8390->physaddr[4];
break;
case 0x0d:
retval = dev->dp8390->physaddr[5];
break;
case 0x0e:
retval = dev->board_chip;
break;
case 0x0f:
/*This has to return the byte that adds up to 0xFF*/
checksum = (dev->dp8390->physaddr[0] + dev->dp8390->physaddr[1] + dev->dp8390->physaddr[2] +
@@ -354,7 +354,7 @@ wd_smc_write(wd_t *dev, uint32_t off, uint32_t val)
wdlog("WD80x3: Memory now %sabled (addr = %08X)\n", (val & WE_MSR_ENABLE_RAM) ? "en" : "dis", dev->ram_addr);
}
break;
/* Bit 1: 0 = 8-bit slot, 1 = 16-bit slot;
Bit 3: 0 = 8k RAM, 1 = 32k RAM (only on revision < 2). */
case 0x01:
@@ -363,7 +363,7 @@ wd_smc_write(wd_t *dev, uint32_t off, uint32_t val)
else
dev->icr = val;
break;
/* Bit 5: Bit 0 of encoded IRQ;
Bit 6: Bit 1 of encoded IRQ;
Bit 7: Enable interrupts. */
@@ -390,7 +390,7 @@ wd_smc_write(wd_t *dev, uint32_t off, uint32_t val)
if (dev->board_chip & WE_ID_SOFT_CONFIG)
dev->if_chip = val;
break;
default:
/* This is invalid, but happens under win95 device detection:
maybe some clone cards implement writing for some other
@@ -415,7 +415,7 @@ wd_read(uint16_t addr, void *priv, int len)
if (off == 0x10)
retval = dp8390_read_cr(dev->dp8390);
else if ((off >= 0x00) && (off <= 0x0f))
retval = wd_smc_read(dev, off);
retval = wd_smc_read(dev, off);
else {
switch(dev->dp8390->CR.pgsel) {
case 0x00:
@@ -431,7 +431,7 @@ wd_read(uint16_t addr, void *priv, int len)
wdlog("%s: unknown value of pgsel in read - %d\n",
dev->name, dev->dp8390->CR.pgsel);
break;
}
}
}
return(retval);
@@ -467,7 +467,7 @@ wd_write(uint16_t addr, uint8_t val, void *priv, unsigned int len)
if (off == 0x10)
dp8390_write_cr(dev->dp8390, val);
else if ((off >= 0x00) && (off <= 0x0f))
wd_smc_write(dev, off, val);
wd_smc_write(dev, off, val);
else {
switch(dev->dp8390->CR.pgsel) {
case 0x00:
@@ -480,7 +480,7 @@ wd_write(uint16_t addr, uint8_t val, void *priv, unsigned int len)
wdlog("%s: unknown value of pgsel in write - %d\n",
dev->name, dev->dp8390->CR.pgsel);
break;
}
}
}
}
@@ -501,7 +501,7 @@ wd_writew(uint16_t addr, uint16_t val, void *priv)
static void
wd_io_set(wd_t *dev, uint16_t addr)
{
{
if (dev->bit16 & 1) {
io_sethandler(addr, 0x20,
wd_readb, wd_readw, NULL,
@@ -516,7 +516,7 @@ wd_io_set(wd_t *dev, uint16_t addr)
static void
wd_io_remove(wd_t *dev, uint16_t addr)
{
{
if (dev->bit16 & 1) {
io_removehandler(addr, 0x20,
wd_readb, wd_readw, NULL,
@@ -711,14 +711,14 @@ wd_init(const device_t *info)
wd_ram_write, NULL, NULL,
NULL, MEM_MAPPING_EXTERNAL, dev);
mem_mapping_disable(&dev->ram_mapping);
mem_mapping_disable(&dev->ram_mapping);
/* Attach ourselves to the network module. */
network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL);
if (!(dev->board_chip & WE_ID_BUS_MCA)) {
wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name,
dev->base_address, dev->irq, dev->ram_addr);
dev->base_address, dev->irq, dev->ram_addr);
}
return(dev);

6
src/network/network.c
View File

@@ -452,7 +452,7 @@ network_close(void)
/* Force-close the SLIRP module. */
net_slirp_close();
/* Close the network events. */
if (poll_data.wake_poll_thread != NULL) {
thread_destroy_event(poll_data.wake_poll_thread);
@@ -667,13 +667,13 @@ int
network_card_get_from_internal_name(char *s)
{
int c = 0;
while (net_cards[c].device != NULL) {
if (! strcmp((char *)net_cards[c].device->internal_name, s))
return(c);
c++;
}
return 0;
}

2
src/network/pcap_if.c
View File

@@ -210,7 +210,7 @@ start_cap(char *dev)
now = hdr->ts.tv_sec;
ltime = localtime(&now);
strftime(temp, sizeof(temp), "%H:%M:%S", ltime);
/* Process and print the packet. */
printf("\n<< %s,%.6ld len=%u\n",
temp, hdr->ts.tv_usec, hdr->len);

20
src/network/slirp/tinyglib.c
View File

@@ -60,22 +60,22 @@ g_strstr_len(const gchar *haystack, gssize haystack_len, const gchar *needle)
gsize haystack_len_unsigned = haystack_len;
const gchar *end;
gsize i;
if (needle_len == 0)
return (gchar *) haystack;
if (haystack_len_unsigned < needle_len)
return NULL;
end = haystack + haystack_len - needle_len;
while (p <= end && *p) {
for (i = 0; i < needle_len; i++)
if (p[i] != needle[i])
goto next;
return (gchar *)p;
next:
p++;
}
@@ -104,10 +104,10 @@ g_strlcpy (gchar *dest,
gchar *d = dest;
const gchar *s = src;
gsize n = dest_size;
if (dest == NULL) return 0;
if (src == NULL) return 0;
/* Copy as many bytes as will fit */
if (n != 0 && --n != 0)
do
@@ -119,7 +119,7 @@ g_strlcpy (gchar *dest,
break;
}
while (--n != 0);
/* If not enough room in dest, add NUL and traverse rest of src */
if (n == 0)
{
@@ -128,6 +128,6 @@ g_strlcpy (gchar *dest,
while (*s++)
;
}
return s - src - 1; /* count does not include NUL */
}