clang-format in src/mem/
This commit is contained in:
Jasmine Iwanek
669
src/mem/spd.c
669
src/mem/spd.c
@@ -28,58 +28,52 @@
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#include <86box/version.h>
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#include <86box/machine.h>
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#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x))
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#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) - 15) : (x))
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int spd_present = 0;
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spd_t *spd_modules[SPD_MAX_SLOTS];
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int spd_present = 0;
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spd_t *spd_modules[SPD_MAX_SLOTS];
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static const device_t spd_device;
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#ifdef ENABLE_SPD_LOG
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int spd_do_log = ENABLE_SPD_LOG;
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static void
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spd_log(const char *fmt, ...)
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{
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va_list ap;
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if (spd_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define spd_log(fmt, ...)
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# define spd_log(fmt, ...)
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#endif
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static void
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spd_close(void *priv)
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{
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spd_log("SPD: close()\n");
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for (uint8_t i = 0; i < SPD_MAX_SLOTS; i++) {
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if (spd_modules[i])
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i2c_eeprom_close(spd_modules[i]->eeprom);
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if (spd_modules[i])
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i2c_eeprom_close(spd_modules[i]->eeprom);
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}
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spd_present = 0;
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}
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static void *
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spd_init(const device_t *info)
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{
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spd_log("SPD: init()\n");
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for (uint8_t i = 0; i < SPD_MAX_SLOTS; i++) {
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if (spd_modules[i])
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spd_modules[i]->eeprom = i2c_eeprom_init(i2c_smbus, SPD_BASE_ADDR + i, spd_modules[i]->data, sizeof(spd_modules[i]->data), 0);
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if (spd_modules[i])
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spd_modules[i]->eeprom = i2c_eeprom_init(i2c_smbus, SPD_BASE_ADDR + i, spd_modules[i]->data, sizeof(spd_modules[i]->data), 0);
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}
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spd_present = 1;
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@@ -87,7 +81,6 @@ spd_init(const device_t *info)
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return &spd_modules;
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}
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int
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comp_ui16_rev(const void *elem1, const void *elem2)
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{
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@@ -96,123 +89,120 @@ comp_ui16_rev(const void *elem1, const void *elem2)
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return ((a > b) ? -1 : ((a < b) ? 1 : 0));
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}
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void
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spd_populate(uint16_t *rows, uint8_t slot_count, uint16_t total_size, uint16_t min_module_size, uint16_t max_module_size, uint8_t enable_asym)
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{
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uint8_t row, next_empty_row, split, i;
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uint8_t row, next_empty_row, split, i;
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uint16_t asym;
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/* Populate rows with modules in power-of-2 capacities. */
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memset(rows, 0, SPD_MAX_SLOTS << 1);
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for (row = 0; row < slot_count && total_size; row++) {
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/* populate slot */
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rows[row] = 1 << log2i(MIN(total_size, max_module_size));
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if (total_size >= rows[row]) {
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spd_log("SPD: Initial row %d = %d MB\n", row, rows[row]);
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total_size -= rows[row];
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} else {
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rows[row] = 0;
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break;
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}
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/* populate slot */
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rows[row] = 1 << log2i(MIN(total_size, max_module_size));
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if (total_size >= rows[row]) {
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spd_log("SPD: Initial row %d = %d MB\n", row, rows[row]);
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total_size -= rows[row];
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} else {
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rows[row] = 0;
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break;
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}
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}
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/* Did we populate all the RAM? */
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if (total_size) {
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/* Work backwards to add the missing RAM as asymmetric modules if possible. */
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if (enable_asym) {
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row = slot_count - 1;
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do {
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asym = (1 << log2i(MIN(total_size, rows[row])));
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if (rows[row] + asym <= max_module_size) {
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rows[row] += asym;
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total_size -= asym;
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}
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} while ((row-- > 0) && total_size);
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}
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/* Work backwards to add the missing RAM as asymmetric modules if possible. */
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if (enable_asym) {
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row = slot_count - 1;
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do {
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asym = (1 << log2i(MIN(total_size, rows[row])));
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if (rows[row] + asym <= max_module_size) {
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rows[row] += asym;
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total_size -= asym;
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}
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} while ((row-- > 0) && total_size);
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}
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if (total_size) /* still not enough */
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spd_log("SPD: Not enough RAM slots (%d) to cover memory (%d MB short)\n", slot_count, total_size);
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if (total_size) /* still not enough */
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spd_log("SPD: Not enough RAM slots (%d) to cover memory (%d MB short)\n", slot_count, total_size);
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}
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/* Populate empty rows by splitting modules... */
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split = (total_size == 0); /* ...if possible. */
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while (split) {
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/* Look for a module to split. */
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split = 0;
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for (row = 0; row < slot_count; row++) {
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if ((rows[row] < (min_module_size << 1)) || (rows[row] != (1 << log2i(rows[row]))))
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continue; /* no module here, module is too small to be split, or asymmetric module */
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/* Look for a module to split. */
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split = 0;
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for (row = 0; row < slot_count; row++) {
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if ((rows[row] < (min_module_size << 1)) || (rows[row] != (1 << log2i(rows[row]))))
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continue; /* no module here, module is too small to be split, or asymmetric module */
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/* Find next empty row. */
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next_empty_row = 0;
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for (i = row + 1; i < slot_count && !next_empty_row; i++) {
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if (!rows[i])
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next_empty_row = i;
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}
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if (!next_empty_row)
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break; /* no empty rows left */
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/* Find next empty row. */
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next_empty_row = 0;
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for (i = row + 1; i < slot_count && !next_empty_row; i++) {
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if (!rows[i])
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next_empty_row = i;
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}
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if (!next_empty_row)
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break; /* no empty rows left */
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/* Split the module into its own row and the next empty row. */
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spd_log("SPD: splitting row %d (%d MB) into %d and %d (%d MB each)\n", row, rows[row], row, next_empty_row, rows[row] >> 1);
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rows[row] = rows[next_empty_row] = rows[row] >> 1;
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split = 1;
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break;
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}
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/* Split the module into its own row and the next empty row. */
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spd_log("SPD: splitting row %d (%d MB) into %d and %d (%d MB each)\n", row, rows[row], row, next_empty_row, rows[row] >> 1);
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rows[row] = rows[next_empty_row] = rows[row] >> 1;
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split = 1;
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break;
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}
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/* Sort rows by descending capacity if any were split. */
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if (split)
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qsort(rows, slot_count, sizeof(uint16_t), comp_ui16_rev);
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/* Sort rows by descending capacity if any were split. */
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if (split)
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qsort(rows, slot_count, sizeof(uint16_t), comp_ui16_rev);
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}
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}
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static int
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spd_write_part_no(char *part_no, char *type, uint16_t size)
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{
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char size_unit;
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if (size >= 1024) {
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size_unit = 'G';
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size >>= 10;
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size_unit = 'G';
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size >>= 10;
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} else {
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size_unit = 'M';
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size_unit = 'M';
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}
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return sprintf(part_no, EMU_NAME "-%s-%03d%c", type, size, size_unit);
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}
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void
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spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
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{
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uint8_t slot, slot_count, row, i;
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uint16_t min_module_size, rows[SPD_MAX_SLOTS], asym;
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spd_edo_t *edo_data;
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uint8_t slot, slot_count, row, i;
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uint16_t min_module_size, rows[SPD_MAX_SLOTS], asym;
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spd_edo_t *edo_data;
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spd_sdram_t *sdram_data;
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/* Determine the minimum module size for this RAM type. */
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switch (ram_type) {
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case SPD_TYPE_FPM:
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case SPD_TYPE_EDO:
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min_module_size = SPD_MIN_SIZE_EDO;
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break;
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case SPD_TYPE_FPM:
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case SPD_TYPE_EDO:
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min_module_size = SPD_MIN_SIZE_EDO;
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break;
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case SPD_TYPE_SDRAM:
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min_module_size = SPD_MIN_SIZE_SDRAM;
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break;
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case SPD_TYPE_SDRAM:
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min_module_size = SPD_MIN_SIZE_SDRAM;
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break;
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default:
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spd_log("SPD: unknown RAM type %02X\n", ram_type);
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return;
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default:
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spd_log("SPD: unknown RAM type %02X\n", ram_type);
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return;
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}
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/* Count how many slots are enabled. */
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slot_count = 0;
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for (slot = 0; slot < SPD_MAX_SLOTS; slot++) {
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rows[slot] = 0;
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if (slot_mask & (1 << slot))
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slot_count++;
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rows[slot] = 0;
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if (slot_mask & (1 << slot))
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slot_count++;
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}
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/* Populate rows. */
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@@ -221,372 +211,367 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
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/* Register SPD devices and populate their data according to the rows. */
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row = 0;
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for (slot = 0; (slot < SPD_MAX_SLOTS) && rows[row]; slot++) {
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if (!(slot_mask & (1 << slot)))
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continue; /* slot disabled */
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if (!(slot_mask & (1 << slot)))
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continue; /* slot disabled */
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spd_modules[slot] = (spd_t *) malloc(sizeof(spd_t));
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memset(spd_modules[slot], 0, sizeof(spd_t));
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spd_modules[slot]->slot = slot;
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spd_modules[slot]->size = rows[row];
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spd_modules[slot] = (spd_t *) malloc(sizeof(spd_t));
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memset(spd_modules[slot], 0, sizeof(spd_t));
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spd_modules[slot]->slot = slot;
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spd_modules[slot]->size = rows[row];
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/* Determine the second row size, from which the first row size can be obtained. */
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asym = rows[row] - (1 << log2i(rows[row])); /* separate the powers of 2 */
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if (!asym) /* is the module asymmetric? */
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asym = rows[row] >> 1; /* symmetric, therefore divide by 2 */
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/* Determine the second row size, from which the first row size can be obtained. */
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asym = rows[row] - (1 << log2i(rows[row])); /* separate the powers of 2 */
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if (!asym) /* is the module asymmetric? */
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asym = rows[row] >> 1; /* symmetric, therefore divide by 2 */
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spd_modules[slot]->row1 = rows[row] - asym;
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spd_modules[slot]->row2 = asym;
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spd_modules[slot]->row1 = rows[row] - asym;
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spd_modules[slot]->row2 = asym;
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spd_log("SPD: Registering slot %d = row %d = %d MB (%d/%d)\n", slot, row, rows[row], spd_modules[slot]->row1, spd_modules[slot]->row2);
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spd_log("SPD: Registering slot %d = row %d = %d MB (%d/%d)\n", slot, row, rows[row], spd_modules[slot]->row1, spd_modules[slot]->row2);
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switch (ram_type) {
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case SPD_TYPE_FPM:
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case SPD_TYPE_EDO:
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edo_data = &spd_modules[slot]->edo_data;
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switch (ram_type) {
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case SPD_TYPE_FPM:
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case SPD_TYPE_EDO:
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edo_data = &spd_modules[slot]->edo_data;
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/* EDO SPD is specified by JEDEC and present in some modules, but
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most utilities cannot interpret it correctly. SIV32 at least gets
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the module capacities right, so it was used as a reference here. */
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edo_data->bytes_used = 0x80;
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edo_data->spd_size = 0x08;
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edo_data->mem_type = ram_type;
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edo_data->row_bits = SPD_ROLLUP(7 + log2i(spd_modules[slot]->row1)); /* first row */
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edo_data->col_bits = 9;
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if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */
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edo_data->row_bits |= SPD_ROLLUP(7 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */
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edo_data->col_bits |= 9 << 4; /* same as first row, but just in case */
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}
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edo_data->banks = 2;
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edo_data->data_width_lsb = 64;
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edo_data->signal_level = SPD_SIGNAL_LVTTL;
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edo_data->trac = 50;
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edo_data->tcac = 13;
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edo_data->refresh_rate = SPD_REFRESH_NORMAL;
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edo_data->dram_width = 8;
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/* EDO SPD is specified by JEDEC and present in some modules, but
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most utilities cannot interpret it correctly. SIV32 at least gets
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the module capacities right, so it was used as a reference here. */
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edo_data->bytes_used = 0x80;
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edo_data->spd_size = 0x08;
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edo_data->mem_type = ram_type;
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edo_data->row_bits = SPD_ROLLUP(7 + log2i(spd_modules[slot]->row1)); /* first row */
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edo_data->col_bits = 9;
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if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */
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edo_data->row_bits |= SPD_ROLLUP(7 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */
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edo_data->col_bits |= 9 << 4; /* same as first row, but just in case */
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}
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edo_data->banks = 2;
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edo_data->data_width_lsb = 64;
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edo_data->signal_level = SPD_SIGNAL_LVTTL;
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edo_data->trac = 50;
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edo_data->tcac = 13;
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edo_data->refresh_rate = SPD_REFRESH_NORMAL;
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edo_data->dram_width = 8;
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edo_data->spd_rev = 0x12;
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for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]);
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i < sizeof(edo_data->part_no); i++)
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edo_data->part_no[i] = ' '; /* part number should be space-padded */
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edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
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edo_data->rev_code[1] = BCD8(EMU_VERSION_MIN);
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edo_data->mfg_year = 20;
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edo_data->mfg_week = 17;
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edo_data->spd_rev = 0x12;
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for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]);
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i < sizeof(edo_data->part_no); i++)
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edo_data->part_no[i] = ' '; /* part number should be space-padded */
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edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
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edo_data->rev_code[1] = BCD8(EMU_VERSION_MIN);
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edo_data->mfg_year = 20;
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edo_data->mfg_week = 17;
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for (i = 0; i < 63; i++)
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edo_data->checksum += spd_modules[slot]->data[i];
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for (i = 0; i < 129; i++)
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edo_data->checksum2 += spd_modules[slot]->data[i];
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break;
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for (i = 0; i < 63; i++)
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edo_data->checksum += spd_modules[slot]->data[i];
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for (i = 0; i < 129; i++)
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edo_data->checksum2 += spd_modules[slot]->data[i];
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break;
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case SPD_TYPE_SDRAM:
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sdram_data = &spd_modules[slot]->sdram_data;
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case SPD_TYPE_SDRAM:
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sdram_data = &spd_modules[slot]->sdram_data;
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sdram_data->bytes_used = 0x80;
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sdram_data->spd_size = 0x08;
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sdram_data->mem_type = ram_type;
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sdram_data->row_bits = SPD_ROLLUP(6 + log2i(spd_modules[slot]->row1)); /* first row */
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sdram_data->col_bits = 9;
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if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */
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sdram_data->row_bits |= SPD_ROLLUP(6 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */
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sdram_data->col_bits |= 9 << 4; /* same as first row, but just in case */
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}
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sdram_data->rows = 2;
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sdram_data->data_width_lsb = 64;
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sdram_data->signal_level = SPD_SIGNAL_LVTTL;
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sdram_data->tclk = 0x75; /* 7.5 ns = 133.3 MHz */
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sdram_data->tac = 0x10;
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sdram_data->refresh_rate = SPD_SDR_REFRESH_SELF | SPD_REFRESH_NORMAL;
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sdram_data->sdram_width = 8;
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sdram_data->tccd = 1;
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sdram_data->burst = SPD_SDR_BURST_PAGE | 1 | 2 | 4 | 8;
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sdram_data->banks = 4;
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sdram_data->cas = 0x1c; /* CAS 5/4/3 supported */
|
||||
sdram_data->cslat = sdram_data->we = 0x7f;
|
||||
sdram_data->dev_attr = SPD_SDR_ATTR_EARLY_RAS | SPD_SDR_ATTR_AUTO_PC | SPD_SDR_ATTR_PC_ALL | SPD_SDR_ATTR_W1R_BURST;
|
||||
sdram_data->tclk2 = 0xA0; /* 10 ns = 100 MHz */
|
||||
sdram_data->tclk3 = 0xF0; /* 15 ns = 66.7 MHz */
|
||||
sdram_data->tac2 = sdram_data->tac3 = 0x10;
|
||||
sdram_data->trp = sdram_data->trrd = sdram_data->trcd = sdram_data->tras = 1;
|
||||
if (spd_modules[slot]->row1 != spd_modules[slot]->row2) {
|
||||
/* Utilities interpret bank_density a bit differently on asymmetric modules. */
|
||||
sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 2); /* first row */
|
||||
sdram_data->bank_density |= 1 << (log2i(spd_modules[slot]->row2 >> 1) - 2); /* second row */
|
||||
} else {
|
||||
sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 1); /* symmetric module = only one bit is set */
|
||||
}
|
||||
sdram_data->ca_setup = sdram_data->data_setup = 0x15;
|
||||
sdram_data->ca_hold = sdram_data->data_hold = 0x08;
|
||||
sdram_data->bytes_used = 0x80;
|
||||
sdram_data->spd_size = 0x08;
|
||||
sdram_data->mem_type = ram_type;
|
||||
sdram_data->row_bits = SPD_ROLLUP(6 + log2i(spd_modules[slot]->row1)); /* first row */
|
||||
sdram_data->col_bits = 9;
|
||||
if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */
|
||||
sdram_data->row_bits |= SPD_ROLLUP(6 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */
|
||||
sdram_data->col_bits |= 9 << 4; /* same as first row, but just in case */
|
||||
}
|
||||
sdram_data->rows = 2;
|
||||
sdram_data->data_width_lsb = 64;
|
||||
sdram_data->signal_level = SPD_SIGNAL_LVTTL;
|
||||
sdram_data->tclk = 0x75; /* 7.5 ns = 133.3 MHz */
|
||||
sdram_data->tac = 0x10;
|
||||
sdram_data->refresh_rate = SPD_SDR_REFRESH_SELF | SPD_REFRESH_NORMAL;
|
||||
sdram_data->sdram_width = 8;
|
||||
sdram_data->tccd = 1;
|
||||
sdram_data->burst = SPD_SDR_BURST_PAGE | 1 | 2 | 4 | 8;
|
||||
sdram_data->banks = 4;
|
||||
sdram_data->cas = 0x1c; /* CAS 5/4/3 supported */
|
||||
sdram_data->cslat = sdram_data->we = 0x7f;
|
||||
sdram_data->dev_attr = SPD_SDR_ATTR_EARLY_RAS | SPD_SDR_ATTR_AUTO_PC | SPD_SDR_ATTR_PC_ALL | SPD_SDR_ATTR_W1R_BURST;
|
||||
sdram_data->tclk2 = 0xA0; /* 10 ns = 100 MHz */
|
||||
sdram_data->tclk3 = 0xF0; /* 15 ns = 66.7 MHz */
|
||||
sdram_data->tac2 = sdram_data->tac3 = 0x10;
|
||||
sdram_data->trp = sdram_data->trrd = sdram_data->trcd = sdram_data->tras = 1;
|
||||
if (spd_modules[slot]->row1 != spd_modules[slot]->row2) {
|
||||
/* Utilities interpret bank_density a bit differently on asymmetric modules. */
|
||||
sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 2); /* first row */
|
||||
sdram_data->bank_density |= 1 << (log2i(spd_modules[slot]->row2 >> 1) - 2); /* second row */
|
||||
} else {
|
||||
sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 1); /* symmetric module = only one bit is set */
|
||||
}
|
||||
sdram_data->ca_setup = sdram_data->data_setup = 0x15;
|
||||
sdram_data->ca_hold = sdram_data->data_hold = 0x08;
|
||||
|
||||
sdram_data->spd_rev = 0x12;
|
||||
for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]);
|
||||
i < sizeof(sdram_data->part_no); i++)
|
||||
sdram_data->part_no[i] = ' '; /* part number should be space-padded */
|
||||
sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
|
||||
sdram_data->rev_code[1] = BCD8(EMU_VERSION_MIN);
|
||||
sdram_data->mfg_year = 20;
|
||||
sdram_data->mfg_week = 13;
|
||||
sdram_data->spd_rev = 0x12;
|
||||
for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]);
|
||||
i < sizeof(sdram_data->part_no); i++)
|
||||
sdram_data->part_no[i] = ' '; /* part number should be space-padded */
|
||||
sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
|
||||
sdram_data->rev_code[1] = BCD8(EMU_VERSION_MIN);
|
||||
sdram_data->mfg_year = 20;
|
||||
sdram_data->mfg_week = 13;
|
||||
|
||||
sdram_data->freq = 100;
|
||||
sdram_data->features = 0xFF;
|
||||
sdram_data->freq = 100;
|
||||
sdram_data->features = 0xFF;
|
||||
|
||||
for (i = 0; i < 63; i++)
|
||||
sdram_data->checksum += spd_modules[slot]->data[i];
|
||||
for (i = 0; i < 129; i++)
|
||||
sdram_data->checksum2 += spd_modules[slot]->data[i];
|
||||
break;
|
||||
}
|
||||
for (i = 0; i < 63; i++)
|
||||
sdram_data->checksum += spd_modules[slot]->data[i];
|
||||
for (i = 0; i < 129; i++)
|
||||
sdram_data->checksum2 += spd_modules[slot]->data[i];
|
||||
break;
|
||||
}
|
||||
|
||||
row++;
|
||||
row++;
|
||||
}
|
||||
|
||||
device_add(&spd_device);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
|
||||
{
|
||||
uint8_t row, dimm, drb, apollo = 0;
|
||||
uint8_t row, dimm, drb, apollo = 0;
|
||||
uint16_t size, rows[SPD_MAX_SLOTS];
|
||||
|
||||
/* Special case for VIA Apollo Pro family, which jumps from 5F to 56. */
|
||||
if (reg_max < reg_min) {
|
||||
apollo = reg_max;
|
||||
reg_max = reg_min + 7;
|
||||
apollo = reg_max;
|
||||
reg_max = reg_min + 7;
|
||||
}
|
||||
|
||||
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
|
||||
if (!spd_present) {
|
||||
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
}
|
||||
|
||||
/* Write DRBs for each row. */
|
||||
spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit);
|
||||
for (row = 0; row <= (reg_max - reg_min); row++) {
|
||||
dimm = (row >> 1);
|
||||
size = 0;
|
||||
dimm = (row >> 1);
|
||||
size = 0;
|
||||
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = (row & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = (row & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
if (apollo && ((drb & 0xf) < 0xa))
|
||||
drb = apollo + (drb & 0xf);
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
if (apollo && ((drb & 0xf) < 0xa))
|
||||
drb = apollo + (drb & 0xf);
|
||||
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
if (row == 0)
|
||||
regs[drb] = 0;
|
||||
else if ((apollo) && (drb == apollo))
|
||||
regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */
|
||||
else
|
||||
regs[drb] = regs[drb - 1];
|
||||
if (size)
|
||||
regs[drb] += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]);
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
if (row == 0)
|
||||
regs[drb] = 0;
|
||||
else if ((apollo) && (drb == apollo))
|
||||
regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */
|
||||
else
|
||||
regs[drb] = regs[drb - 1];
|
||||
if (size)
|
||||
regs[drb] += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Needed for 430LX. */
|
||||
void
|
||||
spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
|
||||
{
|
||||
uint8_t row, dimm, drb;
|
||||
uint8_t row, dimm, drb;
|
||||
uint16_t size, row_val = 0, rows[SPD_MAX_SLOTS];
|
||||
int shift;
|
||||
int shift;
|
||||
|
||||
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
|
||||
if (!spd_present) {
|
||||
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
}
|
||||
|
||||
/* Write DRBs for each row. */
|
||||
spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit);
|
||||
for (row = 0; row <= (reg_max - reg_min); row++) {
|
||||
dimm = (row >> 1);
|
||||
size = 0;
|
||||
dimm = (row >> 1);
|
||||
size = 0;
|
||||
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = (row & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = (row & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
if (row == 0)
|
||||
row_val = 0;
|
||||
if (size)
|
||||
row_val += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */
|
||||
regs[drb] = row_val & 0xff;
|
||||
drb = reg_min + 8 + (row >> 1);
|
||||
shift = (row & 0x01) << 3;
|
||||
regs[drb] = (((row_val & 0xfff) >> 8) << shift);
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]);
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
if (row == 0)
|
||||
row_val = 0;
|
||||
if (size)
|
||||
row_val += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */
|
||||
regs[drb] = row_val & 0xff;
|
||||
drb = reg_min + 8 + (row >> 1);
|
||||
shift = (row & 0x01) << 3;
|
||||
regs[drb] = (((row_val & 0xfff) >> 8) << shift);
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Used by ALi M1531 and M1541/2. */
|
||||
void
|
||||
spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
|
||||
{
|
||||
uint8_t row, dimm;
|
||||
uint8_t drb;
|
||||
uint8_t row, dimm;
|
||||
uint8_t drb;
|
||||
uint16_t size, size_acc = 0;
|
||||
uint16_t rows[SPD_MAX_SLOTS];
|
||||
|
||||
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
|
||||
if (!spd_present) {
|
||||
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
}
|
||||
|
||||
/* Write DRBs for each row. */
|
||||
spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit);
|
||||
for (row = 0; row <= (reg_max - reg_min); row += 2) {
|
||||
dimm = (row >> 2);
|
||||
size = 0;
|
||||
dimm = (row >> 2);
|
||||
size = 0;
|
||||
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = ((row >> 1) & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = ((row >> 1) & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
if (spd_modules[dimm]) {
|
||||
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
|
||||
size = ((row >> 1) & 1) ? 0 : drb_unit;
|
||||
else
|
||||
size = ((row >> 1) & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
|
||||
}
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
/* Determine the DRB register to write. */
|
||||
drb = reg_min + row;
|
||||
|
||||
/* Calculate previous and new size. */
|
||||
if (row == 0)
|
||||
size_acc = 0;
|
||||
else
|
||||
size_acc += (size / drb_unit);
|
||||
/* Calculate previous and new size. */
|
||||
if (row == 0)
|
||||
size_acc = 0;
|
||||
else
|
||||
size_acc += (size / drb_unit);
|
||||
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
regs[drb] = size_acc & 0xff;
|
||||
regs[drb + 1] = (regs[drb + 1] & 0xf0) | ((size_acc >> 8) & 0x0f);
|
||||
/* Write DRB register, adding the previous DRB's value. */
|
||||
regs[drb] = size_acc & 0xff;
|
||||
regs[drb + 1] = (regs[drb + 1] & 0xf0) | ((size_acc >> 8) & 0x0f);
|
||||
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row >> 1, size, regs[drb]);
|
||||
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row >> 1, size, regs[drb]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* This is needed because the ALi M1621 does this stuff completely differently,
|
||||
as it has DRAM bank registers instead of DRAM row boundary registers. */
|
||||
void
|
||||
spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max)
|
||||
{
|
||||
uint8_t dimm, drb;
|
||||
uint8_t dimm, drb;
|
||||
uint16_t size;
|
||||
uint16_t rows[SPD_MAX_SLOTS];
|
||||
|
||||
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
|
||||
if (!spd_present) {
|
||||
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
|
||||
spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
|
||||
}
|
||||
|
||||
/* Write DRBs for each row. */
|
||||
spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit);
|
||||
for (dimm = 0; dimm <= ((reg_max - reg_min) >> 2); dimm++) {
|
||||
size = 0;
|
||||
drb = reg_min + (dimm << 2);
|
||||
size = 0;
|
||||
drb = reg_min + (dimm << 2);
|
||||
|
||||
regs[drb] = 0xff;
|
||||
regs[drb + 1] = 0xff;
|
||||
regs[drb + 2] = 0x00;
|
||||
regs[drb + 3] = 0xf0;
|
||||
regs[drb] = 0xff;
|
||||
regs[drb + 1] = 0xff;
|
||||
regs[drb + 2] = 0x00;
|
||||
regs[drb + 3] = 0xf0;
|
||||
|
||||
if (spd_modules[dimm] == NULL)
|
||||
continue;
|
||||
if (spd_modules[dimm] == NULL)
|
||||
continue;
|
||||
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
size = (spd_modules[dimm]->row1 + spd_modules[dimm]->row2) >> 1;
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
if (spd_present) {
|
||||
/* SPD enabled: use SPD info for this slot, if present. */
|
||||
size = (spd_modules[dimm]->row1 + spd_modules[dimm]->row2) >> 1;
|
||||
} else {
|
||||
/* No SPD: use the values calculated above. */
|
||||
size = (rows[dimm] >> 1);
|
||||
}
|
||||
|
||||
if (spd_modules[dimm]->row1)
|
||||
regs[drb + 3] |= 0x06;
|
||||
if (spd_modules[dimm]->row1)
|
||||
regs[drb + 3] |= 0x06;
|
||||
|
||||
switch (size) {
|
||||
case 4:
|
||||
default:
|
||||
regs[drb + 2] = 0x00;
|
||||
break;
|
||||
case 8:
|
||||
regs[drb + 2] = 0x10;
|
||||
break;
|
||||
case 16:
|
||||
regs[drb + 2] = 0x20;
|
||||
break;
|
||||
case 32:
|
||||
regs[drb + 2] = 0x30;
|
||||
break;
|
||||
case 64:
|
||||
regs[drb + 2] = 0x40;
|
||||
break;
|
||||
case 128:
|
||||
regs[drb + 2] = 0x50;
|
||||
break;
|
||||
case 256:
|
||||
regs[drb + 2] = 0x60;
|
||||
break;
|
||||
}
|
||||
switch (size) {
|
||||
case 4:
|
||||
default:
|
||||
regs[drb + 2] = 0x00;
|
||||
break;
|
||||
case 8:
|
||||
regs[drb + 2] = 0x10;
|
||||
break;
|
||||
case 16:
|
||||
regs[drb + 2] = 0x20;
|
||||
break;
|
||||
case 32:
|
||||
regs[drb + 2] = 0x30;
|
||||
break;
|
||||
case 64:
|
||||
regs[drb + 2] = 0x40;
|
||||
break;
|
||||
case 128:
|
||||
regs[drb + 2] = 0x50;
|
||||
break;
|
||||
case 256:
|
||||
regs[drb + 2] = 0x60;
|
||||
break;
|
||||
}
|
||||
|
||||
if (spd_modules[dimm]->row2) {
|
||||
regs[drb + 3] |= 0x01;
|
||||
regs[drb + 2] |= 0x80;
|
||||
}
|
||||
if (spd_modules[dimm]->row2) {
|
||||
regs[drb + 3] |= 0x01;
|
||||
regs[drb + 2] |= 0x80;
|
||||
}
|
||||
|
||||
spd_log("SPD: DIMM %i: %02X %02X %02X %02X\n", regs[drb], regs[drb + 1], regs[drb + 2], regs[drb + 3]);
|
||||
spd_log("SPD: DIMM %i: %02X %02X %02X %02X\n", regs[drb], regs[drb + 1], regs[drb + 2], regs[drb + 3]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static const device_t spd_device = {
|
||||
.name = "Serial Presence Detect ROMs",
|
||||
.name = "Serial Presence Detect ROMs",
|
||||
.internal_name = "spd",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = 0,
|
||||
.init = spd_init,
|
||||
.close = spd_close,
|
||||
.reset = NULL,
|
||||
.flags = DEVICE_ISA,
|
||||
.local = 0,
|
||||
.init = spd_init,
|
||||
.close = spd_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user