clang-format in src/mem/
This commit is contained in:
@@ -32,62 +32,57 @@
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#include <86box/plat.h>
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#include <86box/m_xt_xi8088.h>
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typedef struct sst_t {
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uint8_t manufacturer, id, has_bbp, is_39,
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page_bytes, sdp, bbp_first_8k, bbp_last_8k;
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typedef struct sst_t
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{
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uint8_t manufacturer, id, has_bbp, is_39,
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page_bytes, sdp, bbp_first_8k, bbp_last_8k;
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int command_state, id_mode,
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dirty;
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int command_state, id_mode,
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dirty;
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uint32_t size, mask,
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page_mask, page_base,
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last_addr;
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uint32_t size, mask,
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page_mask, page_base,
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last_addr;
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uint8_t page_buffer[128],
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page_dirty[128];
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uint8_t *array;
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uint8_t page_buffer[128],
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page_dirty[128];
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uint8_t *array;
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mem_mapping_t mapping[8], mapping_h[8];
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mem_mapping_t mapping[8], mapping_h[8];
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pc_timer_t page_write_timer;
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pc_timer_t page_write_timer;
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} sst_t;
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static char flash_path[1024];
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static char flash_path[1024];
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#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */
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#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */
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#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */
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#define W_BOOT_BLOCK_PROT 0x40 /* Only W29C020 */
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#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */
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#define SST_ERASE 0x80 /* Both 29 and 39 */
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/* With data 60h on 6th cycle, it's alt. ID */
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#define SST_SET_ID_MODE 0x90 /* Both 29 and 39 */
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#define SST_BYTE_PROGRAM 0xa0 /* Both 29 and 39 */
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#define SST_CLEAR_ID_MODE 0xf0 /* Both 29 and 39 */
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/* 1st cycle variant only on 39 */
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#define SST 0xbf /* SST Manufacturer's ID */
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#define SST29EE010 0x0700
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#define SST29LE_VE010 0x0800
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#define SST29EE020 0x1000
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#define SST29LE_VE020 0x1200
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#define SST39SF512 0xb400
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#define SST39SF010 0xb500
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#define SST39SF020 0xb600
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#define SST39SF040 0xb700
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#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */
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#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */
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#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */
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#define W_BOOT_BLOCK_PROT 0x40 /* Only W29C020 */
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#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */
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#define SST_ERASE 0x80 /* Both 29 and 39 */
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/* With data 60h on 6th cycle, it's alt. ID */
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#define SST_SET_ID_MODE 0x90 /* Both 29 and 39 */
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#define SST_BYTE_PROGRAM 0xa0 /* Both 29 and 39 */
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#define SST_CLEAR_ID_MODE 0xf0 /* Both 29 and 39 */
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/* 1st cycle variant only on 39 */
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#define SST 0xbf /* SST Manufacturer's ID */
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#define SST29EE010 0x0700
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#define SST29LE_VE010 0x0800
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#define SST29EE020 0x1000
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#define SST29LE_VE020 0x1200
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#define SST39SF512 0xb400
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#define SST39SF010 0xb500
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#define SST39SF020 0xb600
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#define SST39SF040 0xb700
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#define WINBOND 0xda /* Winbond Manufacturer's ID */
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#define W29C020 0x4500
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#define SIZE_512K 0x010000
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#define SIZE_1M 0x020000
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#define SIZE_2M 0x040000
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#define SIZE_4M 0x080000
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#define WINBOND 0xda /* Winbond Manufacturer's ID */
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#define W29C020 0x4500
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#define SIZE_512K 0x010000
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#define SIZE_1M 0x020000
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#define SIZE_2M 0x040000
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#define SIZE_4M 0x080000
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static void
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sst_sector_erase(sst_t *dev, uint32_t addr)
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@@ -95,330 +90,323 @@ sst_sector_erase(sst_t *dev, uint32_t addr)
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uint32_t base = addr & (dev->mask & ~0xfff);
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if ((base < 0x2000) && (dev->bbp_first_8k & 0x01))
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return;
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return;
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else if ((base >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01))
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return;
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return;
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memset(&dev->array[base], 0xff, 4096);
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dev->dirty = 1;
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}
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static void
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sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
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{
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uint32_t base = 0x00000, size = dev->size;
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if (dev->command_state == 5) switch (val) {
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case SST_CHIP_ERASE:
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if (dev->bbp_first_8k & 0x01) {
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base += 0x2000;
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size -= 0x2000;
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}
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if (dev->command_state == 5)
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switch (val) {
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case SST_CHIP_ERASE:
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if (dev->bbp_first_8k & 0x01) {
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base += 0x2000;
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size -= 0x2000;
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}
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if (dev->bbp_last_8k & 0x01)
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size -= 0x2000;
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if (dev->bbp_last_8k & 0x01)
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size -= 0x2000;
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memset(&(dev->array[base]), 0xff, size);
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dev->command_state = 0;
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break;
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memset(&(dev->array[base]), 0xff, size);
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dev->command_state = 0;
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break;
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case SST_SDP_DISABLE:
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if (!dev->is_39)
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dev->sdp = 0;
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dev->command_state = 0;
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break;
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case SST_SDP_DISABLE:
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if (!dev->is_39)
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dev->sdp = 0;
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dev->command_state = 0;
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break;
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case SST_SECTOR_ERASE:
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if (dev->is_39)
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sst_sector_erase(dev, addr);
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dev->command_state = 0;
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break;
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case SST_SECTOR_ERASE:
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if (dev->is_39)
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sst_sector_erase(dev, addr);
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dev->command_state = 0;
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break;
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case SST_SET_ID_MODE_ALT:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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case SST_SET_ID_MODE_ALT:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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default:
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dev->command_state = 0;
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break;
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} else switch (val) {
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case SST_ERASE:
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dev->command_state = 3;
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break;
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default:
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dev->command_state = 0;
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break;
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}
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else
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switch (val) {
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case SST_ERASE:
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dev->command_state = 3;
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break;
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case SST_SET_ID_MODE:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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case SST_SET_ID_MODE:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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case SST_BYTE_PROGRAM:
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if (!dev->is_39) {
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dev->sdp = 1;
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->last_addr = 0xffffffff;
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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dev->command_state = 6;
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break;
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case SST_BYTE_PROGRAM:
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if (!dev->is_39) {
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dev->sdp = 1;
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->last_addr = 0xffffffff;
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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dev->command_state = 6;
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break;
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case W_BOOT_BLOCK_PROT:
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dev->command_state = dev->has_bbp ? 8 : 0;
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break;
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case W_BOOT_BLOCK_PROT:
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dev->command_state = dev->has_bbp ? 8 : 0;
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break;
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case SST_CLEAR_ID_MODE:
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dev->id_mode = 0;
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dev->command_state = 0;
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break;
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case SST_CLEAR_ID_MODE:
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dev->id_mode = 0;
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dev->command_state = 0;
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break;
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default:
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dev->command_state = 0;
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break;
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}
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default:
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dev->command_state = 0;
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break;
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}
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}
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static void
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sst_page_write(void *priv)
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{
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sst_t *dev = (sst_t *) priv;
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int i;
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int i;
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if (dev->last_addr != 0xffffffff) {
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dev->page_base = dev->last_addr & dev->page_mask;
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for (i = 0; i < 128; i++) {
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if (dev->page_dirty[i]) {
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if (((dev->page_base + i) < 0x2000) && (dev->bbp_first_8k & 0x01))
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continue;
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else if (((dev->page_base + i) >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01))
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continue;
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dev->page_base = dev->last_addr & dev->page_mask;
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for (i = 0; i < 128; i++) {
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if (dev->page_dirty[i]) {
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if (((dev->page_base + i) < 0x2000) && (dev->bbp_first_8k & 0x01))
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continue;
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else if (((dev->page_base + i) >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01))
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continue;
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dev->array[dev->page_base + i] = dev->page_buffer[i];
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dev->dirty |= 1;
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}
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}
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dev->array[dev->page_base + i] = dev->page_buffer[i];
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dev->dirty |= 1;
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}
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}
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}
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dev->page_bytes = 0;
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dev->page_bytes = 0;
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dev->command_state = 0;
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timer_disable(&dev->page_write_timer);
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}
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static uint8_t
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sst_read_id(uint32_t addr, void *p)
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{
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sst_t *dev = (sst_t *) p;
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sst_t *dev = (sst_t *) p;
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uint8_t ret = 0x00;
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if ((addr & 0xffff) == 0)
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ret = dev->manufacturer;
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ret = dev->manufacturer;
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else if ((addr & 0xffff) == 1)
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ret = dev->id;
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ret = dev->id;
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#ifdef UNKNOWN_FLASH
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else if ((addr & 0xffff) == 0x100)
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ret = 0x1c;
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ret = 0x1c;
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else if ((addr & 0xffff) == 0x101)
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ret = 0x92;
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ret = 0x92;
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#endif
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else if (dev->has_bbp) {
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if (addr == 0x00002)
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ret = dev->bbp_first_8k;
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else if (addr == 0x3fff2)
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ret = dev->bbp_last_8k;
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if (addr == 0x00002)
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ret = dev->bbp_first_8k;
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else if (addr == 0x3fff2)
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ret = dev->bbp_last_8k;
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}
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return ret;
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}
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static void
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sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
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{
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dev->page_buffer[addr & 0x0000007f] = val;
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dev->page_dirty[addr & 0x0000007f] = 1;
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dev->page_dirty[addr & 0x0000007f] = 1;
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dev->page_bytes++;
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dev->last_addr = addr;
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if (dev->page_bytes >= 128) {
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sst_page_write(dev);
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sst_page_write(dev);
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} else
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timer_on_auto(&dev->page_write_timer, 210.0);
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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static void
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sst_write(uint32_t addr, uint8_t val, void *p)
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{
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sst_t *dev = (sst_t *) p;
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switch (dev->command_state) {
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case 0:
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case 3:
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/* 1st and 4th Bus Write Cycle */
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if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) {
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if (dev->id_mode)
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dev->id_mode = 0;
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dev->command_state = 0;
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} else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa))
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dev->command_state++;
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else {
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if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) {
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/* 29 series, software data protection off, start loading the page. */
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->command_state = 7;
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sst_buf_write(dev, addr, val);
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} else
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dev->command_state = 0;
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}
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break;
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case 1:
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case 4:
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/* 2nd and 5th Bus Write Cycle */
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if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55))
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dev->command_state++;
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else
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dev->command_state = 0;
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break;
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case 2:
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case 5:
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/* 3rd and 6th Bus Write Cycle */
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if ((dev->command_state == 5) && (val == SST_SECTOR_ERASE)) {
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/* Sector erase - can be on any address. */
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sst_new_command(dev, addr, val);
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} else if ((addr & 0x7fff) == 0x5555)
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sst_new_command(dev, addr, val);
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else
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dev->command_state = 0;
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break;
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case 6:
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/* Page Load Cycle (29) / Data Write Cycle (39SF) */
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if (dev->is_39) {
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dev->command_state = 0;
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case 0:
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case 3:
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/* 1st and 4th Bus Write Cycle */
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if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) {
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if (dev->id_mode)
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dev->id_mode = 0;
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dev->command_state = 0;
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} else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa))
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dev->command_state++;
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else {
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if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) {
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/* 29 series, software data protection off, start loading the page. */
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->command_state = 7;
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sst_buf_write(dev, addr, val);
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} else
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dev->command_state = 0;
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}
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break;
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case 1:
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case 4:
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/* 2nd and 5th Bus Write Cycle */
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if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55))
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dev->command_state++;
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else
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dev->command_state = 0;
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break;
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case 2:
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case 5:
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/* 3rd and 6th Bus Write Cycle */
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if ((dev->command_state == 5) && (val == SST_SECTOR_ERASE)) {
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/* Sector erase - can be on any address. */
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sst_new_command(dev, addr, val);
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} else if ((addr & 0x7fff) == 0x5555)
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sst_new_command(dev, addr, val);
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else
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dev->command_state = 0;
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break;
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case 6:
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/* Page Load Cycle (29) / Data Write Cycle (39SF) */
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if (dev->is_39) {
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dev->command_state = 0;
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dev->array[addr & dev->mask] = val;
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dev->dirty = 1;
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} else {
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dev->command_state++;
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sst_buf_write(dev, addr, val);
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}
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break;
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case 7:
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if (!dev->is_39)
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sst_buf_write(dev, addr, val);
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break;
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case 8:
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if ((addr == 0x00000) && (val == 0x00))
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dev->bbp_first_8k = 0xff;
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else if ((addr == 0x3ffff) && (val == 0xff))
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dev->bbp_last_8k = 0xff;
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dev->command_state = 0;
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break;
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||||
dev->array[addr & dev->mask] = val;
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||||
dev->dirty = 1;
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} else {
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||||
dev->command_state++;
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sst_buf_write(dev, addr, val);
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||||
}
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break;
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case 7:
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if (!dev->is_39)
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||||
sst_buf_write(dev, addr, val);
|
||||
break;
|
||||
case 8:
|
||||
if ((addr == 0x00000) && (val == 0x00))
|
||||
dev->bbp_first_8k = 0xff;
|
||||
else if ((addr == 0x3ffff) && (val == 0xff))
|
||||
dev->bbp_last_8k = 0xff;
|
||||
dev->command_state = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static uint8_t
|
||||
sst_read(uint32_t addr, void *p)
|
||||
{
|
||||
sst_t *dev = (sst_t *) p;
|
||||
sst_t *dev = (sst_t *) p;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
addr &= 0x000fffff;
|
||||
|
||||
if (dev->id_mode)
|
||||
ret = sst_read_id(addr, p);
|
||||
ret = sst_read_id(addr, p);
|
||||
else {
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = dev->array[addr - biosaddr];
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = dev->array[addr - biosaddr];
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static uint16_t
|
||||
sst_readw(uint32_t addr, void *p)
|
||||
{
|
||||
sst_t *dev = (sst_t *) p;
|
||||
sst_t *dev = (sst_t *) p;
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
addr &= 0x000fffff;
|
||||
|
||||
if (dev->id_mode)
|
||||
ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8);
|
||||
ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8);
|
||||
else {
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = *(uint16_t *)&dev->array[addr - biosaddr];
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = *(uint16_t *) &dev->array[addr - biosaddr];
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static uint32_t
|
||||
sst_readl(uint32_t addr, void *p)
|
||||
{
|
||||
sst_t *dev = (sst_t *) p;
|
||||
sst_t *dev = (sst_t *) p;
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
addr &= 0x000fffff;
|
||||
|
||||
if (dev->id_mode)
|
||||
ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16);
|
||||
ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16);
|
||||
else {
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = *(uint32_t *)&dev->array[addr - biosaddr];
|
||||
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
|
||||
ret = *(uint32_t *) &dev->array[addr - biosaddr];
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sst_add_mappings(sst_t *dev)
|
||||
{
|
||||
int i = 0, count;
|
||||
int i = 0, count;
|
||||
uint32_t base, fbase;
|
||||
uint32_t root_base;
|
||||
|
||||
count = dev->size >> 16;
|
||||
count = dev->size >> 16;
|
||||
root_base = 0x100000 - dev->size;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
base = root_base + (i << 16);
|
||||
fbase = base & biosmask;
|
||||
base = root_base + (i << 16);
|
||||
fbase = base & biosmask;
|
||||
|
||||
memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000);
|
||||
memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000);
|
||||
|
||||
if (base >= 0xe0000) {
|
||||
mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
|
||||
}
|
||||
if (is6117) {
|
||||
mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
|
||||
} else {
|
||||
mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
|
||||
}
|
||||
if (base >= 0xe0000) {
|
||||
mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
|
||||
}
|
||||
if (is6117) {
|
||||
mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
|
||||
} else {
|
||||
mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
|
||||
sst_read, sst_readw, sst_readl,
|
||||
sst_write, NULL, NULL,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void *
|
||||
sst_init(const device_t *info)
|
||||
{
|
||||
FILE *f;
|
||||
FILE *f;
|
||||
sst_t *dev = malloc(sizeof(sst_t));
|
||||
memset(dev, 0, sizeof(sst_t));
|
||||
|
||||
@@ -431,48 +419,47 @@ sst_init(const device_t *info)
|
||||
memset(dev->array, 0xff, biosmask + 1);
|
||||
|
||||
dev->manufacturer = info->local & 0xff;
|
||||
dev->id = (info->local >> 8) & 0xff;
|
||||
dev->has_bbp = (dev->manufacturer == WINBOND) && ((info->local & 0xff00) >= W29C020);
|
||||
dev->is_39 = (dev->manufacturer == SST) && ((info->local & 0xff00) >= SST39SF512);
|
||||
dev->id = (info->local >> 8) & 0xff;
|
||||
dev->has_bbp = (dev->manufacturer == WINBOND) && ((info->local & 0xff00) >= W29C020);
|
||||
dev->is_39 = (dev->manufacturer == SST) && ((info->local & 0xff00) >= SST39SF512);
|
||||
|
||||
dev->size = info->local & 0xffff0000;
|
||||
if ((dev->size == 0x20000) && (strstr(machine_get_internal_name_ex(machine), "xi8088")) && !xi8088_bios_128kb())
|
||||
dev->size = 0x10000;
|
||||
dev->size = 0x10000;
|
||||
|
||||
dev->mask = dev->size - 1;
|
||||
dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */
|
||||
dev->sdp = 1;
|
||||
dev->mask = dev->size - 1;
|
||||
dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */
|
||||
dev->sdp = 1;
|
||||
dev->bbp_first_8k = dev->bbp_last_8k = 0xfe;
|
||||
|
||||
sst_add_mappings(dev);
|
||||
|
||||
f = nvr_fopen(flash_path, "rb");
|
||||
if (f) {
|
||||
if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size)
|
||||
pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
|
||||
fclose(f);
|
||||
if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size)
|
||||
pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
|
||||
fclose(f);
|
||||
} else
|
||||
dev->dirty = 1; /* It is by definition dirty on creation. */
|
||||
dev->dirty = 1; /* It is by definition dirty on creation. */
|
||||
|
||||
if (!dev->is_39)
|
||||
timer_add(&dev->page_write_timer, sst_page_write, dev, 0);
|
||||
timer_add(&dev->page_write_timer, sst_page_write, dev, 0);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sst_close(void *p)
|
||||
{
|
||||
FILE *f;
|
||||
sst_t *dev = (sst_t *)p;
|
||||
FILE *f;
|
||||
sst_t *dev = (sst_t *) p;
|
||||
|
||||
if (dev->dirty) {
|
||||
f = nvr_fopen(flash_path, "wb");
|
||||
if (f != NULL) {
|
||||
fwrite(&(dev->array[0x00000]), dev->size, 1, f);
|
||||
fclose(f);
|
||||
}
|
||||
f = nvr_fopen(flash_path, "wb");
|
||||
if (f != NULL) {
|
||||
fwrite(&(dev->array[0x00000]), dev->size, 1, f);
|
||||
fclose(f);
|
||||
}
|
||||
}
|
||||
|
||||
free(dev->array);
|
||||
@@ -482,85 +469,85 @@ sst_close(void *p)
|
||||
}
|
||||
|
||||
const device_t sst_flash_29ee010_device = {
|
||||
.name = "SST 29EE010 Flash BIOS",
|
||||
.name = "SST 29EE010 Flash BIOS",
|
||||
.internal_name = "sst_flash_29ee010",
|
||||
.flags = 0,
|
||||
.local = SST | SST29EE010 | SIZE_1M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = SST | SST29EE010 | SIZE_1M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t sst_flash_29ee020_device = {
|
||||
.name = "SST 29EE020 Flash BIOS",
|
||||
.name = "SST 29EE020 Flash BIOS",
|
||||
.internal_name = "sst_flash_29ee020",
|
||||
.flags = 0,
|
||||
.local = SST | SST29EE020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = SST | SST29EE020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t winbond_flash_w29c020_device = {
|
||||
.name = "Winbond W29C020 Flash BIOS",
|
||||
.name = "Winbond W29C020 Flash BIOS",
|
||||
.internal_name = "winbond_flash_w29c020",
|
||||
.flags = 0,
|
||||
.local = WINBOND | W29C020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = WINBOND | W29C020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t sst_flash_39sf010_device = {
|
||||
.name = "SST 39SF010 Flash BIOS",
|
||||
.name = "SST 39SF010 Flash BIOS",
|
||||
.internal_name = "sst_flash_39sf010",
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF010 | SIZE_1M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF010 | SIZE_1M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t sst_flash_39sf020_device = {
|
||||
.name = "SST 39SF020 Flash BIOS",
|
||||
.name = "SST 39SF020 Flash BIOS",
|
||||
.internal_name = "sst_flash_39sf020",
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF020 | SIZE_2M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t sst_flash_39sf040_device = {
|
||||
.name = "SST 39SF040 Flash BIOS",
|
||||
.name = "SST 39SF040 Flash BIOS",
|
||||
.internal_name = "sst_flash_39sf040",
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF040 | SIZE_4M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
.flags = 0,
|
||||
.local = SST | SST39SF040 | SIZE_4M,
|
||||
.init = sst_init,
|
||||
.close = sst_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user