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clang-format in src/mem/

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This commit is contained in:
Jasmine Iwanek
2022-09-18 17:18:07 -04:00
parent 3fddf4d488
commit 4685da3fca
8 changed files with 2602 additions and 2828 deletions
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40
src/mem/catalyst_flash.c
View File

@@ -30,14 +30,11 @@
#include <86box/nvr.h>
#include <86box/plat.h>
#define FLAG_WORD 4
#define FLAG_BXB 2
#define FLAG_INV_A16 1
enum
{
enum {
BLOCK_MAIN1,
BLOCK_MAIN2,
BLOCK_DATA1,
@@ -46,8 +43,7 @@ enum
BLOCKS_NUM
};
enum
{
enum {
CMD_SET_READ = 0x00,
CMD_READ_SIGNATURE = 0x90,
CMD_ERASE = 0x20,
@@ -58,9 +54,7 @@ enum
CMD_RESET = 0xFF
};
typedef struct flash_t
{
typedef struct flash_t {
uint8_t command, pad,
pad0, pad1,
*array;
@@ -68,10 +62,8 @@ typedef struct flash_t
mem_mapping_t mapping, mapping_h[2];
} flash_t;
static char flash_path[1024];
static uint8_t
flash_read(uint32_t addr, void *p)
{
@@ -99,35 +91,32 @@ flash_read(uint32_t addr, void *p)
return ret;
}
static uint16_t
flash_readw(uint32_t addr, void *p)
{
flash_t *dev = (flash_t *)p;
flash_t *dev = (flash_t *) p;
uint16_t *q;
addr &= biosmask;
q = (uint16_t *)&(dev->array[addr]);
q = (uint16_t *) &(dev->array[addr]);
return *q;
}
static uint32_t
flash_readl(uint32_t addr, void *p)
{
flash_t *dev = (flash_t *)p;
flash_t *dev = (flash_t *) p;
uint32_t *q;
addr &= biosmask;
q = (uint32_t *)&(dev->array[addr]);
q = (uint32_t *) &(dev->array[addr]);
return *q;
}
static void
flash_write(uint32_t addr, uint8_t val, void *p)
{
@@ -151,19 +140,16 @@ flash_write(uint32_t addr, uint8_t val, void *p)
}
}
static void
flash_writew(uint32_t addr, uint16_t val, void *p)
{
}
static void
flash_writel(uint32_t addr, uint32_t val, void *p)
{
}
static void
catalyst_flash_add_mappings(flash_t *dev)
{
@@ -172,19 +158,18 @@ catalyst_flash_add_mappings(flash_t *dev)
mem_mapping_add(&dev->mapping, 0xe0000, 0x20000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
mem_mapping_add(&(dev->mapping_h[0]), 0xfffc0000, 0x20000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
mem_mapping_add(&(dev->mapping_h[1]), 0xfffe0000, 0x20000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
}
static void
catalyst_flash_reset(void *priv)
{
@@ -193,7 +178,6 @@ catalyst_flash_reset(void *priv)
dev->command = CMD_RESET;
}
static void *
catalyst_flash_init(const device_t *info)
{
@@ -224,12 +208,11 @@ catalyst_flash_init(const device_t *info)
return dev;
}
static void
catalyst_flash_close(void *p)
{
FILE *f;
flash_t *dev = (flash_t *)p;
flash_t *dev = (flash_t *) p;
f = nvr_fopen(flash_path, "wb");
fwrite(dev->array, 0x20000, 1, f);
@@ -241,7 +224,6 @@ catalyst_flash_close(void *p)
free(dev);
}
const device_t catalyst_flash_device = {
.name = "Catalyst 28F010-D Flash BIOS",
.internal_name = "catalyst_flash",

12
src/mem/i2c_eeprom.c
View File

@@ -24,7 +24,6 @@
#include <86box/86box.h>
#include <86box/i2c.h>
typedef struct {
void *i2c;
uint8_t addr, *data, writable;
@@ -33,11 +32,9 @@ typedef struct {
uint8_t addr_len, addr_pos;
} i2c_eeprom_t;
#ifdef ENABLE_I2C_EEPROM_LOG
int i2c_eeprom_do_log = ENABLE_I2C_EEPROM_LOG;
static void
i2c_eeprom_log(const char *fmt, ...)
{
@@ -50,10 +47,9 @@ i2c_eeprom_log(const char *fmt, ...)
}
}
#else
#define i2c_eeprom_log(fmt, ...)
# define i2c_eeprom_log(fmt, ...)
#endif
static uint8_t
i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv)
{
@@ -69,7 +65,6 @@ i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv)
return 1;
}
static uint8_t
i2c_eeprom_read(void *bus, uint8_t addr, void *priv)
{
@@ -83,7 +78,6 @@ i2c_eeprom_read(void *bus, uint8_t addr, void *priv)
return ret;
}
static uint8_t
i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv)
{
@@ -109,7 +103,6 @@ i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv)
return 1;
}
static void
i2c_eeprom_stop(void *bus, uint8_t addr, void *priv)
{
@@ -120,7 +113,6 @@ i2c_eeprom_stop(void *bus, uint8_t addr, void *priv)
dev->addr_pos = 0;
}
uint8_t
log2i(uint32_t i)
{
@@ -130,7 +122,6 @@ log2i(uint32_t i)
return ret;
}
void *
i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable)
{
@@ -158,7 +149,6 @@ i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t w
return dev;
}
void
i2c_eeprom_close(void *dev_handle)
{

45
src/mem/intel_flash.c
View File

@@ -30,14 +30,11 @@
#include <86box/nvr.h>
#include <86box/plat.h>
#define FLAG_WORD 4
#define FLAG_BXB 2
#define FLAG_INV_A16 1
enum
{
enum {
BLOCK_MAIN1,
BLOCK_MAIN2,
BLOCK_MAIN3,
@@ -48,8 +45,7 @@ enum
BLOCKS_NUM
};
enum
{
enum {
CMD_READ_ARRAY = 0xff,
CMD_IID = 0x90,
CMD_READ_STATUS = 0x70,
@@ -61,9 +57,7 @@ enum
CMD_PROGRAM_SETUP_ALT = 0x10
};
typedef struct flash_t
{
typedef struct flash_t {
uint8_t command, status,
pad, flags,
*array;
@@ -77,10 +71,8 @@ typedef struct flash_t
mem_mapping_t mapping[4], mapping_h[16];
} flash_t;
static char flash_path[1024];
static uint8_t
flash_read(uint32_t addr, void *p)
{
@@ -112,7 +104,6 @@ flash_read(uint32_t addr, void *p)
return ret;
}
static uint16_t
flash_readw(uint32_t addr, void *p)
{
@@ -127,10 +118,11 @@ flash_readw(uint32_t addr, void *p)
if (dev->flags & FLAG_WORD)
addr &= 0xfffffffe;
q = (uint16_t *)&(dev->array[addr]);
q = (uint16_t *) &(dev->array[addr]);
ret = *q;
if (dev->flags & FLAG_WORD) switch (dev->command) {
if (dev->flags & FLAG_WORD)
switch (dev->command) {
case CMD_READ_ARRAY:
default:
break;
@@ -150,23 +142,21 @@ flash_readw(uint32_t addr, void *p)
return ret;
}
static uint32_t
flash_readl(uint32_t addr, void *p)
{
flash_t *dev = (flash_t *)p;
flash_t *dev = (flash_t *) p;
uint32_t *q;
if (dev->flags & FLAG_INV_A16)
addr ^= 0x10000;
addr &= biosmask;
q = (uint32_t *)&(dev->array[addr]);
q = (uint32_t *) &(dev->array[addr]);
return *q;
}
static void
flash_write(uint32_t addr, uint8_t val, void *p)
{
@@ -223,7 +213,6 @@ flash_write(uint32_t addr, uint8_t val, void *p)
}
}
static void
flash_writew(uint32_t addr, uint16_t val, void *p)
{
@@ -239,7 +228,8 @@ flash_writew(uint32_t addr, uint16_t val, void *p)
addr ^= 0x10000;
addr &= biosmask;
if (dev->flags & FLAG_WORD) switch (dev->command) {
if (dev->flags & FLAG_WORD)
switch (dev->command) {
case CMD_ERASE_SETUP:
if (val == CMD_ERASE_CONFIRM) {
for (i = 0; i < 6; i++) {
@@ -280,7 +270,6 @@ flash_writew(uint32_t addr, uint16_t val, void *p)
}
}
static void
flash_writel(uint32_t addr, uint32_t val, void *p)
{
@@ -290,7 +279,6 @@ flash_writel(uint32_t addr, uint32_t val, void *p)
#endif
}
static void
intel_flash_add_mappings(flash_t *dev)
{
@@ -324,20 +312,19 @@ intel_flash_add_mappings(flash_t *dev)
mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
}
mem_mapping_add(&(dev->mapping_h[i]), (base | 0xfff00000) - sub, 0x10000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
mem_mapping_add(&(dev->mapping_h[i + max]), (base | 0xfff00000), 0x10000,
flash_read, flash_readw, flash_readl,
flash_write, flash_writew, flash_writel,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
}
}
static void
intel_flash_reset(void *priv)
{
@@ -347,7 +334,6 @@ intel_flash_reset(void *priv)
dev->status = 0;
}
static void *
intel_flash_init(const device_t *info)
{
@@ -373,7 +359,7 @@ intel_flash_init(const device_t *info)
if (dev->flags & FLAG_WORD)
dev->flash_id = (dev->flags & FLAG_BXB) ? 0x4471 : 0x4470;
else
dev->flash_id =(dev->flags & FLAG_BXB) ? 0x8A : 0x89;
dev->flash_id = (dev->flags & FLAG_BXB) ? 0x8A : 0x89;
/* The block lengths are the same both flash types. */
dev->block_len[BLOCK_MAIN1] = 0x20000;
@@ -534,12 +520,11 @@ intel_flash_init(const device_t *info)
return dev;
}
static void
intel_flash_close(void *p)
{
FILE *f;
flash_t *dev = (flash_t *)p;
flash_t *dev = (flash_t *) p;
f = nvr_fopen(flash_path, "wb");
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);

476
src/mem/mem.c
View File

File diff suppressed because it is too large Load Diff

187
src/mem/rom.c
View File

@@ -38,11 +38,9 @@
#include <86box/machine.h>
#include <86box/m_xt_xi8088.h>
#ifdef ENABLE_ROM_LOG
int rom_do_log = ENABLE_ROM_LOG;
static void
rom_log(const char *fmt, ...)
{
@@ -55,18 +53,17 @@ rom_log(const char *fmt, ...)
}
}
#else
#define rom_log(fmt, ...)
# define rom_log(fmt, ...)
#endif
void
rom_add_path(const char* path)
rom_add_path(const char *path)
{
char cwd[1024] = { 0 };
rom_path_t* rom_path = &rom_paths;
rom_path_t *rom_path = &rom_paths;
if (rom_paths.path[0] != '\0')
{
if (rom_paths.path[0] != '\0') {
// Iterate to the end of the list.
while (rom_path->next != NULL) {
rom_path = rom_path->next;
@@ -77,7 +74,7 @@ rom_add_path(const char* path)
}
// Save the path, turning it into absolute if needed.
if (!path_abs((char*) path)) {
if (!path_abs((char *) path)) {
plat_getcwd(cwd, sizeof(cwd));
path_slash(cwd);
snprintf(rom_path->path, sizeof(rom_path->path), "%s%s", cwd, path);
@@ -89,7 +86,6 @@ rom_add_path(const char* path)
path_slash(rom_path->path);
}
FILE *
rom_fopen(char *fn, char *mode)
{
@@ -114,7 +110,6 @@ rom_fopen(char *fn, char *mode)
}
}
int
rom_getfile(char *fn, char *s, int size)
{
@@ -144,7 +139,6 @@ rom_getfile(char *fn, char *s, int size)
}
}
int
rom_present(char *fn)
{
@@ -152,21 +146,20 @@ rom_present(char *fn)
f = rom_fopen(fn, "rb");
if (f != NULL) {
(void)fclose(f);
return(1);
(void) fclose(f);
return (1);
}
return(0);
return (0);
}
uint8_t
rom_read(uint32_t addr, void *priv)
{
rom_t *rom = (rom_t *)priv;
rom_t *rom = (rom_t *) priv;
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
if (rom->mapping.base == ROM_TRACE)
rom_log("ROM: read byte from BIOS at %06lX\n", addr);
#endif
@@ -174,17 +167,16 @@ rom_read(uint32_t addr, void *priv)
return 0xff;
if (addr >= (rom->mapping.base + rom->sz))
return 0xff;
return(rom->rom[(addr - rom->mapping.base) & rom->mask]);
return (rom->rom[(addr - rom->mapping.base) & rom->mask]);
}
uint16_t
rom_readw(uint32_t addr, void *priv)
{
rom_t *rom = (rom_t *)priv;
rom_t *rom = (rom_t *) priv;
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
if (rom->mapping.base == ROM_TRACE)
rom_log("ROM: read word from BIOS at %06lX\n", addr);
#endif
@@ -192,17 +184,16 @@ rom_readw(uint32_t addr, void *priv)
return 0xffff;
if (addr >= (rom->mapping.base + rom->sz))
return 0xffff;
return(*(uint16_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]);
return (*(uint16_t *) &rom->rom[(addr - rom->mapping.base) & rom->mask]);
}
uint32_t
rom_readl(uint32_t addr, void *priv)
{
rom_t *rom = (rom_t *)priv;
rom_t *rom = (rom_t *) priv;
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
if (rom->mapping.base == ROM_TRACE)
rom_log("ROM: read long from BIOS at %06lX\n", addr);
#endif
@@ -210,10 +201,9 @@ rom_readl(uint32_t addr, void *priv)
return 0xffffffff;
if (addr >= (rom->mapping.base + rom->sz))
return 0xffffffff;
return(*(uint32_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]);
return (*(uint32_t *) &rom->rom[(addr - rom->mapping.base) & rom->mask]);
}
int
rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
{
@@ -222,7 +212,7 @@ rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
if (f == NULL) {
rom_log("ROM: image '%s' not found\n", fn);
return(0);
return (0);
}
/* Make sure we only look at the base-256K offset. */
@@ -244,12 +234,11 @@ rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
}
}
(void)fclose(f);
(void) fclose(f);
return(1);
return (1);
}
/* Load a ROM BIOS from its chips, interleaved mode. */
int
rom_load_linear(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
@@ -258,7 +247,7 @@ rom_load_linear(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
if (f == NULL) {
rom_log("ROM: image '%s' not found\n", fn);
return(0);
return (0);
}
/* Make sure we only look at the base-256K offset. */
@@ -270,16 +259,15 @@ rom_load_linear(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
if (ptr != NULL) {
if (fseek(f, off, SEEK_SET) == -1)
fatal("rom_load_linear(): Error seeking to the beginning of the file\n");
if (fread(ptr+addr, 1, sz, f) > sz)
if (fread(ptr + addr, 1, sz, f) > sz)
fatal("rom_load_linear(): Error reading data\n");
}
(void)fclose(f);
(void) fclose(f);
return(1);
return (1);
}
/* Load a ROM BIOS from its chips, linear mode with high bit flipped. */
int
rom_load_linear_inverted(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
@@ -288,40 +276,36 @@ rom_load_linear_inverted(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
if (f == NULL) {
rom_log("ROM: image '%s' not found\n", fn);
return(0);
return (0);
}
/* Make sure we only look at the base-256K offset. */
if (addr >= 0x40000)
{
if (addr >= 0x40000) {
addr = 0;
}
else
{
} else {
addr &= 0x03ffff;
}
(void)fseek(f, 0, SEEK_END);
(void) fseek(f, 0, SEEK_END);
if (ftell(f) < sz) {
(void)fclose(f);
return(0);
(void) fclose(f);
return (0);
}
if (ptr != NULL) {
if (fseek(f, off, SEEK_SET) == -1)
fatal("rom_load_linear_inverted(): Error seeking to the beginning of the file\n");
if (fread(ptr+addr+0x10000, 1, sz >> 1, f) > (sz >> 1))
if (fread(ptr + addr + 0x10000, 1, sz >> 1, f) > (sz >> 1))
fatal("rom_load_linear_inverted(): Error reading the upper half of the data\n");
if (fread(ptr+addr, sz >> 1, 1, f) > (sz >> 1))
if (fread(ptr + addr, sz >> 1, 1, f) > (sz >> 1))
fatal("rom_load_linear_inverted(): Error reading the lower half of the data\n");
}
(void)fclose(f);
(void) fclose(f);
return(1);
return (1);
}
/* Load a ROM BIOS from its chips, interleaved mode. */
int
rom_load_interleaved(char *fnl, char *fnh, uint32_t addr, int sz, int off, uint8_t *ptr)
@@ -331,40 +315,40 @@ rom_load_interleaved(char *fnl, char *fnh, uint32_t addr, int sz, int off, uint8
int c;
if (fl == NULL || fh == NULL) {
if (fl == NULL) rom_log("ROM: image '%s' not found\n", fnl);
else (void)fclose(fl);
if (fh == NULL) rom_log("ROM: image '%s' not found\n", fnh);
else (void)fclose(fh);
if (fl == NULL)
rom_log("ROM: image '%s' not found\n", fnl);
else
(void) fclose(fl);
if (fh == NULL)
rom_log("ROM: image '%s' not found\n", fnh);
else
(void) fclose(fh);
return(0);
return (0);
}
/* Make sure we only look at the base-256K offset. */
if (addr >= 0x40000)
{
if (addr >= 0x40000) {
addr = 0;
}
else
{
} else {
addr &= 0x03ffff;
}
if (ptr != NULL) {
(void)fseek(fl, off, SEEK_SET);
(void)fseek(fh, off, SEEK_SET);
for (c=0; c<sz; c+=2) {
ptr[addr+c] = fgetc(fl) & 0xff;
ptr[addr+c+1] = fgetc(fh) & 0xff;
(void) fseek(fl, off, SEEK_SET);
(void) fseek(fh, off, SEEK_SET);
for (c = 0; c < sz; c += 2) {
ptr[addr + c] = fgetc(fl) & 0xff;
ptr[addr + c + 1] = fgetc(fh) & 0xff;
}
}
(void)fclose(fh);
(void)fclose(fl);
(void) fclose(fh);
(void) fclose(fl);
return(1);
return (1);
}
static int
bios_normalize(int n, int up)
{
@@ -378,8 +362,6 @@ bios_normalize(int n, int up)
return temp_n;
}
static uint8_t *
rom_reset(uint32_t addr, int sz)
{
@@ -397,14 +379,13 @@ rom_reset(uint32_t addr, int sz)
rom = NULL;
}
rom_log("Allocating ROM...\n");
rom = (uint8_t *)malloc(biosmask + 1);
rom = (uint8_t *) malloc(biosmask + 1);
rom_log("Filling ROM with FF's...\n");
memset(rom, 0xff, biosmask + 1);
return rom;
}
uint8_t
bios_read(uint32_t addr, void *priv)
{
@@ -418,7 +399,6 @@ bios_read(uint32_t addr, void *priv)
return ret;
}
uint16_t
bios_readw(uint32_t addr, void *priv)
{
@@ -427,12 +407,11 @@ bios_readw(uint32_t addr, void *priv)
addr &= 0x000fffff;
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint16_t *)&rom[addr - biosaddr];
ret = *(uint16_t *) &rom[addr - biosaddr];
return ret;
}
uint32_t
bios_readl(uint32_t addr, void *priv)
{
@@ -441,21 +420,20 @@ bios_readl(uint32_t addr, void *priv)
addr &= 0x000fffff;
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint32_t *)&rom[addr - biosaddr];
ret = *(uint32_t *) &rom[addr - biosaddr];
return ret;
}
static void
bios_add(void)
{
int temp_cpu_type, temp_cpu_16bitbus = 1;
int temp_is286 = 0, temp_is6117 = 0;
if (/*AT && */cpu_s) {
if (/*AT && */ cpu_s) {
temp_cpu_type = cpu_s->cpu_type;
temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC );
temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC);
temp_is286 = (temp_cpu_type >= CPU_286);
temp_is6117 = !strcmp(cpu_f->manufacturer, "ALi");
}
@@ -463,17 +441,17 @@ bios_add(void)
if (biosmask > 0x1ffff) {
/* 256k+ BIOS'es only have low mappings at E0000-FFFFF. */
mem_mapping_add(&bios_mapping, 0xe0000, 0x20000,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,
&rom[0x20000], MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0);
bios_read, bios_readw, bios_readl,
NULL, NULL, NULL,
&rom[0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0);
mem_set_mem_state_both(0x0e0000, 0x20000,
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
} else {
mem_mapping_add(&bios_mapping, biosaddr, biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,
rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0);
bios_read, bios_readw, bios_readl,
NULL, NULL, NULL,
rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0);
mem_set_mem_state_both(biosaddr, biosmask + 1,
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
@@ -481,24 +459,23 @@ bios_add(void)
if (temp_is6117) {
mem_mapping_add(&bios_high_mapping, biosaddr | 0x03f00000, biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,
rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0);
bios_read, bios_readw, bios_readl,
NULL, NULL, NULL,
rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0);
mem_set_mem_state_both(biosaddr | 0x03f00000, biosmask + 1,
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
} else if (temp_is286) {
mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,
rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0);
bios_read, bios_readw, bios_readl,
NULL, NULL, NULL,
rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0);
mem_set_mem_state_both(biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1,
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
}
}
/* These four are for loading the BIOS. */
int
bios_load(char *fn1, char *fn2, uint32_t addr, int sz, int off, int flags)
@@ -547,7 +524,6 @@ bios_load(char *fn1, char *fn2, uint32_t addr, int sz, int off, int flags)
return ret;
}
int
bios_load_linear_combined(char *fn1, char *fn2, int sz, int off)
{
@@ -559,7 +535,6 @@ bios_load_linear_combined(char *fn1, char *fn2, int sz, int off)
return ret;
}
int
bios_load_linear_combined2(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5, int sz, int off)
{
@@ -575,7 +550,6 @@ bios_load_linear_combined2(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5
return ret;
}
int
bios_load_linear_combined2_ex(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5, int sz, int off)
{
@@ -591,7 +565,6 @@ bios_load_linear_combined2_ex(char *fn1, char *fn2, char *fn3, char *fn4, char *
return ret;
}
int
rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_t flags)
{
@@ -602,11 +575,11 @@ rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_
memset(rom->rom, 0xff, sz);
/* Load the image file into the buffer. */
if (! rom_load_linear(fn, addr, sz, off, rom->rom)) {
if (!rom_load_linear(fn, addr, sz, off, rom->rom)) {
/* Nope.. clean up. */
free(rom->rom);
rom->rom = NULL;
return(-1);
return (-1);
}
rom->sz = sz;
@@ -618,10 +591,9 @@ rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_
NULL, NULL, NULL,
rom->rom, flags | MEM_MAPPING_ROM_WS, rom);
return(0);
return (0);
}
int
rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_t flags)
{
@@ -632,11 +604,11 @@ rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off,
memset(rom->rom, 0xff, sz);
/* Load the image file into the buffer. */
if (! rom_load_linear_oddeven(fn, addr, sz, off, rom->rom)) {
if (!rom_load_linear_oddeven(fn, addr, sz, off, rom->rom)) {
/* Nope.. clean up. */
free(rom->rom);
rom->rom = NULL;
return(-1);
return (-1);
}
rom->sz = sz;
@@ -648,10 +620,9 @@ rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off,
NULL, NULL, NULL,
rom->rom, flags | MEM_MAPPING_ROM_WS, rom);
return(0);
return (0);
}
int
rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, int mask, int off, uint32_t flags)
{
@@ -660,11 +631,11 @@ rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, in
memset(rom->rom, 0xff, sz);
/* Load the image file into the buffer. */
if (! rom_load_interleaved(fnl, fnh, addr, sz, off, rom->rom)) {
if (!rom_load_interleaved(fnl, fnh, addr, sz, off, rom->rom)) {
/* Nope.. clean up. */
free(rom->rom);
rom->rom = NULL;
return(-1);
return (-1);
}
rom->sz = sz;
@@ -676,5 +647,5 @@ rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, in
NULL, NULL, NULL,
rom->rom, flags | MEM_MAPPING_ROM_WS, rom);
return(0);
return (0);
}

28
src/mem/smram.c
View File

@@ -29,17 +29,14 @@
#include <86box/mem.h>
#include <86box/smram.h>
static smram_t *base_smram, *last_smram;
static uint8_t use_separate_smram = 0;
static uint8_t smram[0x40000];
#ifdef ENABLE_SMRAM_LOG
int smram_do_log = ENABLE_SMRAM_LOG;
static void
smram_log(const char *fmt, ...)
{
@@ -52,10 +49,9 @@ smram_log(const char *fmt, ...)
}
}
#else
#define smram_log(fmt, ...)
# define smram_log(fmt, ...)
#endif
static uint8_t
smram_read(uint32_t addr, void *priv)
{
@@ -70,7 +66,6 @@ smram_read(uint32_t addr, void *priv)
return dev->mapping.exec[addr - dev->host_base];
}
static uint16_t
smram_readw(uint32_t addr, void *priv)
{
@@ -85,7 +80,6 @@ smram_readw(uint32_t addr, void *priv)
return *(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]);
}
static uint32_t
smram_readl(uint32_t addr, void *priv)
{
@@ -100,7 +94,6 @@ smram_readl(uint32_t addr, void *priv)
return *(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]);
}
static void
smram_write(uint32_t addr, uint8_t val, void *priv)
{
@@ -113,7 +106,6 @@ smram_write(uint32_t addr, uint8_t val, void *priv)
dev->mapping.exec[addr - dev->host_base] = val;
}
static void
smram_writew(uint32_t addr, uint16_t val, void *priv)
{
@@ -126,7 +118,6 @@ smram_writew(uint32_t addr, uint16_t val, void *priv)
*(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]) = val;
}
static void
smram_writel(uint32_t addr, uint32_t val, void *priv)
{
@@ -139,7 +130,6 @@ smram_writel(uint32_t addr, uint32_t val, void *priv)
*(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]) = val;
}
/* Make a backup copy of host_base and size of all the SMRAM structs, needed so that if
the SMRAM mappings change while in SMM, they will be recalculated on return. */
void
@@ -156,7 +146,6 @@ smram_backup_all(void)
}
}
/* Recalculate any mappings, including the backup if returning from SMM. */
void
smram_recalc_all(int ret)
@@ -190,7 +179,6 @@ smram_recalc_all(int ret)
flushmmucache();
}
/* Delete a SMRAM mapping. */
void
smram_del(smram_t *smr)
@@ -233,7 +221,6 @@ smram_del(smram_t *smr)
free(smr);
}
/* Add a SMRAM mapping. */
smram_t *
smram_add(void)
@@ -277,8 +264,8 @@ smram_add(void)
last_smram = temp_smram;
mem_mapping_add(&(temp_smram->mapping), 0x00000000, 0x00000000,
smram_read,smram_readw,smram_readl,
smram_write,smram_writew,smram_writel,
smram_read, smram_readw, smram_readl,
smram_write, smram_writew, smram_writel,
ram, MEM_MAPPING_SMRAM, temp_smram);
smram_set_separate_smram(0);
@@ -286,7 +273,6 @@ smram_add(void)
return temp_smram;
}
/* Set memory state in the specified model (normal or SMM) according to the specified flags,
separately for bus and CPU. */
void
@@ -298,7 +284,6 @@ smram_map_ex(int bus, int smm, uint32_t addr, uint32_t size, int is_smram)
mem_set_access_smram_cpu(smm, addr, size, is_smram);
}
/* Set memory state in the specified model (normal or SMM) according to the specified flags. */
void
smram_map(int smm, uint32_t addr, uint32_t size, int is_smram)
@@ -307,7 +292,6 @@ smram_map(int smm, uint32_t addr, uint32_t size, int is_smram)
smram_map_ex(1, smm, addr, size, is_smram);
}
/* Disable a specific SMRAM mapping. */
void
smram_disable(smram_t *smr)
@@ -328,7 +312,6 @@ smram_disable(smram_t *smr)
}
}
/* Disable all SMRAM mappings. */
void
smram_disable_all(void)
@@ -343,7 +326,6 @@ smram_disable_all(void)
}
}
/* Enable SMRAM mappings according to flags for both normal and SMM modes, separately for bus
and CPU. */
void
@@ -385,7 +367,6 @@ smram_enable_ex(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t si
smram_disable(smr);
}
/* Enable SMRAM mappings according to flags for both normal and SMM modes. */
void
smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, int flags_normal, int flags_smm)
@@ -393,7 +374,6 @@ smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size,
smram_enable_ex(smr, host_base, ram_base, size, flags_normal, flags_normal, flags_smm, flags_smm);
}
/* Checks if a SMRAM mapping is enabled or not. */
int
smram_enabled(smram_t *smr)
@@ -408,7 +388,6 @@ smram_enabled(smram_t *smr)
return ret;
}
/* Changes the SMRAM state. */
void
smram_state_change(smram_t *smr, int smm, int flags)
@@ -421,7 +400,6 @@ smram_state_change(smram_t *smr, int smm, int flags)
smram_map(smm, smr->host_base, smr->size, flags);
}
void
smram_set_separate_smram(uint8_t set)
{

19
src/mem/spd.c
View File

@@ -28,20 +28,16 @@
#include <86box/version.h>
#include <86box/machine.h>
#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) - 15) : (x))
#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x))
int spd_present = 0;
spd_t *spd_modules[SPD_MAX_SLOTS];
static const device_t spd_device;
#ifdef ENABLE_SPD_LOG
int spd_do_log = ENABLE_SPD_LOG;
static void
spd_log(const char *fmt, ...)
{
@@ -54,10 +50,9 @@ spd_log(const char *fmt, ...)
}
}
#else
#define spd_log(fmt, ...)
# define spd_log(fmt, ...)
#endif
static void
spd_close(void *priv)
{
@@ -71,7 +66,6 @@ spd_close(void *priv)
spd_present = 0;
}
static void *
spd_init(const device_t *info)
{
@@ -87,7 +81,6 @@ spd_init(const device_t *info)
return &spd_modules;
}
int
comp_ui16_rev(const void *elem1, const void *elem2)
{
@@ -96,7 +89,6 @@ comp_ui16_rev(const void *elem1, const void *elem2)
return ((a > b) ? -1 : ((a < b) ? 1 : 0));
}
void
spd_populate(uint16_t *rows, uint8_t slot_count, uint16_t total_size, uint16_t min_module_size, uint16_t max_module_size, uint8_t enable_asym)
{
@@ -166,7 +158,6 @@ spd_populate(uint16_t *rows, uint8_t slot_count, uint16_t total_size, uint16_t m
}
}
static int
spd_write_part_no(char *part_no, char *type, uint16_t size)
{
@@ -182,7 +173,6 @@ spd_write_part_no(char *part_no, char *type, uint16_t size)
return sprintf(part_no, EMU_NAME "-%s-%03d%c", type, size, size_unit);
}
void
spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
{
@@ -343,7 +333,6 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
device_add(&spd_device);
}
void
spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
{
@@ -399,7 +388,6 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit
}
}
/* Needed for 430LX. */
void
spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
@@ -449,7 +437,6 @@ spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t
}
}
/* Used by ALi M1531 and M1541/2. */
void
spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
@@ -501,7 +488,6 @@ spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint
}
}
/* This is needed because the ALi M1621 does this stuff completely differently,
as it has DRAM bank registers instead of DRAM row boundary registers. */
void
@@ -576,7 +562,6 @@ spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max)
}
}
static const device_t spd_device = {
.name = "Serial Presence Detect ROMs",
.internal_name = "spd",

37
src/mem/sst_flash.c
View File

@@ -32,9 +32,7 @@
#include <86box/plat.h>
#include <86box/m_xt_xi8088.h>
typedef struct sst_t
{
typedef struct sst_t {
uint8_t manufacturer, id, has_bbp, is_39,
page_bytes, sdp, bbp_first_8k, bbp_last_8k;
@@ -54,10 +52,8 @@ typedef struct sst_t
pc_timer_t page_write_timer;
} sst_t;
static char flash_path[1024];
#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */
#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */
#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */
@@ -88,7 +84,6 @@ static char flash_path[1024];
#define SIZE_2M 0x040000
#define SIZE_4M 0x080000
static void
sst_sector_erase(sst_t *dev, uint32_t addr)
{
@@ -103,13 +98,13 @@ sst_sector_erase(sst_t *dev, uint32_t addr)
dev->dirty = 1;
}
static void
sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
{
uint32_t base = 0x00000, size = dev->size;
if (dev->command_state == 5) switch (val) {
if (dev->command_state == 5)
switch (val) {
case SST_CHIP_ERASE:
if (dev->bbp_first_8k & 0x01) {
base += 0x2000;
@@ -143,7 +138,9 @@ sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
default:
dev->command_state = 0;
break;
} else switch (val) {
}
else
switch (val) {
case SST_ERASE:
dev->command_state = 3;
break;
@@ -180,7 +177,6 @@ sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
}
}
static void
sst_page_write(void *priv)
{
@@ -206,7 +202,6 @@ sst_page_write(void *priv)
timer_disable(&dev->page_write_timer);
}
static uint8_t
sst_read_id(uint32_t addr, void *p)
{
@@ -233,7 +228,6 @@ sst_read_id(uint32_t addr, void *p)
return ret;
}
static void
sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
{
@@ -247,7 +241,6 @@ sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
timer_on_auto(&dev->page_write_timer, 210.0);
}
static void
sst_write(uint32_t addr, uint8_t val, void *p)
{
@@ -320,7 +313,6 @@ sst_write(uint32_t addr, uint8_t val, void *p)
}
}
static uint8_t
sst_read(uint32_t addr, void *p)
{
@@ -339,7 +331,6 @@ sst_read(uint32_t addr, void *p)
return ret;
}
static uint16_t
sst_readw(uint32_t addr, void *p)
{
@@ -352,13 +343,12 @@ sst_readw(uint32_t addr, void *p)
ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8);
else {
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint16_t *)&dev->array[addr - biosaddr];
ret = *(uint16_t *) &dev->array[addr - biosaddr];
}
return ret;
}
static uint32_t
sst_readl(uint32_t addr, void *p)
{
@@ -371,13 +361,12 @@ sst_readl(uint32_t addr, void *p)
ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16);
else {
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint32_t *)&dev->array[addr - biosaddr];
ret = *(uint32_t *) &dev->array[addr - biosaddr];
}
return ret;
}
static void
sst_add_mappings(sst_t *dev)
{
@@ -398,23 +387,22 @@ sst_add_mappings(sst_t *dev)
mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
}
if (is6117) {
mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
} else {
mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
}
}
}
static void *
sst_init(const device_t *info)
{
@@ -460,12 +448,11 @@ sst_init(const device_t *info)
return dev;
}
static void
sst_close(void *p)
{
FILE *f;
sst_t *dev = (sst_t *)p;
sst_t *dev = (sst_t *) p;
if (dev->dirty) {
f = nvr_fopen(flash_path, "wb");