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Rewritten 808x CPU emulation core based on reenigne's XTCE, VisiOn, SnatchIt, and 8088 MPH now work correctly;

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Fixed PC speaker sound volume in PIT mode 0;
A few CPU emulation clean-ups;
Hard disk controller changing redone in a less messy way;
Re-added the long-missing key send delay handling to the XT keyboard handler;
Fixed a bug that was causing SLiRP not to work when compiled with MingW/GCC 7.3.0-2 or newer;
Some serial mouse and port fixes;
A lot of changes to printer emulation, mostly based on DOSBox-X;
Printer PNG writer now uses statically linked libpng;
Added support for the HxC MFM floppy image format and upped 86F format version to 2.12;
Ported various things from PCem and some from VARCem;
Added the S3 86c801/805 emulation (patch from TheCollector1995);
Fixed and renamed the EGA monitor options;
Better synchronized the 808x to the PIT and the CGA;
Fixed the CGA wait state calculation;
Cleaned up some things in mem.c;
Fixed some things in the floppy emulation to make VisiOn get the correct errors from the copy protection disk;
Fixed several renderer-related bugs, including the SDL2 renderer's failure to take screenshots;
The Jenkins builds are now compiled with MingW/GCC 7.4.0-1 and include all the required DLL's.
This commit is contained in:
OBattler
2019-02-06 03:34:39 +01:00
parent c91b1f2b8e
commit 46d0ed2baa
104 changed files with 7749 additions and 6608 deletions
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22
src/dma.c
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@@ -8,7 +8,7 @@
*
* Implementation of the Intel DMA controllers.
*
* Version: @(#)dma.c 1.0.3 2018/03/13
* Version: @(#)dma.c 1.0.4 2018/11/18
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -625,7 +625,7 @@ ps2_dma_init(void)
uint8_t
_dma_read(uint32_t addr)
{
uint8_t temp = mem_readb_phys_dma(addr);
uint8_t temp = mem_readb_phys(addr);
return(temp);
}
@@ -634,7 +634,7 @@ _dma_read(uint32_t addr)
void
_dma_write(uint32_t addr, uint8_t val)
{
mem_writeb_phys_dma(addr, val);
mem_writeb_phys(addr, val);
mem_invalidate_range(addr, addr);
}
@@ -654,14 +654,14 @@ dma_channel_read(int channel)
return(DMA_NODATA);
}
if (! AT)
refreshread();
if (dma_m & (1 << channel))
return(DMA_NODATA);
if ((dma_c->mode & 0xC) != 8)
return(DMA_NODATA);
if ((!AT) && !channel)
refreshread();
if (! dma_c->size) {
temp = _dma_read(dma_c->ac);
@@ -725,14 +725,14 @@ dma_channel_write(int channel, uint16_t val)
return(DMA_NODATA);
}
if (! AT)
refreshread();
if (dma_m & (1 << channel))
return(DMA_NODATA);
if ((dma_c->mode & 0xC) != 4)
return(DMA_NODATA);
if ((!AT) && !channel)
refreshread();
if (! dma_c->size) {
_dma_write(dma_c->ac, val & 0xff);
@@ -895,7 +895,7 @@ DMAPageRead(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize)
memcpy(DataRead, &ram[PhysAddress], TotalSize);
#else
for (i = 0; i < TotalSize; i++)
DataRead[i] = mem_readb_phys_dma(PhysAddress + i);
DataRead[i] = mem_readb_phys(PhysAddress + i);
#endif
}
@@ -910,7 +910,7 @@ DMAPageWrite(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize)
memcpy(&ram[PhysAddress], DataWrite, TotalSize);
#else
for (i = 0; i < TotalSize; i++)
mem_writeb_phys_dma(PhysAddress + i, DataWrite[i]);
mem_writeb_phys(PhysAddress + i, DataWrite[i]);
mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1);
#endif