Genoa Unknown 486: Port 92h controls the exact same gate as the KBC, fixes #4660.
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@@ -37,6 +37,7 @@ extern void port_92_add(void *priv);
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extern void port_92_remove(void *priv);
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extern const device_t port_92_device;
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extern const device_t port_92_key_device;
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extern const device_t port_92_inv_device;
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extern const device_t port_92_word_device;
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extern const device_t port_92_pci_device;
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@@ -2333,7 +2333,7 @@ machine_at_genoa486_init(const machine_t *model)
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machine_at_common_init(model);
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device_add(&compaq_genoa_device);
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device_add(&port_92_device);
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device_add(&port_92_key_device);
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device_add(&keyboard_at_ami_device);
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@@ -36,6 +36,7 @@
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#define PORT_92_PCI 4
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#define PORT_92_RESET 8
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#define PORT_92_A20 16
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#define PORT_92_KEY 32
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static uint8_t
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port_92_readb(uint16_t port, void *priv)
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@@ -46,7 +47,10 @@ port_92_readb(uint16_t port, void *priv)
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if (port == 0x92) {
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/* Return bit 1 directly from mem_a20_alt, so the
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pin can be reset independently of the device. */
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ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | (cpu_alt_reset & 1);
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if (dev->flags & PORT_92_KEY)
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ret = (dev->reg & ~0x03) | (mem_a20_key & 2) | (cpu_alt_reset & 1);
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else
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ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | (cpu_alt_reset & 1);
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if (dev->flags & PORT_92_INV)
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ret |= 0xfc;
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@@ -94,8 +98,11 @@ port_92_writeb(uint16_t port, uint8_t val, void *priv)
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dev->reg = val & 0x03;
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if ((mem_a20_alt ^ val) & 2) {
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mem_a20_alt = (val & 2);
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if (dev->flags & PORT_92_KEY) {
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mem_a20_key = val & 2;
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mem_a20_recalc();
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} else if ((mem_a20_alt ^ val) & 2) {
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mem_a20_alt = (mem_a20_alt & 0xfd) | (val & 2);
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mem_a20_recalc();
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}
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@@ -234,6 +241,20 @@ const device_t port_92_device = {
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.config = NULL
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};
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const device_t port_92_key_device = {
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.name = "Port 92 Register (using A20 key)",
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.internal_name = "port_92_key",
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.flags = 0,
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.local = PORT_92_KEY,
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.init = port_92_init,
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.close = port_92_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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const device_t port_92_inv_device = {
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.name = "Port 92 Register (inverted bits 2-7)",
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.internal_name = "port_92_inv",
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