diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index ba8ce4f3b..ccdaf0c46 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -70,7 +70,6 @@ typedef struct ali1543_t { sff8038i_t *ide_controller[2]; smbus_ali7101_t *smbus; usb_t *usb; - usb_params_t usb_params; } ali1543_t; @@ -1069,7 +1068,7 @@ ali7101_write(int func, int addr, uint8_t val, void *priv) case 0x40: dev->pmu_conf[addr] = val & 0x1f; - pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); + nvr_smi_enable((dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x08), dev->nvr); break; case 0x41: dev->pmu_conf[addr] = val & 0x10; @@ -1080,6 +1079,8 @@ ali7101_write(int func, int addr, uint8_t val, void *priv) /* TODO: Is the status R/W or R/WC? */ case 0x42: dev->pmu_conf[addr] &= ~(val & 0x1f); + if (val & 0x08) + nvr_smi_status_clear(dev->nvr); break; case 0x43: dev->pmu_conf[addr] &= ~(val & 0x10); @@ -1217,8 +1218,8 @@ ali7101_write(int func, int addr, uint8_t val, void *priv) case 0x77: /* TODO: If bit 1 is clear, then status bit is set even if SMI is disabled. */ dev->pmu_conf[addr] = val; - pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); ali1543_log("PMU77: %02X\n", val); + nvr_smi_enable((dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x08), dev->nvr); apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10)); break; @@ -1423,14 +1424,23 @@ ali7101_read(int func, int addr, void *priv) return 0xff; /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */ - if (addr == 0x43) - ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00; - else if (addr == 0x7f) - ret = 0x80; - else if (addr == 0xbc) - ret = inb(0x70); - else - ret = dev->pmu_conf[addr]; + switch (addr) { + default: + ret = dev->pmu_conf[addr]; + break; + case 0x42: + ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00); + break; + case 0x43: + ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00; + break; + case 0x7f: + ret = 0x80; + break; + case 0xbc: + ret = inb(0x70); + break; + } if (dev->pmu_conf[0x77] & 0x10) { switch (addr) { @@ -1472,17 +1482,6 @@ ali7101_read(int func, int addr, void *priv) return ret; } -static void -ali5237_usb_update_interrupt(usb_t* usb, void *priv) -{ - ali1543_t *dev = (ali1543_t *) priv; - - if (usb->irq_level) - pci_set_mirq(4, !!(dev->pci_conf[0x74] & 0x10), &dev->mirq_states[4]); - else - pci_clear_mirq(4, !!(dev->pci_conf[0x74] & 0x10), &dev->mirq_states[4]); -} - static void ali1543_reset(void *priv) { @@ -1633,10 +1632,7 @@ ali1543_init(const device_t *info) dev->smbus = device_add(&ali7101_smbus_device); /* USB */ - dev->usb_params.parent_priv = dev; - dev->usb_params.smi_handle = NULL; - dev->usb_params.update_interrupt = ali5237_usb_update_interrupt; - dev->usb = device_add_parameters(&usb_device, &dev->usb_params); + dev->usb = device_add(&usb_device); dev->type = info->local & 0xff; dev->offset = (info->local >> 8) & 0x7f; diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 03720b668..4d810f65b 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -522,7 +522,7 @@ i420ex_speed_changed(void *priv) if (te) timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); - te = timer_is_enabled(&dev->fast_off_timer); + te = timer_is_on(&dev->fast_off_timer); timer_stop(&dev->fast_off_timer); if (te) diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index 878fd53ae..4066abe31 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -66,7 +66,6 @@ typedef struct _piix_ { uint8_t max_func; uint8_t pci_slot; uint8_t no_mirq0; - uint8_t usb_irq_state; uint8_t regs[4][256]; uint8_t readout_regs[256]; uint8_t board_config[2]; @@ -84,7 +83,6 @@ typedef struct _piix_ { piix_io_trap_t io_traps[26]; port_92_t *port_92; pc_timer_t fast_off_timer; - usb_params_t usb_params; } piix_t; #ifdef ENABLE_PIIX_LOG @@ -1443,17 +1441,6 @@ piix_fast_off_count(void *priv) dev->regs[0][0xaa] |= 0x20; } -static void -piix_usb_update_interrupt(usb_t* usb, void *priv) -{ - piix_t *dev = (piix_t *) priv; - - if (usb->irq_level) - pci_set_irq(dev->pci_slot, PCI_INTD, &dev->usb_irq_state); - else - pci_clear_irq(dev->pci_slot, PCI_INTD, &dev->usb_irq_state); -} - static void piix_reset(void *priv) { @@ -1554,10 +1541,10 @@ piix_speed_changed(void *priv) if (!dev) return; - int te = timer_is_enabled(&dev->fast_off_timer); + int to = timer_is_on(&dev->fast_off_timer); timer_stop(&dev->fast_off_timer); - if (te) + if (to) timer_on_auto(&dev->fast_off_timer, ((double) cpu_fast_off_val + 1) * dev->fast_off_period); } @@ -1598,12 +1585,8 @@ piix_init(const device_t *info) sff_set_irq_mode(dev->bm[1], 1, 2); } - if (dev->type >= 3) { - dev->usb_params.parent_priv = dev; - dev->usb_params.smi_handle = NULL; - dev->usb_params.update_interrupt = piix_usb_update_interrupt; - dev->usb = device_add_parameters(&usb_device, &dev->usb_params); - } + if (dev->type >= 3) + dev->usb = device_add(&usb_device); if (dev->type > 3) { dev->nvr = device_add(&piix4_nvr_device); diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index 0f32eb4c8..03a292da8 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -497,7 +497,7 @@ sio_speed_changed(void *priv) timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); if (dev->id == 0x03) { - te = timer_is_enabled(&dev->fast_off_timer); + te = timer_is_on(&dev->fast_off_timer); timer_stop(&dev->fast_off_timer); if (te) diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c index 391cc4e8b..0761e4865 100644 --- a/src/chipset/sis_5571.c +++ b/src/chipset/sis_5571.c @@ -87,9 +87,6 @@ typedef struct sis_5571_t { sff8038i_t *ide_drive[2]; smram_t *smram; usb_t *usb; - - usb_params_t usb_params; - } sis_5571_t; static void @@ -669,43 +666,6 @@ pci_isa_bridge_read(int func, int addr, void *priv) } } -static void -sis_5571_usb_update_interrupt(usb_t* usb, void* priv) -{ - sis_5571_t *dev = (sis_5571_t *) priv; - - if (dev->pci_conf_sb[0][0x68] & 0x80) { - /* TODO: Is the normal PCI interrupt inhibited when USB IRQ remapping is enabled? */ - switch (dev->pci_conf_sb[0][0x68] & 0x0F) { - case 0x00: - case 0x01: - case 0x02: - case 0x08: - case 0x0d: - break; - - default: - if (usb->irq_level) - picint(1 << dev->pci_conf_sb[0][0x68] & 0x0f); - else - picintc(1 << dev->pci_conf_sb[0][0x68] & 0x0f); - break; - } - } else { - if (usb->irq_level) - pci_set_irq(dev->sb_slot, PCI_INTA, &dev->usb_irq_state); - else - pci_clear_irq(dev->sb_slot, PCI_INTA, &dev->usb_irq_state); - } -} - -static uint8_t -sis_5571_usb_handle_smi(UNUSED(usb_t* usb), UNUSED(void* priv)) -{ - /* Left unimplemented for now. */ - return 1; -} - static void sis_5571_reset(void *priv) { @@ -790,10 +750,7 @@ sis_5571_init(UNUSED(const device_t *info)) dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2); /* USB */ - dev->usb_params.parent_priv = dev; - dev->usb_params.update_interrupt = sis_5571_usb_update_interrupt; - dev->usb_params.smi_handle = sis_5571_usb_handle_smi; - dev->usb = device_add_parameters(&usb_device, &dev->usb_params); + dev->usb = device_add(&usb_device); sis_5571_reset(dev); diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c index 59d01186a..aa5e1fb8b 100644 --- a/src/chipset/stpc.c +++ b/src/chipset/stpc.c @@ -73,9 +73,6 @@ typedef struct stpc_t { smram_t *smram; usb_t *usb; sff8038i_t *bm[2]; - - /* Miscellaneous */ - usb_params_t usb_params; } stpc_t; typedef struct stpc_serial_t { @@ -898,17 +895,6 @@ stpc_setup(stpc_t *dev) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); } -static void -stpc_usb_update_interrupt(usb_t* usb, void* priv) -{ - stpc_t *dev = (stpc_t *) priv; - - if (usb->irq_level) - pci_set_irq(dev->usb_slot, PCI_INTA, &dev->usb_irq_state); - else - pci_clear_irq(dev->usb_slot, PCI_INTA, &dev->usb_irq_state); -} - static void stpc_close(void *priv) { @@ -934,12 +920,9 @@ stpc_init(const device_t *info) pci_add_card(PCI_ADD_NORTHBRIDGE, stpc_nb_read, stpc_nb_write, dev, &dev->nb_slot); pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_isab_read, stpc_isab_write, dev, &dev->sb_slot); if (dev->local == STPC_ATLAS) { - dev->usb_params.smi_handle = NULL; - dev->usb_params.update_interrupt = stpc_usb_update_interrupt; - dev->usb_params.parent_priv = dev; - pci_add_card(PCI_ADD_SOUTHBRIDGE_IDE, stpc_ide_read, stpc_ide_write, dev, &dev->ide_slot); - dev->usb = device_add_parameters(&usb_device, &dev->usb_params); + + dev->usb = device_add(&usb_device); pci_add_card(PCI_ADD_SOUTHBRIDGE_USB, stpc_usb_read, stpc_usb_write, dev, &dev->usb_slot); } diff --git a/src/config.c b/src/config.c index 26a74ab74..aad7db0f9 100644 --- a/src/config.c +++ b/src/config.c @@ -88,7 +88,7 @@ static ini_t config; static int backwards_compat = 0; static int backwards_compat2 = 0; -#define ENABLE_CONFIG_LOG 1 +#define ENABLE_CONFIG_LOG 1 #ifdef ENABLE_CONFIG_LOG int config_do_log = ENABLE_CONFIG_LOG; @@ -1254,7 +1254,7 @@ load_floppy_drives(void) path_append_filename(floppyfns[c], usr_path, p); path_normalize(floppyfns[c]); -#ifdef ENABLE_CONFIG_LOG +#if defined(ENABLE_CONFIG_LOG) && (ENABLE_CONFIG_LOG == 2) if (*p != '\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); #endif @@ -1309,7 +1309,7 @@ load_floppy_and_cdrom_drives(void) path_append_filename(floppyfns[c], usr_path, p); path_normalize(floppyfns[c]); -#ifdef ENABLE_CONFIG_LOG +#if defined(ENABLE_CONFIG_LOG) && (ENABLE_CONFIG_LOG == 2) if (*p != '\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); #endif diff --git a/src/cpu/386.c b/src/cpu/386.c index fb42a222f..20b67ff89 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -369,7 +369,7 @@ exec386_2386(int cycs) } if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) - timer_process_inline(); + timer_process(); #ifdef USE_GDBSTUB if (gdbstub_instruction()) diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index a31704c1b..ab01d28b8 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -256,7 +256,7 @@ update_tsc(void) if (cycdiff > 0) { if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) - timer_process_inline(); + timer_process(); } } @@ -782,7 +782,7 @@ exec386_dynarec(int cycs) if (cycdiff > 0) { if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) - timer_process_inline(); + timer_process(); } # ifdef USE_GDBSTUB @@ -943,7 +943,7 @@ exec386(int cycs) } if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) - timer_process_inline(); + timer_process(); #ifdef USE_GDBSTUB if (gdbstub_instruction()) diff --git a/src/device/serial.c b/src/device/serial.c index 5dd5d8420..da34fd212 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -363,7 +363,7 @@ serial_update_speed(serial_t *dev) if (dev->transmit_enabled & 3) timer_on_auto(&dev->transmit_timer, dev->transmit_period); - if (timer_is_enabled(&dev->timeout_timer)) + if (timer_is_on(&dev->timeout_timer)) timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); } diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 01d1d28bf..52c1dc69e 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -1939,7 +1939,7 @@ ide_status(ide_t *ide, ide_t *ide_other, int ch) if ((ide->type == IDE_NONE) && ((ide_other->type == IDE_NONE) || !(ch & 1))) return 0x7f; /* Bit 7 pulled down, all other bits pulled up, per the spec. */ else if ((ide->type == IDE_NONE) && (ch & 1)) - return 0x00; /* On real hardware, a slave with a present master always returns a status of 0x00. */ + return 0x7f /*0x00*/; /* On real hardware, a slave with a present master always returns a status of 0x00. */ else if (ide->type == IDE_ATAPI) return (ide->sc->status & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0); else diff --git a/src/include/86box/nvr.h b/src/include/86box/nvr.h index 8f2b45041..d24ca903c 100644 --- a/src/include/86box/nvr.h +++ b/src/include/86box/nvr.h @@ -127,5 +127,8 @@ extern void nvr_via_wp_set(int set, int reg, nvr_t *nvr); extern void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr); extern void nvr_lock_set(int base, int size, int lock, nvr_t *nvr); extern void nvr_irq_set(int irq, nvr_t *nvr); +extern void nvr_smi_enable(int enable, nvr_t *nvr); +extern uint8_t nvr_smi_status(nvr_t *nvr); +extern void nvr_smi_status_clear(nvr_t *nvr); #endif /*EMU_NVR_H*/ diff --git a/src/include/86box/timer.h b/src/include/86box/timer.h index 586e3d2fe..45b648151 100644 --- a/src/include/86box/timer.h +++ b/src/include/86box/timer.h @@ -122,7 +122,7 @@ timer_is_enabled(pc_timer_t *timer) static __inline int timer_is_on(pc_timer_t *timer) { - return ((timer->flags & TIMER_ENABLED) && (timer->period > 0.0)); + return ((timer->flags & TIMER_SPLIT) && (timer->flags & TIMER_ENABLED)); } /*Return integer timestamp of timer*/ @@ -184,45 +184,8 @@ timer_set_p(pc_timer_t *timer, void *priv) /* The API for big timer periods starts here. */ extern void timer_stop(pc_timer_t *timer); -extern void timer_advance_ex(pc_timer_t *timer, int start); -extern void timer_on(pc_timer_t *timer, double period, int start); extern void timer_on_auto(pc_timer_t *timer, double period); -extern void timer_remove_head(void); - -extern pc_timer_t *timer_head; -extern int timer_inited; - -static __inline void -timer_process_inline(void) -{ - pc_timer_t *timer; - - if (!timer_head) - return; - - while (1) { - timer = timer_head; - - if (!TIMER_LESS_THAN_VAL(timer, (uint32_t) tsc)) - break; - - timer_head = timer->next; - if (timer_head) - timer_head->prev = NULL; - - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; - - if (timer->flags & TIMER_SPLIT) - timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ - else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ - timer->callback(timer->priv); - } - - timer_target = timer_head->ts.ts32.integer; -} - #ifdef __cplusplus } #endif diff --git a/src/include/86box/usb.h b/src/include/86box/usb.h index 7c2e13ee9..893a9f501 100644 --- a/src/include/86box/usb.h +++ b/src/include/86box/usb.h @@ -1,18 +1,18 @@ /* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. * - * This file is part of the 86Box distribution. + * This file is part of the 86Box distribution. * - * Definitions for the Distributed DMA emulation. + * Definitions for the Distributed DMA emulation. * * * - * Authors: Miran Grca, + * Authors: Miran Grca, * - * Copyright 2020 Miran Grca. + * Copyright 2020 Miran Grca. */ #ifndef USB_H @@ -22,188 +22,21 @@ extern "C" { #endif -typedef struct usb_t usb_t; -typedef struct usb_device_t usb_device_t; - -enum usb_pid +typedef struct { - USB_PID_OUT = 0xE1, - USB_PID_IN = 0x69, - USB_PID_SETUP = 0x2D -}; - -enum usb_errors -{ - USB_ERROR_NO_ERROR = 0, - USB_ERROR_NAK = 1, - USB_ERROR_OVERRUN = 2, - USB_ERROR_UNDERRUN = 3 -}; - -enum usb_bus_types -{ - USB_BUS_OHCI = 0, - USB_BUS_UHCI = 1, - USB_BUS_MAX = 2 -}; - -/* USB device creation parameters struct */ -typedef struct usb_params_t -{ - void (*update_interrupt)(usb_t*, void*); - /* Handle (but do not raise) SMI. Returns 1 if SMI can be raised, 0 otherwise. */ - uint8_t (*smi_handle)(usb_t*, void*); - void* parent_priv; -} usb_params_t; - -typedef union { - uint32_t l; - uint16_t w[2]; - uint8_t b[4]; -} ohci_mmio_t; - -/* USB Host Controller device struct */ -typedef struct usb_t { - uint8_t uhci_io[32]; - ohci_mmio_t ohci_mmio[1024]; + uint8_t uhci_io[32], ohci_mmio[4096]; uint16_t uhci_io_base; - int uhci_enable; - int ohci_enable; + int uhci_enable, ohci_enable; uint32_t ohci_mem_base; - uint32_t irq_level; mem_mapping_t ohci_mmio_mapping; - pc_timer_t ohci_frame_timer; - pc_timer_t ohci_port_reset_timer[2]; - uint8_t ohci_interrupt_counter : 3; - usb_device_t *ohci_devices[2]; - usb_device_t *uhci_devices[2]; - uint8_t ohci_usb_buf[4096]; - uint8_t ohci_initial_start; - - usb_params_t *usb_params; } usb_t; -#pragma pack(push, 1) - -/* Base USB descriptor struct. */ -typedef struct usb_desc_base_t { - uint8_t bLength; - uint8_t bDescriptorType; -} usb_desc_base_t; - -enum usb_desc_setup_req_types { - USB_SETUP_TYPE_DEVICE = 0x0, - USB_SETUP_TYPE_INTERFACE = 0x1, - USB_SETUP_TYPE_ENDPOING = 0x2, - USB_SETUP_TYPE_OTHER = 0x3, -}; - -#define USB_SETUP_TYPE_MAX 0x1F - -#define USB_SETUP_DEV_TO_HOST 0x80 - -typedef struct usb_desc_setup_t { - uint8_t bmRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -} usb_desc_setup_t; - -typedef struct usb_desc_endpoint_t { - usb_desc_base_t base; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; -} usb_desc_endpoint_t; - -typedef struct usb_desc_hid_t { - usb_desc_base_t base; - - uint16_t bcdHID; - uint8_t bCountryCode; - uint8_t bNumDescriptors; - uint8_t bDescriptorType; - uint16_t wDescriptorLength; -} usb_desc_hid_t; - -typedef struct usb_desc_interface_t { - usb_desc_base_t base; - - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; - uint8_t bNumEndpoints; - uint8_t bInterfaceClass; - uint8_t bInterfaceSubClass; - uint8_t bInterfaceProtocol; - uint8_t iInterface; -} usb_desc_interface_t; - -typedef struct usb_desc_string_t { - usb_desc_base_t base; - uint16_t bString[]; -} usb_desc_string_t; - -typedef struct usb_desc_conf_t { - usb_desc_base_t base; - - uint16_t wTotalLength; - uint8_t bNumInterfaces; - uint8_t bConfigurationValue; - uint8_t iConfiguration; - uint8_t bmAttributes; - uint8_t bMaxPower; -} usb_desc_conf_t; - -typedef struct usb_desc_device_t { - usb_desc_base_t base; - - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize; - uint16_t idVendor; - uint16_t idProduct; - uint16_t bcdDevice; - uint8_t iManufacturer; - uint8_t iProduct; - uint8_t iSerialNumber; - uint8_t bNumConfigurations; -} usb_desc_device_t; - -#pragma pack(pop) - -/* USB endpoint device struct. Incomplete and unused. */ -typedef struct usb_device_t { - usb_desc_device_t device_desc; - struct { - usb_desc_conf_t conf_desc; - usb_desc_base_t* other_descs[16]; - } conf_desc_items; - - /* General-purpose function for I/O. Non-zero value indicates error. */ - uint8_t (*device_process)(void* priv, uint8_t* data, uint32_t *len, uint8_t pid_token, uint8_t endpoint, uint8_t underrun_not_allowed); - /* Device reset. */ - void (*device_reset)(void* priv); - /* Get address. */ - uint8_t (*device_get_address)(void* priv); - - void* priv; -} usb_device_t; - /* Global variables. */ extern const device_t usb_device; -extern usb_t* usb_device_inst; /* Functions. */ extern void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable); extern void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable); -/* Attach USB device to a port of a USB bus. Returns the port to which it got attached to. */ -extern uint8_t usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type); -/* Detach USB device from a port. */ -extern void usb_detach_device(usb_t *dev, uint8_t port, uint8_t bus_type); #ifdef __cplusplus } diff --git a/src/nvr_at.c b/src/nvr_at.c index 187e42a25..990d1f1e7 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -307,7 +307,7 @@ typedef struct local_t { uint8_t wp_0d; uint8_t wp_32; uint8_t irq_state; - uint8_t pad0; + uint8_t smi_status; uint8_t addr[8]; uint8_t wp[2]; @@ -317,6 +317,8 @@ typedef struct local_t { int16_t count; int16_t state; + int32_t smi_enable; + uint64_t ecount; uint64_t rtc_time; pc_timer_t update_timer; @@ -444,6 +446,10 @@ timer_update_irq(nvr_t *nvr) if (irq) { nvr->regs[RTC_REGC] |= REGC_IRQF; picintlevel(1 << nvr->irq, &local->irq_state); + if (local->smi_enable) { + smi_raise(); + local->smi_status = 1; + } } else { nvr->regs[RTC_REGC] &= ~REGC_IRQF; picintclevel(1 << nvr->irq, &local->irq_state); @@ -981,6 +987,33 @@ nvr_irq_set(int irq, nvr_t *nvr) nvr->irq = irq; } +void +nvr_smi_enable(int enable, nvr_t *nvr) +{ + local_t *local = (local_t *) nvr->data; + + local->smi_enable = enable; + + if (!enable) + local->smi_status = 0; +} + +uint8_t +nvr_smi_status(nvr_t *nvr) +{ + local_t *local = (local_t *) nvr->data; + + return local->smi_status; +} + +void +nvr_smi_status_clear(nvr_t *nvr) +{ + local_t *local = (local_t *) nvr->data; + + local->smi_status = 0; +} + static void nvr_at_reset(void *priv) { diff --git a/src/scsi/scsi_ncr5380.c b/src/scsi/scsi_ncr5380.c index 8b0ae3c0c..c4bec884d 100644 --- a/src/scsi/scsi_ncr5380.c +++ b/src/scsi/scsi_ncr5380.c @@ -639,7 +639,8 @@ ncr_write(uint16_t port, uint8_t val, void *priv) } } else { /*Don't stop the timer until it finishes the transfer*/ - if (ncr_dev->block_count_loaded && (ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + if (ncr_dev->block_count_loaded && (ncr->mode & MODE_DMA) && + !timer_is_on(&ncr_dev->timer)) { ncr_log("Continuing DMA mode\n"); ncr_timer_on(ncr_dev, ncr, 0); } @@ -671,7 +672,7 @@ ncr_write(uint16_t port, uint8_t val, void *priv) if (dev->buffer_length > 0) { memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); - ncr_log("DMA send timer start, enabled? = %i\n", timer_is_enabled(&ncr_dev->timer)); + ncr_log("DMA send timer start, enabled? = %i\n", timer_is_on(&ncr_dev->timer)); ncr_dev->t128.block_count = dev->buffer_length >> 9; ncr_dev->t128.block_loaded = 1; @@ -679,7 +680,7 @@ ncr_write(uint16_t port, uint8_t val, void *priv) ncr_dev->t128.status |= 0x04; } } else { - if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + if ((ncr->mode & MODE_DMA) && !timer_is_on(&ncr_dev->timer)) { memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); ncr_log("DMA send timer on\n"); @@ -693,7 +694,8 @@ ncr_write(uint16_t port, uint8_t val, void *priv) /*a Read 6/10 has occurred, start the timer when the block count is loaded*/ ncr->dma_mode = DMA_INITIATOR_RECEIVE; if (ncr_dev->type == 3) { - ncr_log("DMA receive timer start, enabled? = %i, cdb[0] = %02x, buflen = %i\n", timer_is_enabled(&ncr_dev->timer), ncr->command[0], dev->buffer_length); + ncr_log("DMA receive timer start, enabled? = %i, cdb[0] = %02x, buflen = %i\n", + timer_is_on(&ncr_dev->timer), ncr->command[0], dev->buffer_length); if (dev->buffer_length > 0) { memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); @@ -709,7 +711,7 @@ ncr_write(uint16_t port, uint8_t val, void *priv) timer_on_auto(&ncr_dev->timer, 0.02); } } else { - if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + if ((ncr->mode & MODE_DMA) && !timer_is_on(&ncr_dev->timer)) { memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); ncr_log("DMA receive timer start\n"); diff --git a/src/scsi/scsi_spock.c b/src/scsi/scsi_spock.c index 3b9f5108c..d70afca76 100644 --- a/src/scsi/scsi_spock.c +++ b/src/scsi/scsi_spock.c @@ -1055,7 +1055,7 @@ spock_callback(void *priv) spock_process_scsi(scsi, scb); period = 0.2 * ((double) scsi->temp_period); - timer_on(&scsi->callback_timer, (scsi->media_period + period + 10.0), 0); + timer_on_auto(&scsi->callback_timer, (scsi->media_period + period + 10.0)); spock_log("Temporary period: %lf us (%" PRIi64 " periods)\n", scsi->callback_timer.period, scsi->temp_period); } diff --git a/src/scsi/scsi_x54x.c b/src/scsi/scsi_x54x.c index 96088e200..dc3fdfac3 100644 --- a/src/scsi/scsi_x54x.c +++ b/src/scsi/scsi_x54x.c @@ -1293,7 +1293,7 @@ x54x_cmd_callback(void *priv) } period = (1000000.0 / dev->ha_bps) * ((double) dev->temp_period); - timer_on(&dev->timer, dev->media_period + period + 10.0, 0); + timer_on_auto(&dev->timer, dev->media_period + period + 10.0); #if 0 x54x_log("Temporary period: %lf us (%" PRIi64 " periods)\n", dev->timer.period, dev->temp_period); #endif diff --git a/src/timer.c b/src/timer.c index 90ee3ca49..e45fc4398 100644 --- a/src/timer.c +++ b/src/timer.c @@ -15,10 +15,13 @@ pc_timer_t *timer_head = NULL; /* Are we initialized? */ int timer_inited = 0; +static void timer_advance_ex(pc_timer_t *timer); + void timer_enable(pc_timer_t *timer) { pc_timer_t *timer_node = timer_head; + int ret = 0; if (!timer_inited || (timer == NULL)) return; @@ -29,59 +32,63 @@ timer_enable(pc_timer_t *timer) if (timer->next || timer->prev) fatal("timer_enable - timer->next\n"); - timer->flags |= TIMER_ENABLED; - /*List currently empty - add to head*/ if (!timer_head) { timer_head = timer; timer->next = timer->prev = NULL; timer_target = timer_head->ts.ts32.integer; - return; - } - - if (TIMER_LESS_THAN(timer, timer_head)) { + ret = 1; + } else if (TIMER_LESS_THAN(timer, timer_head)) { timer->next = timer_head; timer->prev = NULL; timer_head->prev = timer; timer_head = timer; timer_target = timer_head->ts.ts32.integer; - return; - } - - if (!timer_head->next) { + ret = 1; + } else if (!timer_head->next) { timer_head->next = timer; timer->prev = timer_head; - return; + ret = 1; } - pc_timer_t *prev = timer_head; - timer_node = timer_head->next; + if (ret == 0) { + pc_timer_t *prev = timer_head; + timer_node = timer_head->next; - while (1) { - /*Timer expires before timer_node. Add to list in front of timer_node*/ - if (TIMER_LESS_THAN(timer, timer_node)) { - timer->next = timer_node; - timer->prev = prev; - timer_node->prev = timer; - prev->next = timer; - return; + while (1) { + /*Timer expires before timer_node. Add to list in front of timer_node*/ + if (TIMER_LESS_THAN(timer, timer_node)) { + timer->next = timer_node; + timer->prev = prev; + timer_node->prev = timer; + prev->next = timer; + ret = 1; + break; + } + + /*timer_node is last in the list. Add timer to end of list*/ + if (!timer_node->next) { + timer_node->next = timer; + timer->prev = timer_node; + ret = 1; + break; + } + + prev = timer_node; + timer_node = timer_node->next; } - - /*timer_node is last in the list. Add timer to end of list*/ - if (!timer_node->next) { - timer_node->next = timer; - timer->prev = timer_node; - return; - } - - prev = timer_node; - timer_node = timer_node->next; } + + /* Do not mark it as enabled if it has failed every single condition. */ + if (ret == 1) + timer->flags |= TIMER_ENABLED; } void timer_disable(pc_timer_t *timer) { + pc_timer_t *cur, *temp; + if (!timer_inited || (timer == NULL) || !(timer->flags & TIMER_ENABLED)) return; @@ -120,13 +127,15 @@ timer_process(void) timer->next = timer->prev = NULL; timer->flags &= ~TIMER_ENABLED; + timer->flags |= TIMER_PROCESS; if (timer->flags & TIMER_SPLIT) - timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ - else if (timer->callback != NULL) {/* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ - timer->flags |= TIMER_PROCESS; + timer_advance_ex(timer); /* We're splitting a > 1 s period into + multiple <= 1 s periods. */ + else if (timer->callback != NULL) /* Make sure it's not NULL, so that we can + have a NULL callback when no operation + is needed. */ timer->callback(timer->priv); - timer->flags &= ~TIMER_PROCESS; - } + timer->flags &= ~TIMER_PROCESS; } timer_target = timer_head->ts.ts32.integer; @@ -182,60 +191,47 @@ timer_stop(pc_timer_t *timer) return; timer->period = 0.0; - timer_disable(timer); + if (timer_is_enabled(timer)) + timer_disable(timer); timer->flags &= ~TIMER_SPLIT; } static void -timer_do_period(pc_timer_t *timer, uint64_t period, int start) +timer_do_period(pc_timer_t *timer, uint64_t period) { - if (!timer_inited || (timer == NULL)) - return; - - if (start) - timer_set_delay_u64(timer, period); - else + if (timer->flags & TIMER_PROCESS) timer_advance_u64(timer, period); + else + timer_set_delay_u64(timer, period); } -void -timer_advance_ex(pc_timer_t *timer, int start) +static void +timer_advance_ex(pc_timer_t *timer) { - if (!timer_inited || (timer == NULL)) - return; + double dusec = ((double) TIMER_USEC); + double period; - if (timer->period > MAX_USEC) { - timer_do_period(timer, MAX_USEC64 * TIMER_USEC, start); - timer->period -= MAX_USEC; - timer->flags |= TIMER_SPLIT; - } else { - if (timer->period > 0.0) - timer_do_period(timer, (uint64_t) (timer->period * ((double) TIMER_USEC)), start); - else - timer_disable(timer); - timer->period = 0.0; + period = (timer->period > MAX_USEC) ? MAX_USEC64 : timer->period; + + if (timer->period > 0.0) { + timer_do_period(timer, (uint64_t) (period * dusec)); + timer->period -= period; + timer->flags = (timer->flags & ~TIMER_SPLIT) | ((timer->period > MAX_USEC) ? TIMER_SPLIT : 0); + } else if (timer_is_enabled(timer)) { + timer_disable(timer); timer->flags &= ~TIMER_SPLIT; } } -void -timer_on(pc_timer_t *timer, double period, int start) -{ - if (!timer_inited || (timer == NULL)) - return; - - timer->period = period; - timer_advance_ex(timer, start); -} - void timer_on_auto(pc_timer_t *timer, double period) { if (!timer_inited || (timer == NULL)) return; - if (period > 0.0) - timer_on(timer, period, !(timer->flags & TIMER_PROCESS) && (timer->period <= 0.0)); - else + if (period > 0.0) { + timer->period = period; + timer_advance_ex(timer); + } else if (timer_is_on(timer)) timer_stop(timer); } diff --git a/src/usb.c b/src/usb.c index e6818d849..75e60d438 100644 --- a/src/usb.c +++ b/src/usb.c @@ -20,18 +20,14 @@ #include #include #include -#include #include -#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> #include <86box/io.h> #include <86box/mem.h> -#include <86box/timer.h> #include <86box/usb.h> -#include <86box/dma.h> -#include <86box/plat_unused.h> +#include "cpu.h" #ifdef ENABLE_USB_LOG int usb_do_log = ENABLE_USB_LOG; @@ -51,104 +47,11 @@ usb_log(const char *fmt, ...) # define usb_log(fmt, ...) #endif -/* OHCI registers */ -enum { - OHCI_HcRevision = 0x00 /* 0x00 */, - OHCI_HcControl = 0x01 /* 0x04 */, - OHCI_HcCommandStatus = 0x02 /* 0x08 */, - OHCI_HcInterruptStatus = 0x03 /* 0x0c */, - OHCI_HcInterruptEnable = 0x04 /* 0x10 */, - OHCI_HcInterruptDisable = 0x05 /* 0x14 */, - OHCI_HcHCCA = 0x06 /* 0x18 */, - OHCI_HcPeriodCurrentED = 0x07 /* 0x1c */, - OHCI_HcControlHeadED = 0x08 /* 0x20 */, - OHCI_HcControlCurrentED = 0x09 /* 0x24 */, - OHCI_HcBulkHeadED = 0x0a /* 0x28 */, - OHCI_HcBulkCurrentED = 0x0b /* 0x2c */, - OHCI_HcDoneHead = 0x0c /* 0x30 */, - OHCI_HcFmInterval = 0x0d /* 0x34 */, - OHCI_HcFmRemaining = 0x0e /* 0x38 */, - OHCI_HcFmNumber = 0x0f /* 0x3c */, - OHCI_HcPeriodicStart = 0x10 /* 0x40 */, - OHCI_HcLSThreshold = 0x11 /* 0x44 */, - OHCI_HcRhDescriptorA = 0x12 /* 0x48 */, - OHCI_HcRhDescriptorB = 0x13 /* 0x4c */, - OHCI_HcRhStatus = 0x14 /* 0x50 */, - OHCI_HcRhPortStatus1 = 0x15 /* 0x54 */, - OHCI_HcRhPortStatus2 = 0x16 /* 0x58 */, - OHCI_HcRhPortStatus3 = 0x17 /* 0x5c */ -}; - -enum { - OHCI_aHcRevision = 0x00, - OHCI_aHcControl = 0x04, - OHCI_aHcCommandStatus = 0x08, - OHCI_aHcInterruptStatus = 0x0c, - OHCI_aHcInterruptEnable = 0x10, - OHCI_aHcInterruptDisable = 0x14, - OHCI_aHcHCCA = 0x18, - OHCI_aHcPeriodCurrentED = 0x1c, - OHCI_aHcControlHeadED = 0x20, - OHCI_aHcControlCurrentED = 0x24, - OHCI_aHcBulkHeadED = 0x28, - OHCI_aHcBulkCurrentED = 0x2c, - OHCI_aHcDoneHead = 0x30, - OHCI_aHcFmInterval = 0x34, - OHCI_aHcFmRemaining = 0x38, - OHCI_aHcFmNumber = 0x3c, - OHCI_aHcPeriodicStart = 0x40, - OHCI_aHcLSThreshold = 0x44, - OHCI_aHcRhDescriptorA = 0x48, - OHCI_aHcRhDescriptorB = 0x4c, - OHCI_aHcRhStatus = 0x50, - OHCI_aHcRhPortStatus1 = 0x54, - OHCI_aHcRhPortStatus2 = 0x58, - OHCI_aHcRhPortStatus3 = 0x5c -}; - -/* OHCI HcInterruptEnable/Disable bits */ -enum { - OHCI_HcInterruptEnable_SO = 1 << 0, - OHCI_HcInterruptEnable_WDH = 1 << 1, - OHCI_HcInterruptEnable_SF = 1 << 2, - OHCI_HcInterruptEnable_RD = 1 << 3, - OHCI_HcInterruptEnable_UE = 1 << 4, - OHCI_HcInterruptEnable_HNO = 1 << 5, - OHCI_HcInterruptEnable_RHSC = 1 << 6, -}; - -/* OHCI HcControl bits */ -enum { - OHCI_HcControl_ControlBulkServiceRatio = 1 << 0, - OHCI_HcControl_PeriodicListEnable = 1 << 1, - OHCI_HcControl_IsochronousEnable = 1 << 2, - OHCI_HcControl_ControlListEnable = 1 << 3, - OHCI_HcControl_BulkListEnable = 1 << 4 -}; - -usb_t* usb_device_inst = NULL; - -static void -usb_interrupt_ohci(usb_t *dev, uint32_t level) -{ - if (dev->ohci_mmio[OHCI_HcControl].b[1] & 1) { - if (dev->usb_params && dev->usb_params->smi_handle && !dev->usb_params->smi_handle(dev, dev->usb_params->parent_priv)) - return; - - if (level) - smi_raise(); - } else if (dev->usb_params != NULL) { - if ((dev->usb_params->parent_priv != NULL) && (dev->usb_params->update_interrupt != NULL)) - dev->usb_params->update_interrupt(dev, dev->usb_params->parent_priv); - } -} - static uint8_t -uhci_reg_read(uint16_t addr, void *priv) +uhci_reg_read(uint16_t addr, void *p) { - const usb_t *dev = (usb_t *) priv; - uint8_t ret; - const uint8_t *regs = dev->uhci_io; + usb_t *dev = (usb_t *) p; + uint8_t ret, *regs = dev->uhci_io; addr &= 0x0000001f; @@ -158,9 +61,9 @@ uhci_reg_read(uint16_t addr, void *priv) } static void -uhci_reg_write(uint16_t addr, uint8_t val, void *priv) +uhci_reg_write(uint16_t addr, uint8_t val, void *p) { - usb_t *dev = (usb_t *) priv; + usb_t *dev = (usb_t *) p; uint8_t *regs = dev->uhci_io; addr &= 0x0000001f; @@ -182,16 +85,13 @@ uhci_reg_write(uint16_t addr, uint8_t val, void *priv) case 0x0c: regs[0x0c] = (val & 0x7f); break; - - default: - break; } } static void -uhci_reg_writew(uint16_t addr, uint16_t val, void *priv) +uhci_reg_writew(uint16_t addr, uint16_t val, void *p) { - usb_t *dev = (usb_t *) priv; + usb_t *dev = (usb_t *) p; uint16_t *regs = (uint16_t *) dev->uhci_io; addr &= 0x0000001f; @@ -212,8 +112,8 @@ uhci_reg_writew(uint16_t addr, uint16_t val, void *priv) regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); break; default: - uhci_reg_write(addr, val & 0xff, priv); - uhci_reg_write(addr + 1, (val >> 8) & 0xff, priv); + uhci_reg_write(addr, val & 0xff, p); + uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); break; } } @@ -231,728 +131,218 @@ uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable) io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); } -typedef struct -{ - uint32_t HccaInterrruptTable[32]; - uint16_t HccaFrameNumber; - uint16_t HccaPad1; - uint32_t HccaDoneHead; -} usb_hcca_t; - -/* Transfer descriptors */ -typedef struct -{ - uint32_t Control; - uint32_t CBP; - uint32_t NextTD; - uint32_t BE; -} usb_td_t; - -/* Endpoint descriptors */ -typedef struct -{ - uint32_t Control; - uint32_t TailP; - uint32_t HeadP; - uint32_t NextED; -} usb_ed_t; - -#define ENDPOINT_DESC_LIMIT 32 - static uint8_t -ohci_mmio_read(uint32_t addr, void *priv) +ohci_mmio_read(uint32_t addr, void *p) { - const usb_t *dev = (usb_t *) priv; - uint8_t ret = 0x00; -#ifdef ENABLE_USB_LOG - uint32_t old_addr = addr; -#endif + usb_t *dev = (usb_t *) p; + uint8_t ret = 0x00; addr &= 0x00000fff; - ret = dev->ohci_mmio[addr >> 2].b[addr & 3]; - - switch (addr) { - case 0x101: - ret = (ret & 0xfe) | (!!mem_a20_key); - break; - case OHCI_aHcRhPortStatus1 + 1: - case OHCI_aHcRhPortStatus2 + 1: - case OHCI_aHcRhPortStatus3 + 1: - ret |= 0x1; - break; - case OHCI_aHcInterruptDisable: - case OHCI_aHcInterruptDisable + 1: - case OHCI_aHcInterruptDisable + 2: - case OHCI_aHcInterruptDisable + 3: - ret = dev->ohci_mmio[OHCI_HcInterruptEnable].b[addr & 3]; - default: - break; - } + ret = dev->ohci_mmio[addr]; if (addr == 0x101) ret = (ret & 0xfe) | (!!mem_a20_key); -#ifdef ENABLE_USB_LOG - usb_log("[R] %08X = %04X\n", old_addr, ret); -#endif - return ret; } -static uint16_t -ohci_mmio_readw(uint32_t addr, void *priv) -{ - return ohci_mmio_read(addr, priv) | (ohci_mmio_read(addr + 1, priv) << 8); -} - -static uint32_t -ohci_mmio_readl(uint32_t addr, void *priv) -{ - return ohci_mmio_readw(addr, priv) | (ohci_mmio_readw(addr + 2, priv) << 16); -} - static void -ohci_update_irq(usb_t *dev) +ohci_mmio_write(uint32_t addr, uint8_t val, void *p) { - uint32_t level = !!(dev->ohci_mmio[OHCI_HcInterruptStatus].l & dev->ohci_mmio[OHCI_HcInterruptEnable].l); - -#ifdef STATE_KEEPING - if (level != dev->irq_level) { -#endif - dev->irq_level = level; - usb_interrupt_ohci(dev, level); -#ifdef STATE_KEEPING - } -#endif -} - -void -ohci_set_interrupt(usb_t *dev, uint8_t bit) -{ - if (!(dev->ohci_mmio[OHCI_HcInterruptEnable].b[3] & 0x80)) - return; - - if (!(dev->ohci_mmio[OHCI_HcInterruptEnable].b[0] & bit)) - return; - - if (dev->ohci_mmio[OHCI_HcInterruptDisable].b[0] & bit) - return; - - dev->ohci_mmio[OHCI_HcInterruptStatus].b[0] |= bit; - - /* TODO: Does setting UnrecoverableError also assert PERR# on any emulated USB chipsets? */ - - ohci_update_irq(dev); -} - -/* TODO: Actually use this function somewhere. */ -#if 0 -/* Next two functions ported over from QEMU. */ -static int ohci_copy_td_input(usb_t* dev, usb_td_t *td, - uint8_t *buf, int len) -{ - uint32_t ptr; - uint32_t n; - - ptr = td->CBP; - n = 0x1000 - (ptr & 0xfff); - if (n > len) { - n = len; - } - dma_bm_write(ptr, buf, n, 1); - if (n == len) { - return 0; - } - ptr = td->BE & ~0xfffu; - buf += n; - dma_bm_write(ptr, buf, len - n, 1); - return 0; -} -#endif - -static int ohci_copy_td_output(UNUSED(usb_t* dev), usb_td_t *td, - uint8_t *buf, int len) -{ - uint32_t ptr; - uint32_t n; - - ptr = td->CBP; - n = 0x1000 - (ptr & 0xfff); - if (n > len) { - n = len; - } - dma_bm_read(ptr, buf, n, 1); - if (n == len) { - return 0; - } - ptr = td->BE & ~0xfffu; - buf += n; - dma_bm_read(ptr, buf, len - n, 1); - return 0; -} - -#define OHCI_TD_DIR(val) ((val >> 19) & 3) -#define OHCI_ED_DIR(val) ((val >> 11) & 3) - -uint8_t -ohci_service_transfer_desc(usb_t* dev, usb_ed_t* endpoint_desc) -{ - uint32_t td_addr = endpoint_desc->HeadP & ~0xf; - usb_td_t td; - uint8_t dir; - uint8_t pid_token = 255; - uint32_t len = 0; - uint32_t pktlen = 0; - uint32_t actual_length = 0; - uint32_t i = 0; - uint8_t device_result = 0; - usb_device_t* target = NULL; - - dma_bm_read(td_addr, (uint8_t*)&td, sizeof(usb_td_t), 4); - - switch (dir = OHCI_ED_DIR(endpoint_desc->Control)) { - case 1: - case 2: - break; - default: - dir = OHCI_TD_DIR(td.Control); - break; - } - - switch (dir) { - case 0: /* Setup */ - pid_token = USB_PID_SETUP; - break; - case 1: /* OUT */ - pid_token = USB_PID_OUT; - break; - case 2: /* IN */ - pid_token = USB_PID_IN; - break; - default: - return 1; - } - - if (td.CBP && td.BE) { - if ((td.CBP & 0xfffff000) != (td.BE & 0xfffff000)) { - len = (td.BE & 0xfff) + 0x1001 - (td.CBP & 0xfff); - } else { - if (td.CBP > td.BE) { - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_UE); - return 1; - } - - len = (td.BE - td.CBP) + 1; - } - if (len > sizeof(dev->ohci_usb_buf)) { - len = sizeof(dev->ohci_usb_buf); - } - - pktlen = len; - if (len && pid_token != USB_PID_IN) { - pktlen = (endpoint_desc->Control >> 16) & 0xFFF; - if (pktlen > len) { - pktlen = len; - } - ohci_copy_td_output(dev, &td, dev->ohci_usb_buf, pktlen); - } - } - - for (i = 0; i < 2; i++) { - if (!dev->ohci_devices[i]) - continue; - - assert(dev->ohci_devices[i]->device_get_address != NULL); - - if (dev->ohci_devices[i]->device_get_address(dev->ohci_devices[i]->priv) != (endpoint_desc->Control & 0x7f)) - continue; - - target = dev->ohci_devices[i]; - break; - } - - if (!target) - return 1; - - device_result = target->device_process(target->priv, dev->ohci_usb_buf, &actual_length, pid_token, (endpoint_desc->Control & 0x780) >> 7, !(endpoint_desc->Control & (1 << 18))); - - if ((actual_length == pktlen) || (pid_token == USB_PID_IN && (endpoint_desc->Control & (1 << 18)) && device_result == USB_ERROR_NO_ERROR)) { - if (len == actual_length) { - td.CBP = 0; - } else { - if ((td.CBP & 0xfff) + actual_length > 0xfff) { - td.CBP = (td.BE & ~0xfff) + ((td.CBP + actual_length) & 0xfff); - } else { - td.CBP += actual_length; - } - } - - td.Control |= (1 << 25); /* dataToggle[1] */ - td.Control ^= (1 << 24); /* dataToggle[0] */ - td.Control &= ~0xFC000000; /* Set both ErrorCount and ConditionCode to 0. */ - - if (pid_token != USB_PID_IN && len != actual_length) { - goto exit_no_retire; - } - - endpoint_desc->HeadP &= ~0x2; - if (td.Control & (1 << 24)) { - endpoint_desc->HeadP |= 0x2; - } - } else { - if (actual_length != 0xFFFFFFFF && actual_length >= 0) { - td.Control &= ~0xF0000000; - td.Control |= 0x90000000; - } else { - switch (device_result) { - case USB_ERROR_NAK: - return 1; - - default: - break; - } - dev->ohci_interrupt_counter = 0; - } - - endpoint_desc->HeadP |= 0x1; - } - - endpoint_desc->HeadP &= 0xf; - endpoint_desc->HeadP |= td.NextTD & ~0xf; - td.NextTD = dev->ohci_mmio[OHCI_HcDoneHead].l; - dev->ohci_mmio[OHCI_HcDoneHead].l = td_addr; - i = (td.Control >> 21) & 7; - if (i < dev->ohci_interrupt_counter) { - dev->ohci_interrupt_counter = i; - } -exit_no_retire: - dma_bm_write(td_addr, (uint8_t*)&td, sizeof(usb_td_t), 4); - return !(td.Control & 0xF0000000); -} - -uint8_t -ohci_service_endpoint_desc(usb_t* dev, uint32_t head) -{ - usb_ed_t endpoint_desc; - uint8_t active = 0; - uint32_t next = 0; - uint32_t limit_counter = 0; - - if (head == 0) - return 0; - - for (uint32_t cur = head; cur && limit_counter++ < ENDPOINT_DESC_LIMIT; cur = next) { - dma_bm_read(cur, (uint8_t*)&endpoint_desc, sizeof(usb_ed_t), 4); - - next = endpoint_desc.NextED & ~0xFu; - - if ((endpoint_desc.Control & (1 << 13)) || (endpoint_desc.HeadP & (1 << 0))) - continue; - - if (endpoint_desc.Control & 0x8000) { - fatal("OHCI: Isochronous transfers not implemented!\n"); - } - - active = 1; - - while ((endpoint_desc.HeadP & ~0xFu) != endpoint_desc.TailP) { - ohci_service_transfer_desc(dev, &endpoint_desc); - } - - dma_bm_write(cur, (uint8_t*)&endpoint_desc, sizeof(usb_ed_t), 4); - } - - return active; -} - -void -ohci_end_of_frame(usb_t* dev) -{ - usb_hcca_t hcca; - if (dev->ohci_initial_start) - return; - dma_bm_read(dev->ohci_mmio[OHCI_HcHCCA].l, (uint8_t*)&hcca, sizeof(usb_hcca_t), 4); - - if (dev->ohci_mmio[OHCI_HcControl].l & OHCI_HcControl_PeriodicListEnable) { - ohci_service_endpoint_desc(dev, hcca.HccaInterrruptTable[dev->ohci_mmio[OHCI_HcFmNumber].l & 0x1f]); - } - - if ((dev->ohci_mmio[OHCI_HcControl].l & OHCI_HcControl_ControlListEnable) - && (dev->ohci_mmio[OHCI_HcCommandStatus].l & 0x2)) { - uint8_t result = ohci_service_endpoint_desc(dev, dev->ohci_mmio[OHCI_HcControlHeadED].l); - if (!result) { - dev->ohci_mmio[OHCI_HcControlHeadED].l = 0; - dev->ohci_mmio[OHCI_HcCommandStatus].l &= ~0x2; - } - } - - if ((dev->ohci_mmio[OHCI_HcControl].l & OHCI_HcControl_BulkListEnable) - && (dev->ohci_mmio[OHCI_HcCommandStatus].l & 0x4)) { - uint8_t result = ohci_service_endpoint_desc(dev, dev->ohci_mmio[OHCI_HcBulkHeadED].l); - if (!result) { - dev->ohci_mmio[OHCI_HcBulkHeadED].l = 0; - dev->ohci_mmio[OHCI_HcCommandStatus].l &= ~0x4; - } - } - - if (dev->ohci_interrupt_counter == 0 && !(dev->ohci_mmio[OHCI_HcInterruptStatus].l & OHCI_HcInterruptEnable_WDH)) { - if (dev->ohci_mmio[OHCI_HcDoneHead].l == 0) { - fatal("OHCI: HcDoneHead is still NULL!"); - } - - if (dev->ohci_mmio[OHCI_HcInterruptStatus].l & dev->ohci_mmio[OHCI_HcInterruptEnable].l) { - dev->ohci_mmio[OHCI_HcDoneHead].l |= 1; - } - - hcca.HccaDoneHead = dev->ohci_mmio[OHCI_HcDoneHead].l; - dev->ohci_mmio[OHCI_HcDoneHead].l = 0; - dev->ohci_interrupt_counter = 7; - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_WDH); - } - - if (dev->ohci_interrupt_counter != 0 && dev->ohci_interrupt_counter != 7) { - dev->ohci_interrupt_counter--; - } - - dev->ohci_mmio[OHCI_HcFmNumber].w[0]++; - hcca.HccaFrameNumber = dev->ohci_mmio[OHCI_HcFmNumber].w[0]; - - dma_bm_write(dev->ohci_mmio[OHCI_HcHCCA].l, (uint8_t*)&hcca, sizeof(usb_hcca_t), 4); -} - -void -ohci_start_of_frame(usb_t* dev) -{ - dev->ohci_initial_start = 0; - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_SO); -} - -void -ohci_update_frame_counter(void* priv) -{ - usb_t *dev = (usb_t *) priv; - - dev->ohci_mmio[OHCI_HcFmRemaining].w[0] &= 0x3fff; - if (dev->ohci_mmio[OHCI_HcFmRemaining].w[0] == 0) { - ohci_end_of_frame(dev); - dev->ohci_mmio[OHCI_HcFmRemaining].w[0] = dev->ohci_mmio[OHCI_HcFmInterval].w[0] & 0x3fff; - dev->ohci_mmio[OHCI_HcFmRemaining].l &= ~(1 << 31); - dev->ohci_mmio[OHCI_HcFmRemaining].l |= dev->ohci_mmio[OHCI_HcFmInterval].l & (1 << 31); - ohci_start_of_frame(dev); - timer_on_auto(&dev->ohci_frame_timer, 1. / 12.); - return; - } - dev->ohci_mmio[OHCI_HcFmRemaining].w[0]--; - timer_on_auto(&dev->ohci_frame_timer, 1. / 12.); -} - -void -ohci_port_reset_callback(void* priv) -{ - usb_t *dev = (usb_t *) priv; - - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] &= ~0x10; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] |= 0x10; -} - -void -ohci_port_reset_callback_2(void* priv) -{ - usb_t *dev = (usb_t *) priv; - - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] &= ~0x10; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] |= 0x10; -} - -static void -ohci_soft_reset(usb_t* dev) -{ - uint32_t old_HcControl = (dev->ohci_mmio[OHCI_HcControl].l & 0x100) | 0xc0; - memset(dev->ohci_mmio, 0x00, 4096); - dev->ohci_mmio[OHCI_HcRevision].b[0] = 0x10; - dev->ohci_mmio[OHCI_HcRevision].b[1] = 0x01; - dev->ohci_mmio[OHCI_HcRhDescriptorA].b[0] = 0x02; - dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] = 0x02; - dev->ohci_mmio[OHCI_HcFmInterval].l = 0x27782edf; /* FrameInterval = 11999, FSLargestDataPacket = 10104 */ - dev->ohci_mmio[OHCI_HcLSThreshold].l = 0x628; - dev->ohci_mmio[OHCI_HcInterruptEnable].l |= (1 << 31); - dev->ohci_mmio[OHCI_HcControl].l = old_HcControl; - dev->ohci_interrupt_counter = 7; - ohci_update_irq(dev); -} - -static void -ohci_mmio_write(uint32_t addr, uint8_t val, void *priv) -{ - usb_t *dev = (usb_t *) priv; + usb_t *dev = (usb_t *) p; uint8_t old; -#ifdef ENABLE_USB_LOG - usb_log("[W] %08X = %04X\n", addr, val); -#endif - addr &= 0x00000fff; switch (addr) { - case OHCI_aHcControl: - old = dev->ohci_mmio[OHCI_HcControl].b[0]; -#ifdef ENABLE_USB_LOG - usb_log("OHCI: OHCI state 0x%X\n", (val & 0xc0)); -#endif + case 0x04: if ((val & 0xc0) == 0x00) { /* UsbReset */ - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] = dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] = 0x16; - for (int i = 0; i < 2; i++) { - if (dev->ohci_devices[i]) { - dev->ohci_devices[i]->device_reset(dev->ohci_devices[i]->priv); - } - } - } else if ((val & 0xc0) == 0x80 && (old & 0xc0) != (val & 0xc0)) { - dev->ohci_mmio[OHCI_HcFmRemaining].l = 0; - dev->ohci_initial_start = 1; - timer_on_auto(&dev->ohci_frame_timer, 1000.); + dev->ohci_mmio[0x56] = dev->ohci_mmio[0x5a] = 0x16; } break; - case OHCI_aHcCommandStatus: + case 0x08: /* HCCOMMANDSTATUS */ /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ if (val & 0x08) { - dev->ohci_mmio[OHCI_HcInterruptStatus].b[3] = 0x40; - if ((dev->ohci_mmio[OHCI_HcInterruptEnable].b[3] & 0x40) == 0x40) { + dev->ohci_mmio[0x0f] = 0x40; + if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) smi_raise(); - } } /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ if (val & 0x01) { - ohci_soft_reset(dev); - + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; val &= ~0x01; } break; - case OHCI_aHcHCCA: + case 0x0c: + dev->ohci_mmio[addr] &= ~(val & 0x7f); return; - case OHCI_aHcInterruptEnable: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x7f); - dev->ohci_mmio[OHCI_HcInterruptDisable].b[0] &= ~(val & 0x7f); - ohci_update_irq(dev); + case 0x0d: + case 0x0e: return; - case OHCI_aHcInterruptEnable + 1: - case OHCI_aHcInterruptEnable + 2: + case 0x0f: + dev->ohci_mmio[addr] &= ~(val & 0x40); return; - case OHCI_aHcInterruptEnable + 3: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0xc0); - dev->ohci_mmio[OHCI_HcInterruptDisable].b[3] &= ~(val & 0xc0); - ohci_update_irq(dev); + case 0x3b: + dev->ohci_mmio[addr] = (val & 0x80); return; - case OHCI_aHcInterruptDisable: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x7f); - dev->ohci_mmio[OHCI_HcInterruptEnable].b[0] &= ~(val & 0x7f); - ohci_update_irq(dev); + case 0x39: + case 0x41: + dev->ohci_mmio[addr] = (val & 0x3f); return; - case OHCI_aHcInterruptDisable + 1: - case OHCI_aHcInterruptDisable + 2: + case 0x45: + dev->ohci_mmio[addr] = (val & 0x0f); return; - case OHCI_aHcInterruptDisable + 3: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0xc0); - dev->ohci_mmio[OHCI_HcInterruptEnable].b[3] &= ~(val & 0xc0); - ohci_update_irq(dev); + case 0x3a: + case 0x3e: + case 0x3f: + case 0x42: + case 0x43: + case 0x46: + case 0x47: + case 0x48: + case 0x4a: return; - case OHCI_aHcInterruptStatus: - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~(val & 0x7f); - return; - case OHCI_aHcInterruptStatus + 1: - case OHCI_aHcInterruptStatus + 2: - return; - case OHCI_aHcInterruptStatus + 3: - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~(val & 0x40); - return; - case OHCI_aHcFmRemaining + 3: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x80); - return; - case OHCI_aHcFmRemaining + 1: - case OHCI_aHcPeriodicStart + 1: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x3f); - return; - case OHCI_aHcLSThreshold + 1: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x0f); - return; - case OHCI_aHcFmRemaining + 2: - case OHCI_aHcFmNumber + 2: - case OHCI_aHcFmNumber + 3: - case OHCI_aHcPeriodicStart + 2: - case OHCI_aHcPeriodicStart + 3: - case OHCI_aHcLSThreshold + 2: - case OHCI_aHcLSThreshold + 3: - case OHCI_aHcRhDescriptorA: - case OHCI_aHcRhDescriptorA + 2: - return; - case OHCI_aHcRhDescriptorA + 1: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x1b); + case 0x49: + dev->ohci_mmio[addr] = (val & 0x1b); if (val & 0x02) { - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[1] |= 0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[1] |= 0x01; + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; } return; - case OHCI_aHcRhDescriptorA + 3: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x03); + case 0x4b: + dev->ohci_mmio[addr] = (val & 0x03); return; - case OHCI_aHcRhDescriptorB: - case OHCI_aHcRhDescriptorB + 2: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0x06); - if ((addr == OHCI_HcRhDescriptorB) && !(val & 0x04)) { - if (!(dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] & 0x01)) - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] |= 0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] |= 0x01; + case 0x4c: + case 0x4e: + dev->ohci_mmio[addr] = (val & 0x06); + if ((addr == 0x4c) && !(val & 0x04)) { + if (!(dev->ohci_mmio[0x58] & 0x01)) + dev->ohci_mmio[0x5a] |= 0x01; + dev->ohci_mmio[0x58] |= 0x01; } - if ((addr == OHCI_HcRhDescriptorB) && !(val & 0x02)) { - if (!(dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] & 0x01)) - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] |= 0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] |= 0x01; + if ((addr == 0x4c) && !(val & 0x02)) { + if (!(dev->ohci_mmio[0x54] & 0x01)) + dev->ohci_mmio[0x56] |= 0x01; + dev->ohci_mmio[0x54] |= 0x01; } return; - case OHCI_aHcRhDescriptorB + 1: - case OHCI_aHcRhDescriptorB + 3: + case 0x4d: + case 0x4f: return; - case OHCI_aHcRhStatus: + case 0x50: if (val & 0x01) { - if ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) { - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[1] &= ~0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[1] &= ~0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] &= ~0x17; - } else if ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) { - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[1] &= ~0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] &= ~0x17; + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; } - if (!(dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x04)) { - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[1] &= ~0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] &= ~0x17; + if (!(dev->ohci_mmio[0x4e] & 0x04)) { + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; } } } return; - case OHCI_aHcRhStatus + 1: + case 0x51: if (val & 0x80) - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x80; + dev->ohci_mmio[addr] |= 0x80; return; - case OHCI_aHcRhStatus + 2: - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~(val & 0x02); + case 0x52: + dev->ohci_mmio[addr] &= ~(val & 0x02); if (val & 0x01) { - if ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) { - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[1] |= 0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[1] |= 0x01; - } else if ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[1] |= 0x01; - if (!(dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x04)) - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[1] |= 0x01; + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) + dev->ohci_mmio[0x55] |= 0x01; + if (!(dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[0x59] |= 0x01; } } return; - case OHCI_aHcRhStatus + 3: + case 0x53: if (val & 0x80) - dev->ohci_mmio[OHCI_HcRhStatus].b[1] &= ~0x80; + dev->ohci_mmio[0x51] &= ~0x80; return; - case OHCI_aHcRhPortStatus1: - case OHCI_aHcRhPortStatus2: - old = dev->ohci_mmio[addr >> 2].b[addr & 3]; + case 0x54: + case 0x58: + old = dev->ohci_mmio[addr]; if (val & 0x10) { if (old & 0x01) { - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x10; - timer_on_auto(&dev->ohci_port_reset_timer[(addr - OHCI_aHcRhPortStatus1) / 4], 10000.); - if (dev->ohci_devices[(addr - OHCI_aHcRhPortStatus1) >> 2]) - dev->ohci_devices[(addr - OHCI_aHcRhPortStatus1) >> 2]->device_reset(dev->ohci_devices[(addr - OHCI_aHcRhPortStatus1) >> 2]->priv); + dev->ohci_mmio[addr] |= 0x10; + /* TODO: The clear should be on a 10 ms timer. */ + dev->ohci_mmio[addr] &= ~0x10; + dev->ohci_mmio[addr + 2] |= 0x10; } else - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x01; + dev->ohci_mmio[addr + 2] |= 0x01; } if (val & 0x08) - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~0x04; - if (val & 0x04) { - if (old & 0x01) - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x04; - else - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x01; - } + dev->ohci_mmio[addr] &= ~0x04; + if (val & 0x04) + dev->ohci_mmio[addr] |= 0x04; if (val & 0x02) { if (old & 0x01) - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x02; + dev->ohci_mmio[addr] |= 0x02; else - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x01; + dev->ohci_mmio[addr + 2] |= 0x01; } if (val & 0x01) { if (old & 0x01) - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~0x02; + dev->ohci_mmio[addr] &= ~0x02; else - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x01; + dev->ohci_mmio[addr + 2] |= 0x01; } - if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x04) && (old & 0x04)) - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x04; -#if 0 - if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x02)) - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x02; -#endif + if (!(dev->ohci_mmio[addr] & 0x04) && (old & 0x04)) + dev->ohci_mmio[addr + 2] |= 0x04; + /* if (!(dev->ohci_mmio[addr] & 0x02)) + dev->ohci_mmio[addr + 2] |= 0x02; */ return; - case OHCI_aHcRhPortStatus1 + 1: - if ((val & 0x02) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) { - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus1].b[2] &= ~0x17; + case 0x55: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; } - if ((val & 0x01) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) { - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x01; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[0] &= ~0x17; - dev->ohci_mmio[OHCI_HcRhPortStatus2].b[2] &= ~0x17; + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] |= 0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; } return; - case OHCI_aHcRhPortStatus2 + 1: - if ((val & 0x02) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x04)) - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~0x01; - if ((val & 0x01) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x04)) - dev->ohci_mmio[addr >> 2].b[addr & 3] |= 0x01; + case 0x59: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] &= ~0x01; + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] |= 0x01; return; - case OHCI_aHcRhPortStatus1 + 2: - case OHCI_aHcRhPortStatus2 + 2: - dev->ohci_mmio[addr >> 2].b[addr & 3] &= ~(val & 0x1f); + case 0x56: + case 0x5a: + dev->ohci_mmio[addr] &= ~(val & 0x1f); return; - case OHCI_aHcRhPortStatus1 + 3: - case OHCI_aHcRhPortStatus2 + 3: + case 0x57: + case 0x5b: return; - case OHCI_aHcDoneHead: - case OHCI_aHcBulkCurrentED: - case OHCI_aHcBulkHeadED: - case OHCI_aHcControlCurrentED: - case OHCI_aHcControlHeadED: - case OHCI_aHcPeriodCurrentED: - dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0xf0); - return; - - default: - break; } - dev->ohci_mmio[addr >> 2].b[addr & 3] = val; -} - -static void -ohci_mmio_writew(uint32_t addr, uint16_t val, void *priv) -{ - ohci_mmio_write(addr, val & 0xff, priv); - ohci_mmio_write(addr + 1, val >> 8, priv); -} - -static void -ohci_mmio_writel(uint32_t addr, uint32_t val, void *priv) -{ - ohci_mmio_writew(addr, val & 0xffff, priv); - ohci_mmio_writew(addr + 2, val >> 16, priv); + dev->ohci_mmio[addr] = val; } void @@ -966,71 +356,6 @@ ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); - - usb_log("ohci_update_mem_mapping(): OHCI %sabled at %08X\n", dev->ohci_enable ? "en" : "dis", dev->ohci_mem_base); -} - -uint8_t -usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type) -{ - switch (bus_type) { - case USB_BUS_OHCI: - { - for (uint8_t i = 0; i < 2; i++) { - if (!dev->ohci_devices[i]) { - uint32_t old = dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].l; - dev->ohci_devices[i] = device; - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].b[0] |= 0x1; - if ((dev->ohci_mmio[OHCI_HcControl].b[0] & 0xc0) == 0xc0) { - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_RD); - } - if (old != dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].l) { - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].b[2] |= 0x1; - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_RHSC); - } - return i; - } - } - } - break; - - default: - break; - } - return 0xff; -} - -void -usb_detach_device(usb_t *dev, uint8_t port, uint8_t bus_type) -{ - switch (bus_type) { - case USB_BUS_OHCI: - { - if (port > 2) - return; - if (dev->ohci_devices[port]) { - uint32_t old = dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].l; - dev->ohci_devices[port] = NULL; - if (dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[0] & 0x1) { - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[0] &= ~0x1; - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[2] |= 0x1; - } - if (dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[0] & 0x2) { - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[0] &= ~0x2; - dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].b[2] |= 0x2; - } - if (old != dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * port)].l) - ohci_set_interrupt(dev, OHCI_HcInterruptEnable_RHSC); - return; - } - - } - break; - - default: - break; - } - return; } static void @@ -1038,21 +363,20 @@ usb_reset(void *priv) { usb_t *dev = (usb_t *) priv; - memset(dev->uhci_io, 0x00, sizeof(dev->uhci_io)); + memset(dev->uhci_io, 0x00, 128); dev->uhci_io[0x0c] = 0x40; dev->uhci_io[0x10] = dev->uhci_io[0x12] = 0x80; - ohci_soft_reset(dev); - dev->ohci_mmio[OHCI_HcControl].l = 0x00; + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); dev->uhci_enable = 0; mem_mapping_disable(&dev->ohci_mmio_mapping); dev->ohci_enable = 0; - - usb_log("usb_reset(): OHCI %sabled at %08X\n", dev->ohci_enable ? "en" : "dis", dev->ohci_mem_base); - usb_log("usb_reset(): map = %08X\n", &dev->ohci_mmio_mapping); } static void @@ -1064,40 +388,39 @@ usb_close(void *priv) } static void * -usb_init_ext(UNUSED(const device_t *info), void *params) +usb_init(const device_t *info) { usb_t *dev; - dev = (usb_t *) calloc(1, sizeof(usb_t)); + dev = (usb_t *) malloc(sizeof(usb_t)); if (dev == NULL) return (NULL); + memset(dev, 0x00, sizeof(usb_t)); - dev->usb_params = (usb_params_t *) params; + memset(dev->uhci_io, 0x00, 128); + dev->uhci_io[0x0c] = 0x40; + dev->uhci_io[0x10] = dev->uhci_io[0x12] = 0x80; - mem_mapping_add(&dev->ohci_mmio_mapping, 0, 0x1000, - ohci_mmio_read, ohci_mmio_readw, ohci_mmio_readl, - ohci_mmio_write, ohci_mmio_writew, ohci_mmio_writel, + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; + + mem_mapping_add(&dev->ohci_mmio_mapping, 0, 0, + ohci_mmio_read, NULL, NULL, + ohci_mmio_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, dev); - - mem_mapping_disable(&dev->ohci_mmio_mapping); - - timer_add(&dev->ohci_frame_timer, ohci_update_frame_counter, dev, 0); /* Unused for now, to be used for frame counting. */ - timer_add(&dev->ohci_port_reset_timer[0], ohci_port_reset_callback, dev, 0); - timer_add(&dev->ohci_port_reset_timer[1], ohci_port_reset_callback_2, dev, 0); - usb_reset(dev); - usb_device_inst = dev; - return dev; } const device_t usb_device = { .name = "Universal Serial Bus", .internal_name = "usb", - .flags = DEVICE_PCI | DEVICE_EXTPARAMS, + .flags = DEVICE_PCI, .local = 0, - .init_ext = usb_init_ext, + .init = usb_init, .close = usb_close, .reset = usb_reset, { .available = NULL },