Changes to the IBM 386/486 and RapidCAD CPUs

- Disabled the 'is486' flag and moved them to 386 timings
- Disabled cache on startup, enable-able later
- RapidCAD fixes (permanently disable L1, correct EDX reset)
This commit is contained in:
nerd73
2020-03-25 18:02:25 -06:00
parent dfa433194b
commit 51bbebbfa3
9 changed files with 53 additions and 210 deletions

View File

@@ -382,7 +382,8 @@ extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/
extern int is8086, is286, is386, is486, is486sx, is486dx, is486sx2, is486dx2, isdx4;
extern int isibmcpu;
extern int hascache;
extern int isibm486;
extern int is_rapidcad;
extern int hasfpu;
#define CPU_FEATURE_RDTSC (1 << 0)