Changes to the IBM 386/486 and RapidCAD CPUs
- Disabled the 'is486' flag and moved them to 386 timings - Disabled cache on startup, enable-able later - RapidCAD fixes (permanently disable L1, correct EDX reset)
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@@ -741,22 +741,12 @@ static int opCLTS(uint32_t fetchdat)
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static int opINVD(uint32_t fetchdat)
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{
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if (!is486)
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{
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x86illegal();
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return 1;
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}
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CLOCK_CYCLES(1000);
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CPU_BLOCK_END();
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return 0;
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}
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static int opWBINVD(uint32_t fetchdat)
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{
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if (!is486)
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{
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x86illegal();
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return 1;
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}
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CLOCK_CYCLES(10000);
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CPU_BLOCK_END();
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return 0;
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