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Changes to the IBM 386/486 and RapidCAD CPUs

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- Disabled the 'is486' flag and moved them to 386 timings
- Disabled cache on startup, enable-able later
- RapidCAD fixes (permanently disable L1, correct EDX reset)
This commit is contained in:
nerd73
2020-03-25 18:02:25 -06:00
parent dfa433194b
commit 51bbebbfa3
9 changed files with 53 additions and 210 deletions
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14
src/cpu_common/x86_ops_mov_ctrl.h
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@@ -10,7 +10,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat)
{
case 0:
cpu_state.regs[cpu_rm].l = cr0;
if (is486)
if (is486 || isibm486)
cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
break;
case 2:
@@ -46,7 +46,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat)
{
case 0:
cpu_state.regs[cpu_rm].l = cr0;
if (is486)
if (is486 || isibm486)
cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
break;
case 2:
@@ -118,13 +118,11 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm=4;
if (is486 && !(cr0 & (1 << 30)))
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else if (isibmcpu)
cpu_cache_int_enabled = 1;
else
cpu_cache_int_enabled = 0;
if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
cpu_update_waitstates();
if (cr0 & 1)
cpu_cur_status |= CPU_STATUS_PMODE;
@@ -174,11 +172,11 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm=4;
if (is486 && !(cr0 & (1 << 30)))
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else
cpu_cache_int_enabled = 0;
if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
cpu_update_waitstates();
if (cr0 & 1)
cpu_cur_status |= CPU_STATUS_PMODE;