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Fixed RTL8029AS PCI register write handlers;

Browse Source 
Disabled the Nation Semiconductors PC87306's IDE handler, the board replaces it with the PCI IDE device anyway;
The Commodore PC 300 now remaps the top 384k of RAM;
The network card is now initialized after the SCSI controller;
The graphics cards remain on the INTA pin, but the network card is now on INTC, and the SCSI controller on INTB;
S3 Vision/Trio emulation brought completely in line with mainline PCem, fixes Windows 2000 freezes.
This commit is contained in:
OBattler
2017-06-19 22:18:35 +02:00
parent 6ff9019206
commit 51ef58ad00
6 changed files with 228 additions and 274 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
src/NETWORK/net_ne2000.c
View File

@@ -245,9 +245,9 @@ nic_interrupt(nic_t *dev, int set)
{
if (PCI && dev->is_pci) {
if (set)
pci_set_irq(dev->card, PCI_INTA);
pci_set_irq(dev->card, PCI_INTC);
else
pci_clear_irq(dev->card, PCI_INTA);
pci_clear_irq(dev->card, PCI_INTC);
} else {
if (set)
picint(1<<dev->base_irq);
@@ -1485,6 +1485,7 @@ nic_pci_read(int func, int addr, void *priv)
ret = dev->pci_regs[addr];
break;
#if 0
case 0x0C: /* (reserved) */
ret = dev->pci_regs[addr];
break;
@@ -1497,6 +1498,7 @@ nic_pci_read(int func, int addr, void *priv)
case 0x0F: /* (reserved) */
ret = dev->pci_regs[addr];
break;
#endif
case 0x10: /* PCI_BAR 7:5 */
ret = (dev->pci_bar[0].addr_regs[1] & 0xe0) | 0x01;
@@ -1553,23 +1555,30 @@ static void
nic_pci_write(int func, int addr, uint8_t val, void *priv)
{
nic_t *dev = (nic_t *)priv;
uint8_t valxor;
nelog(2, "%s: PCI_Write(%d, %04x, %02x)\n", dev->name, func, addr, val);
switch(addr) {
case 0x04: /* PCI_COMMAND_LO */
val &= 0x03;
valxor = (val & 0x23) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO)
{
nic_ioremove(dev, dev->base_address);
if (val & PCI_COMMAND_IO)
if ((dev->base_address != 0) && (val & PCI_COMMAND_IO))
{
nic_ioset(dev, dev->base_address);
}
}
#if 0
if (val & PCI_COMMAND_MEMORY) {
...
}
#endif
dev->pci_regs[addr] = val;
dev->pci_regs[addr] = val & 0x23;
break;
#if 0
case 0x0C: /* (reserved) */
dev->pci_regs[addr] = val;
break;
@@ -1585,6 +1594,7 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
case 0x0F: /* (reserved) */
dev->pci_regs[addr] = val;
break;
#endif
case 0x10: /* PCI_BAR */
val &= 0xfc; /* 0xe0 acc to RTL DS */
@@ -1607,8 +1617,13 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
nelog(1, "%s: PCI: new I/O base is %04X\n",
dev->name, dev->base_address);
/* We're done, so get out of the here. */
if (val & PCI_COMMAND_IO)
if (dev->pci_regs[4] & PCI_COMMAND_IO)
{
if (dev->base_address != 0)
{
nic_ioset(dev, dev->base_address);
}
}
break;
case 0x30: /* PCI_ROMBAR */
@@ -1938,8 +1953,7 @@ nic_init(int board)
dev->pci_regs[0x2E] = (PCI_DEVID&0xff);
dev->pci_regs[0x2F] = (PCI_DEVID>>8);
dev->pci_regs[0x3C] = dev->base_irq; /* PCI_ILR */
dev->pci_regs[0x3D] = 0x01; /* PCI_IPR */
dev->pci_regs[0x3D] = PCI_INTC; /* PCI_IPR */
/* Enable our address space in PCI. */
dev->pci_bar[0].addr_regs[0] = 0x01;

91
src/VIDEO/vid_s3.c
View File

@@ -1,36 +1,18 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the S3 Trio32, S3 Trio64, and S3 Vision864
* graphics cards.
*
* Version: @(#)vid_s3.c 1.0.1 2017/06/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
/*S3 emulation*/
#include <stdlib.h>
#include "../ibm.h"
#include "../device.h"
#include "../io.h"
#include "../mem.h"
#include "../pci.h"
#include "../rom.h"
#include "../device.h"
#include "../win/plat_thread.h"
#include "../WIN/plat_thread.h"
#include "video.h"
#include "vid_s3.h"
#include "vid_svga.h"
#include "vid_svga_render.h"
#include "vid_sdac_ramdac.h"
enum
{
S3_VISION864,
@@ -154,7 +136,6 @@ typedef struct s3_t
uint64_t status_time;
uint8_t subsys_cntl, subsys_stat;
uint8_t status_9ae9;
} s3_t;
#define INT_VSY (1 << 0)
@@ -170,7 +151,7 @@ void s3_accel_write_w(uint32_t addr, uint16_t val, void *p);
void s3_accel_write_l(uint32_t addr, uint32_t val, void *p);
uint8_t s3_accel_read(uint32_t addr, void *p);
static __inline void wake_fifo_thread(s3_t *s3)
static inline void wake_fifo_thread(s3_t *s3)
{
thread_set_event(s3->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/
}
@@ -186,11 +167,6 @@ static void s3_wait_fifo_idle(s3_t *s3)
static void s3_update_irqs(s3_t *s3)
{
if (!PCI)
{
return;
}
if (s3->subsys_cntl & s3->subsys_stat & INT_MASK)
pci_set_irq(s3->card, PCI_INTA);
else
@@ -444,13 +420,6 @@ static void s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val)
{
if (port & 0x8000)
{
s3_accel_out_fifo(s3, port, val);
s3_accel_out_fifo(s3, port + 1, val >> 8);
}
else
{
if (s3->accel.cmd & 0x100)
{
if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80)
@@ -470,20 +439,10 @@ static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val)
s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3);
}
}
}
}
static void s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val)
{
if (port & 0x8000)
{
s3_accel_out_fifo(s3, port, val);
s3_accel_out_fifo(s3, port + 1, val >> 8);
s3_accel_out_fifo(s3, port + 2, val >> 16);
s3_accel_out_fifo(s3, port + 3, val >> 24);
}
else
{
if (s3->accel.cmd & 0x100)
{
if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80)
@@ -525,7 +484,6 @@ static void s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val)
}
}
}
}
}
static void s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val)
@@ -834,14 +792,7 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
if (s3->chip < S3_TRIO32)
{
sdac_ramdac_out(addr, val, &s3->ramdac, svga);
}
else
{
svga_out(addr, val, svga);
}
return;
case 0x3D4:
@@ -922,7 +873,7 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
svga->hwcursor.xoff = svga->crtc[0x4e] & 63;
svga->hwcursor.yoff = svga->crtc[0x4f] & 63;
svga->hwcursor.addr = ((((svga->crtc[0x4c] << 8) | svga->crtc[0x4d]) & 0xfff) * 1024) + (svga->hwcursor.yoff * 16);
if ((s3->chip == S3_TRIO32 || s3->chip == S3_TRIO64) && (svga->bpp == 32) && (s3->id == 0xe1))
if ((s3->chip == S3_TRIO32 || s3->chip == S3_TRIO64) && svga->bpp == 32)
svga->hwcursor.x <<= 1;
break;
@@ -979,14 +930,7 @@ uint8_t s3_in(uint16_t addr, void *p)
break;
case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9:
if (s3->chip < S3_TRIO32)
{
return sdac_ramdac_in(addr, &s3->ramdac, svga);
}
else
{
return svga_in(addr, svga);
}
case 0x3d4:
return svga->crtcreg;
@@ -1002,10 +946,6 @@ uint8_t s3_in(uint16_t addr, void *p)
case 0x51: return (svga->crtc[0x51] & 0xf0) | ((s3->bank >> 2) & 0xc) | ((s3->ma_ext >> 2) & 3);
case 0x69: return s3->ma_ext;
case 0x6a: return s3->bank;
case 0x6b:
pclog("Returning value: %02X\n", svga->crtc[0x6b]);
return 0xff;
break;
}
return svga->crtc[svga->crtcreg];
}
@@ -1129,7 +1069,6 @@ void s3_updatemapping(s3_t *s3)
break;
}
s3->linear_base &= ~(s3->linear_size - 1);
svga->linear_base = s3->linear_base;
if (s3->linear_base == 0xa0000)
{
mem_mapping_disable(&s3->linear_mapping);
@@ -1275,7 +1214,7 @@ uint8_t s3_accel_in(uint16_t port, void *p)
if (!FIFO_EMPTY)
temp |= 0x02; /*Hardware busy*/
else
temp |= s3->status_9ae9; /*FIFO empty*/
temp |= 0x04; /*FIFO empty*/
if (FIFO_FULL)
temp |= 0xf8; /*FIFO full*/
return temp;
@@ -1998,8 +1937,6 @@ void s3_hwcursor_draw(svga_t *svga, int displine)
uint16_t dat[2];
int xx;
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
int y_add = (enable_overscan && !suppress_overscan) ? 16 : 0;
int x_add = (enable_overscan && !suppress_overscan) ? 8 : 0;
if (svga->interlace && svga->hwcursor_oddeven)
svga->hwcursor_latch.addr += 16;
@@ -2013,9 +1950,9 @@ void s3_hwcursor_draw(svga_t *svga, int displine)
if (offset >= svga->hwcursor_latch.x)
{
if (!(dat[0] & 0x8000))
((uint32_t *)buffer32->line[displine + y_add])[offset + 32 + x_add] = (dat[1] & 0x8000) ? 0xffffff : 0;
((uint32_t *)buffer32->line[displine])[offset + 32] = (dat[1] & 0x8000) ? 0xffffff : 0;
else if (dat[1] & 0x8000)
((uint32_t *)buffer32->line[displine + y_add])[offset + 32 + x_add] ^= 0xffffff;
((uint32_t *)buffer32->line[displine])[offset + 32] ^= 0xffffff;
}
offset++;
@@ -2088,7 +2025,6 @@ uint8_t s3_pci_read(int func, int addr, void *p)
{
s3_t *s3 = (s3_t *)p;
svga_t *svga = &s3->svga;
/* pclog("S3 PCI read %08X\n", addr); */
switch (addr)
{
case 0x00: return 0x33; /*'S3'*/
@@ -2128,7 +2064,6 @@ void s3_pci_write(int func, int addr, uint8_t val, void *p)
{
s3_t *s3 = (s3_t *)p;
svga_t *svga = &s3->svga;
/* pclog("s3_pci_write: addr=%02x val=%02x\n", addr, val); */
switch (addr)
{
case PCI_REG_COMMAND:
@@ -2219,17 +2154,11 @@ static void *s3_init(wchar_t *bios_fn, int chip)
svga->vblank_start = s3_vblank_start;
svga->crtc[0x53] = 1 << 3;
svga->crtc[0x59] = 0x70;
s3_io_set(s3);
if (PCI)
{
s3->card = pci_add(s3_pci_read, s3_pci_write, s3);
}
s3->pci_regs[0x04] = 3;
s3->pci_regs[0x04] = 7;
s3->pci_regs[0x30] = 0x00;
s3->pci_regs[0x32] = 0x0c;
@@ -2341,7 +2270,7 @@ int s3_9fx_available()
int s3_phoenix_trio64_available()
{
return rom_present(L"roms/86C764X1.bin");
return rom_present(L"roms/86c764x1.bin");
}
int s3_diamond_stealth64_available()

51
src/model.c
View File

@@ -88,6 +88,7 @@ extern void olim24_init(void);
extern void at_init(void);
extern void ibm_at_init(void);
extern void at_ide_init(void);
extern void cmdpc30_init(void);
extern void deskpro386_init(void);
extern void ps1_m2011_init(void);
extern void ps1_m2121_init(void);
@@ -163,7 +164,7 @@ MODEL models[] =
{"IBM AT", ROM_IBMAT, "ibmat", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 256,15872, 128, 63, ibm_at_init, NULL},
{"Compaq Portable II", ROM_PORTABLEII, "portableii", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 15, 1, 63, at_init, NULL},
{"Compaq Portable III", ROM_PORTABLEIII, "portableiii", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 15, 1, 63, at_init, NULL},
{"Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE, 640,16384, 128, 127, at_ide_init, NULL},
{"Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE, 640,16384, 128, 127, cmdpc30_init, NULL},
{"AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE, 512,16384, 128, 127, at_neat_init, NULL},
{"Award 286 clone", ROM_AWARD286, "award286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE, 512,16384, 128, 127, at_scat_init, NULL},
{"Hyundai Super-286TR", ROM_SUPER286TR, "super286tr", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE, 512,16384, 128, 127, at_scat_init, NULL},
@@ -432,6 +433,12 @@ void at_ide_init(void)
ide_init();
}
void cmdpc30_init(void)
{
at_ide_init();
mem_remap_top_384k();
}
void deskpro386_init(void)
{
at_init();
@@ -697,10 +704,10 @@ void at_mb500n_init(void)
{
at_ide_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0x11);
pci_slot(0x12);
pci_slot(0x13);
pci_slot(0x14);
pci_slot(0x13);
pci_slot(0x12);
pci_slot(0x11);
i430fx_init();
piix_init(7, 0x14, 0x13, 0x12, 0x11);
fdc37c665_init();
@@ -730,10 +737,10 @@ void at_p54tp4xe_init(void)
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(9);
pci_slot(10);
pci_slot(11);
pci_slot(12);
pci_slot(11);
pci_slot(10);
pci_slot(9);
i430fx_init();
piix_init(7, 12, 11, 10, 9);
fdc37c665_init();
@@ -763,12 +770,12 @@ void at_p55t2s_init(void)
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0x11);
pci_slot(0x12);
pci_slot(0x13);
pci_slot(0x11);
pci_slot(0x14);
pci_slot(0x13);
i430hx_init();
piix_init(7, 0x12, 0x13, 0x14, 0x11);
piix_init(7, 0x12, 0x11, 0x14, 0x13);
pc87306_init();
acerm3a_io_init();
device_add(&intel_flash_bxt_device);
@@ -813,10 +820,10 @@ void at_p55t2p4_init(void)
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(9);
pci_slot(10);
pci_slot(11);
pci_slot(12);
pci_slot(11);
pci_slot(10);
pci_slot(9);
i430hx_init();
piix3_init(7, 12, 11, 10, 9);
w83877f_init();
@@ -845,10 +852,10 @@ void at_p55tvp4_init(void)
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(9);
pci_slot(10);
pci_slot(11);
pci_slot(12);
pci_slot(11);
pci_slot(10);
pci_slot(9);
i430vx_init();
piix3_init(7, 12, 11, 10, 9);
w83877f_init();
@@ -875,10 +882,10 @@ void at_i440fx_init(void)
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0xb);
pci_slot(0xc);
pci_slot(0xd);
pci_slot(0xe);
pci_slot(0xd);
pci_slot(0xc);
pci_slot(0xb);
i430vx_init();
piix3_init(7, 0xe, 0xd, 0xc, 0xb);
fdc37c665_init();
@@ -890,10 +897,10 @@ void at_s1668_init(void)
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0xb);
pci_slot(0xc);
pci_slot(0xd);
pci_slot(0xe);
pci_slot(0xd);
pci_slot(0xc);
pci_slot(0xb);
i440fx_init();
piix3_init(7, 0xe, 0xd, 0xc, 0xb);
fdc37c665_init();

2
src/pc.c
View File

@@ -502,7 +502,6 @@ void resetpchard_init(void)
model_init();
video_init();
speaker_init();
network_reset();
ide_ter_disable();
ide_qua_disable();
@@ -519,6 +518,7 @@ void resetpchard_init(void)
resetide();
scsi_card_init();
network_reset();
sound_card_init();
if (mpu401_standalone_enable)

4
src/pc87306.c
View File

@@ -154,7 +154,9 @@ void pc87306_write(uint16_t port, uint8_t val, void *priv)
{
uint8_t index;
uint8_t valxor;
#if 0
uint16_t or_value;
#endif
index = (port & 1) ? 0 : 1;
@@ -239,6 +241,7 @@ process_value:
}
if (valxor & 0xc0)
{
#if 0
ide_pri_disable();
if (val & 0x80)
{
@@ -254,6 +257,7 @@ process_value:
{
ide_pri_enable_ex();
}
#endif
}
break;

6
src/scsi_buslogic.c
View File

@@ -533,11 +533,11 @@ BuslogicInterrupt(Buslogic_t *bl, int set)
{
if (set)
{
pci_set_irq(bl->Card, PCI_INTA);
pci_set_irq(bl->Card, PCI_INTB);
}
else
{
pci_clear_irq(bl->Card, PCI_INTA);
pci_clear_irq(bl->Card, PCI_INTB);
}
}
else
@@ -2116,7 +2116,7 @@ BuslogicPCIRead(int func, int addr, void *p)
case 0x3C:
return bl->Irq;
case 0x3D:
return PCI_INTA;
return PCI_INTB;
}
return(0);