Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
433
src/chipset/intel_4x0.c
Normal file
433
src/chipset/intel_4x0.c
Normal file
@@ -0,0 +1,433 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Implementation of the Intel PCISet chips from 420TX to 440FX.
|
||||
*
|
||||
* Version: @(#)intel_4x0.c 1.0.0 2019/05/13
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
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*
|
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* Copyright 2019 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <wchar.h>
|
||||
#include "../86box.h"
|
||||
#include "../mem.h"
|
||||
#include "../io.h"
|
||||
#include "../rom.h"
|
||||
#include "../pci.h"
|
||||
#include "../device.h"
|
||||
#include "../keyboard.h"
|
||||
#include "chipset.h"
|
||||
|
||||
|
||||
enum
|
||||
{
|
||||
INTEL_420TX,
|
||||
INTEL_430LX,
|
||||
INTEL_430NX,
|
||||
INTEL_430FX,
|
||||
INTEL_430FX_PB640,
|
||||
INTEL_430HX,
|
||||
INTEL_430VX
|
||||
#if defined(DEV_BRANCH) && defined(USE_I686)
|
||||
,INTEL_440FX
|
||||
#endif
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t regs[256];
|
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int type;
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} i4x0_t;
|
||||
static void
|
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i4x0_map(uint32_t addr, uint32_t size, int state)
|
||||
{
|
||||
switch (state & 3) {
|
||||
case 0:
|
||||
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
|
||||
break;
|
||||
case 1:
|
||||
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
|
||||
break;
|
||||
case 2:
|
||||
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
|
||||
break;
|
||||
case 3:
|
||||
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
|
||||
break;
|
||||
}
|
||||
flushmmucache_nopc();
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
i4x0_write(int func, int addr, uint8_t val, void *priv)
|
||||
{
|
||||
i4x0_t *dev = (i4x0_t *) priv;
|
||||
|
||||
if (func)
|
||||
return;
|
||||
|
||||
if ((addr >= 0x10) && (addr < 0x4f))
|
||||
return;
|
||||
|
||||
switch (addr) {
|
||||
case 0x00: case 0x01: case 0x02: case 0x03:
|
||||
case 0x08: case 0x09: case 0x0a: case 0x0b:
|
||||
case 0x0c: case 0x0e:
|
||||
return;
|
||||
|
||||
case 0x04: /*Command register*/
|
||||
if (dev->type >= INTEL_430FX) {
|
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if (dev->type == INTEL_430FX_PB640)
|
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val &= 0x06;
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else
|
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val &= 0x02;
|
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} else
|
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val &= 0x42;
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val |= 0x04;
|
||||
break;
|
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case 0x05:
|
||||
if (dev->type >= INTEL_430FX)
|
||||
val = 0;
|
||||
else
|
||||
val &= 0x01;
|
||||
break;
|
||||
|
||||
case 0x06: /*Status*/
|
||||
val = 0;
|
||||
break;
|
||||
case 0x07:
|
||||
if (dev->type >= INTEL_430HX) {
|
||||
val &= 0x80;
|
||||
val |= 0x02;
|
||||
} else {
|
||||
val = 0x02;
|
||||
if (dev->type == INTEL_430FX_PB640)
|
||||
val |= 0x20;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x59: /*PAM0*/
|
||||
if ((dev->regs[0x59] ^ val) & 0xf0) {
|
||||
i4x0_map(0xf0000, 0x10000, val >> 4);
|
||||
shadowbios = (val & 0x10);
|
||||
}
|
||||
break;
|
||||
case 0x5a: /*PAM1*/
|
||||
if ((dev->regs[0x5a] ^ val) & 0x0f)
|
||||
i4x0_map(0xc0000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5a] ^ val) & 0xf0)
|
||||
i4x0_map(0xc4000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x5b: /*PAM2*/
|
||||
if ((dev->regs[0x5b] ^ val) & 0x0f)
|
||||
i4x0_map(0xc8000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5b] ^ val) & 0xf0)
|
||||
i4x0_map(0xcc000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x5c: /*PAM3*/
|
||||
if ((dev->regs[0x5c] ^ val) & 0x0f)
|
||||
i4x0_map(0xd0000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5c] ^ val) & 0xf0)
|
||||
i4x0_map(0xd4000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x5d: /*PAM4*/
|
||||
if ((dev->regs[0x5d] ^ val) & 0x0f)
|
||||
i4x0_map(0xd8000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5d] ^ val) & 0xf0)
|
||||
i4x0_map(0xdc000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x5e: /*PAM5*/
|
||||
if ((dev->regs[0x5e] ^ val) & 0x0f)
|
||||
i4x0_map(0xe0000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5e] ^ val) & 0xf0)
|
||||
i4x0_map(0xe4000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x5f: /*PAM6*/
|
||||
if ((dev->regs[0x5f] ^ val) & 0x0f)
|
||||
i4x0_map(0xe8000, 0x04000, val & 0xf);
|
||||
if ((dev->regs[0x5f] ^ val) & 0xf0)
|
||||
i4x0_map(0xec000, 0x04000, val >> 4);
|
||||
break;
|
||||
case 0x72: /*SMRAM*/
|
||||
if ((dev->type >= INTEL_430FX) && ((dev->regs[0x72] ^ val) & 0x48))
|
||||
i4x0_map(0xa0000, 0x20000, ((val & 0x48) == 0x48) ? 3 : 0);
|
||||
else if ((dev->type < INTEL_430FX) && ((dev->regs[0x72] ^ val) & 0x20))
|
||||
i4x0_map(0xa0000, 0x20000, ((val & 0x20) == 0x20) ? 3 : 0);
|
||||
break;
|
||||
}
|
||||
|
||||
dev->regs[addr] = val;
|
||||
}
|
||||
|
||||
|
||||
static uint8_t
|
||||
i4x0_read(int func, int addr, void *priv)
|
||||
{
|
||||
i4x0_t *dev = (i4x0_t *) priv;
|
||||
|
||||
if (func)
|
||||
return 0xff;
|
||||
|
||||
return dev->regs[addr];
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
i4x0_reset(void *priv)
|
||||
{
|
||||
i4x0_t *i4x0 = (i4x0_t *)priv;
|
||||
|
||||
i4x0_write(0, 0x59, 0x00, priv);
|
||||
if (i4x0->type >= INTEL_430FX)
|
||||
i4x0_write(0, 0x72, 0x02, priv);
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
i4x0_close(void *p)
|
||||
{
|
||||
i4x0_t *i4x0 = (i4x0_t *)p;
|
||||
|
||||
free(i4x0);
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
*i4x0_init(const device_t *info)
|
||||
{
|
||||
i4x0_t *i4x0 = (i4x0_t *) malloc(sizeof(i4x0_t));
|
||||
memset(i4x0, 0, sizeof(i4x0_t));
|
||||
|
||||
i4x0->type = info->local;
|
||||
|
||||
i4x0->regs[0x00] = 0x86; i4x0->regs[0x01] = 0x80; /*Intel*/
|
||||
switch(i4x0->type) {
|
||||
case INTEL_420TX:
|
||||
i4x0->regs[0x02] = 0x83; i4x0->regs[0x03] = 0x04; /*82424TX/ZX*/
|
||||
i4x0->regs[0x08] = 0x03; /*A3 stepping*/
|
||||
i4x0->regs[0x50] = 0x80;
|
||||
i4x0->regs[0x52] = 0x40; /*256kb PLB cache*/
|
||||
break;
|
||||
case INTEL_430LX:
|
||||
i4x0->regs[0x02] = 0xa3; i4x0->regs[0x03] = 0x04; /*82434LX/NX*/
|
||||
i4x0->regs[0x08] = 0x03; /*A3 stepping*/
|
||||
i4x0->regs[0x50] = 0x80;
|
||||
i4x0->regs[0x52] = 0x40; /*256kb PLB cache*/
|
||||
break;
|
||||
case INTEL_430NX:
|
||||
i4x0->regs[0x02] = 0xa3; i4x0->regs[0x03] = 0x04; /*82434LX/NX*/
|
||||
i4x0->regs[0x08] = 0x10; /*A0 stepping*/
|
||||
i4x0->regs[0x50] = 0xA0;
|
||||
i4x0->regs[0x52] = 0x44; /*256kb PLB cache*/
|
||||
i4x0->regs[0x66] = i4x0->regs[0x67] = 0x02;
|
||||
break;
|
||||
case INTEL_430FX:
|
||||
case INTEL_430FX_PB640:
|
||||
i4x0->regs[0x02] = 0x2d; i4x0->regs[0x03] = 0x12; /*SB82437FX-66*/
|
||||
if (i4x0->type == INTEL_430FX_PB640)
|
||||
i4x0->regs[0x08] = 0x02; /*???? stepping*/
|
||||
else
|
||||
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
|
||||
i4x0->regs[0x52] = 0x40; /*256kb PLB cache*/
|
||||
break;
|
||||
case INTEL_430HX:
|
||||
i4x0->regs[0x02] = 0x50; i4x0->regs[0x03] = 0x12; /*82439HX*/
|
||||
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
|
||||
i4x0->regs[0x51] = 0x20;
|
||||
i4x0->regs[0x52] = 0xB5; /*512kb cache*/
|
||||
i4x0->regs[0x56] = 0x52; /*DRAM control*/
|
||||
i4x0->regs[0x59] = 0x40;
|
||||
i4x0->regs[0x5A] = i4x0->regs[0x5B] = i4x0->regs[0x5C] = i4x0->regs[0x5D] = 0x44;
|
||||
i4x0->regs[0x5E] = i4x0->regs[0x5F] = 0x44;
|
||||
i4x0->regs[0x65] = i4x0->regs[0x66] = i4x0->regs[0x67] = 0x02;
|
||||
i4x0->regs[0x68] = 0x11;
|
||||
break;
|
||||
case INTEL_430VX:
|
||||
i4x0->regs[0x02] = 0x30; i4x0->regs[0x03] = 0x70; /*82437VX*/
|
||||
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
|
||||
i4x0->regs[0x52] = 0x42; /*256kb PLB cache*/
|
||||
i4x0->regs[0x53] = 0x14;
|
||||
i4x0->regs[0x56] = 0x52; /*DRAM control*/
|
||||
i4x0->regs[0x67] = 0x11;
|
||||
i4x0->regs[0x69] = 0x03;
|
||||
i4x0->regs[0x70] = 0x20;
|
||||
i4x0->regs[0x74] = 0x0e;
|
||||
i4x0->regs[0x78] = 0x23;
|
||||
break;
|
||||
#if defined(DEV_BRANCH) && defined(USE_I686)
|
||||
case INTEL_440FX:
|
||||
i4x0->regs[0x02] = 0x37; i4x0->regs[0x03] = 0x12; /*82441FX*/
|
||||
i4x0->regs[0x08] = 0x02; /*A0 stepping*/
|
||||
i4x0->regs[0x2c] = 0xf4;
|
||||
i4x0->regs[0x2d] = 0x1a;
|
||||
i4x0->regs[0x2f] = 0x11;
|
||||
i4x0->regs[0x51] = 0x01;
|
||||
i4x0->regs[0x53] = 0x80;
|
||||
i4x0->regs[0x58] = 0x10;
|
||||
i4x0->regs[0x5a] = i4x0->regs[0x5b] = i4x0->regs[0x5c] = i4x0->regs[0x5d] = 0x11;
|
||||
i4x0->regs[0x5e] = 0x11;
|
||||
i4x0->regs[0x5f] = 0x31;
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
i4x0->regs[0x04] = 0x06; i4x0->regs[0x05] = 0x00;
|
||||
#if defined(DEV_BRANCH) && defined(USE_I686)
|
||||
if (i4x0->type == INTEL_440FX)
|
||||
i4x0->regs[0x06] = 0x80;
|
||||
#endif
|
||||
if (i4x0->type == INTEL_430FX)
|
||||
i4x0->regs[0x07] = 0x82;
|
||||
#if defined(DEV_BRANCH) && defined(USE_I686)
|
||||
else if (i4x0->type != INTEL_440FX)
|
||||
#else
|
||||
else
|
||||
#endif
|
||||
i4x0->regs[0x07] = 0x02;
|
||||
i4x0->regs[0x0b] = 0x06;
|
||||
if (i4x0->type >= INTEL_430FX)
|
||||
i4x0->regs[0x57] = 0x01;
|
||||
else
|
||||
i4x0->regs[0x57] = 0x31;
|
||||
i4x0->regs[0x60] = i4x0->regs[0x61] = i4x0->regs[0x62] = i4x0->regs[0x63] = 0x02;
|
||||
i4x0->regs[0x64] = 0x02;
|
||||
if (i4x0->type >= INTEL_430FX)
|
||||
i4x0->regs[0x72] = 0x02;
|
||||
|
||||
pci_add_card(0, i4x0_read, i4x0_write, i4x0);
|
||||
|
||||
return i4x0;
|
||||
}
|
||||
|
||||
|
||||
const device_t i420tx_device =
|
||||
{
|
||||
"Intel 82424TX",
|
||||
DEVICE_PCI,
|
||||
INTEL_420TX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430lx_device =
|
||||
{
|
||||
"Intel 82434LX",
|
||||
DEVICE_PCI,
|
||||
INTEL_430LX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430nx_device =
|
||||
{
|
||||
"Intel 82434NX",
|
||||
DEVICE_PCI,
|
||||
INTEL_430NX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430fx_device =
|
||||
{
|
||||
"Intel SB82437FX-66",
|
||||
DEVICE_PCI,
|
||||
INTEL_430FX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430fx_pb640_device =
|
||||
{
|
||||
"Intel SB82437FX-66 (PB640)",
|
||||
DEVICE_PCI,
|
||||
INTEL_430FX_PB640,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430hx_device =
|
||||
{
|
||||
"Intel 82439HX",
|
||||
DEVICE_PCI,
|
||||
INTEL_430HX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t i430vx_device =
|
||||
{
|
||||
"Intel 82437VX",
|
||||
DEVICE_PCI,
|
||||
INTEL_430VX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_I686)
|
||||
const device_t i440fx_device =
|
||||
{
|
||||
"Intel 82441FX",
|
||||
DEVICE_PCI,
|
||||
INTEL_440FX,
|
||||
i4x0_init,
|
||||
i4x0_close,
|
||||
i4x0_reset,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
#endif
|
||||
Reference in New Issue
Block a user