Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
661
src/cpu_new/386_dynarec.c
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661
src/cpu_new/386_dynarec.c
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@@ -0,0 +1,661 @@
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include <math.h>
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#ifndef INFINITY
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# define INFINITY (__builtin_inff())
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#endif
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#define HAVE_STDARG_H
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#include "../86box.h"
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#include "cpu.h"
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#include "x86.h"
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#include "x86_ops.h"
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#include "x87.h"
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#include "../io.h"
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#include "../mem.h"
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#include "../nmi.h"
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#include "../pic.h"
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#include "../timer.h"
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#include "../floppy/fdd.h"
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#include "../floppy/fdc.h"
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#ifdef USE_DYNAREC
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#include "codegen.h"
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#include "codegen_backend.h"
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#endif
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#include "386_common.h"
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#ifdef ENABLE_386_DYNAREC_LOG
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int x386_dynarec_do_log = ENABLE_386_DYNAREC_LOG;
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void
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x386_dynarec_log(const char *fmt, ...)
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{
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va_list ap;
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if (x386_dynarec_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define x386_dynarec_log(fmt, ...)
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#endif
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#define CPU_BLOCK_END() cpu_block_end = 1
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int inrecomp = 0;
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int cpu_recomp_blocks, cpu_recomp_full_ins, cpu_new_blocks;
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int cpu_recomp_blocks_latched, cpu_recomp_ins_latched, cpu_recomp_full_ins_latched, cpu_new_blocks_latched;
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int cpu_block_end = 0;
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static __inline void fetch_ea_32_long(uint32_t rmdat)
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{
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eal_r = eal_w = NULL;
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easeg = cpu_state.ea_seg->base;
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if (cpu_rm == 4)
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{
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uint8_t sib = rmdat >> 8;
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switch (cpu_mod)
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{
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case 0:
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cpu_state.eaaddr = cpu_state.regs[sib & 7].l;
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cpu_state.pc++;
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break;
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case 1:
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cpu_state.pc++;
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cpu_state.eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l;
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break;
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case 2:
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cpu_state.eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l;
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cpu_state.pc += 5;
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break;
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}
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/*SIB byte present*/
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if ((sib & 7) == 5 && !cpu_mod)
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cpu_state.eaaddr = getlong();
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else if ((sib & 6) == 4 && !cpu_state.ssegs)
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{
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easeg = ss;
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cpu_state.ea_seg = &cpu_state.seg_ss;
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}
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if (((sib >> 3) & 7) != 4)
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cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
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}
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else
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{
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cpu_state.eaaddr = cpu_state.regs[cpu_rm].l;
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if (cpu_mod)
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{
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if (cpu_rm == 5 && !cpu_state.ssegs)
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{
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easeg = ss;
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cpu_state.ea_seg = &cpu_state.seg_ss;
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}
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if (cpu_mod == 1)
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{
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cpu_state.eaaddr += ((uint32_t)(int8_t)(rmdat >> 8));
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cpu_state.pc++;
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}
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else
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{
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cpu_state.eaaddr += getlong();
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}
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}
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else if (cpu_rm == 5)
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{
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cpu_state.eaaddr = getlong();
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}
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}
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if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
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{
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uint32_t addr = easeg + cpu_state.eaaddr;
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if ( readlookup2[addr >> 12] != -1)
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eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr);
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if (writelookup2[addr >> 12] != -1)
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eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
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}
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cpu_state.last_ea = cpu_state.eaaddr;
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}
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static __inline void fetch_ea_16_long(uint32_t rmdat)
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{
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eal_r = eal_w = NULL;
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easeg = cpu_state.ea_seg->base;
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if (!cpu_mod && cpu_rm == 6)
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{
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cpu_state.eaaddr = getword();
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}
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else
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{
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switch (cpu_mod)
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{
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case 0:
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cpu_state.eaaddr = 0;
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break;
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case 1:
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cpu_state.eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++;
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break;
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case 2:
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cpu_state.eaaddr = getword();
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break;
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}
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cpu_state.eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]);
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if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs)
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{
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easeg = ss;
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cpu_state.ea_seg = &cpu_state.seg_ss;
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}
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cpu_state.eaaddr &= 0xFFFF;
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}
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if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
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{
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uint32_t addr = easeg + cpu_state.eaaddr;
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if ( readlookup2[addr >> 12] != -1)
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eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr);
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if (writelookup2[addr >> 12] != -1)
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eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
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}
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cpu_state.last_ea = cpu_state.eaaddr;
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}
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#define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_16_long(rmdat); if (cpu_state.abrt) return 1; }
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#define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_32_long(rmdat); } if (cpu_state.abrt) return 1
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#include "x86_flags.h"
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/*Prefetch emulation is a fairly simplistic model:
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- All instruction bytes must be fetched before it starts.
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- Cycles used for non-instruction memory accesses are counted and subtracted
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from the total cycles taken
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- Any remaining cycles are used to refill the prefetch queue.
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Note that this is only used for 286 / 386 systems. It is disabled when the
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internal cache on 486+ CPUs is enabled.
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*/
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static int prefetch_bytes = 0;
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static int prefetch_prefixes = 0;
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static void prefetch_run(int instr_cycles, int bytes, int modrm, int reads, int reads_l, int writes, int writes_l, int ea32)
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{
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int mem_cycles = reads*cpu_cycles_read + reads_l*cpu_cycles_read_l + writes*cpu_cycles_write + writes_l*cpu_cycles_write_l;
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if (instr_cycles < mem_cycles)
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instr_cycles = mem_cycles;
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prefetch_bytes -= prefetch_prefixes;
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prefetch_bytes -= bytes;
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if (modrm != -1)
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{
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if (ea32)
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{
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if ((modrm & 7) == 4)
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{
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if ((modrm & 0x700) == 0x500)
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prefetch_bytes -= 5;
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else if ((modrm & 0xc0) == 0x40)
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prefetch_bytes -= 2;
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else if ((modrm & 0xc0) == 0x80)
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prefetch_bytes -= 5;
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}
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else
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{
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if ((modrm & 0xc7) == 0x05)
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prefetch_bytes -= 4;
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else if ((modrm & 0xc0) == 0x40)
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prefetch_bytes--;
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else if ((modrm & 0xc0) == 0x80)
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prefetch_bytes -= 4;
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}
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}
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else
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{
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if ((modrm & 0xc7) == 0x06)
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prefetch_bytes -= 2;
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else if ((modrm & 0xc0) != 0xc0)
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prefetch_bytes -= ((modrm & 0xc0) >> 6);
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}
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}
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/* Fill up prefetch queue */
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while (prefetch_bytes < 0)
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{
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prefetch_bytes += cpu_prefetch_width;
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cycles -= cpu_prefetch_cycles;
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}
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/* Subtract cycles used for memory access by instruction */
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instr_cycles -= mem_cycles;
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while (instr_cycles >= cpu_prefetch_cycles)
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{
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prefetch_bytes += cpu_prefetch_width;
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instr_cycles -= cpu_prefetch_cycles;
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}
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prefetch_prefixes = 0;
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if (prefetch_bytes > 16)
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prefetch_bytes = 16;
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}
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static void prefetch_flush()
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{
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prefetch_bytes = 0;
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}
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#define PREFETCH_RUN(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32) \
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do { if (cpu_prefetch_cycles) prefetch_run(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32); } while (0)
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#define PREFETCH_PREFIX() do { if (cpu_prefetch_cycles) prefetch_prefixes++; } while (0)
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#define PREFETCH_FLUSH() prefetch_flush()
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#define OP_TABLE(name) ops_ ## name
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#define CLOCK_CYCLES(c) cycles -= (c)
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#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
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#include "386_ops.h"
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|
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#define CACHE_ON() (!(cr0 & (1 << 30)) && !(cpu_state.flags & T_FLAG))
|
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#ifdef USE_DYNAREC
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static int cycles_main = 0;
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||||
|
||||
void exec386_dynarec(int cycs)
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{
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int vector;
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uint32_t addr;
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int tempi;
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int cycdiff;
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int oldcyc;
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int cyc_period = cycs / 2000; /*5us*/
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||||
cycles_main += cycs;
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while (cycles_main > 0)
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||||
{
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||||
int cycles_start;
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||||
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||||
cycles += cyc_period;
|
||||
cycles_start = cycles;
|
||||
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||||
while (cycles>0)
|
||||
{
|
||||
oldcyc=cycles;
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||||
if (!CACHE_ON()) /*Interpret block*/
|
||||
{
|
||||
cpu_block_end = 0;
|
||||
x86_was_reset = 0;
|
||||
while (!cpu_block_end)
|
||||
{
|
||||
cpu_state.oldpc = cpu_state.pc;
|
||||
cpu_state.op32 = use32;
|
||||
|
||||
cpu_state.ea_seg = &cpu_state.seg_ds;
|
||||
cpu_state.ssegs = 0;
|
||||
|
||||
fetchdat = fastreadl(cs + cpu_state.pc);
|
||||
|
||||
if (!cpu_state.abrt)
|
||||
{
|
||||
uint8_t opcode = fetchdat & 0xFF;
|
||||
fetchdat >>= 8;
|
||||
trap = cpu_state.flags & T_FLAG;
|
||||
|
||||
cpu_state.pc++;
|
||||
x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
|
||||
}
|
||||
|
||||
if (((cs + cpu_state.pc) >> 12) != pccache)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (cpu_state.abrt)
|
||||
CPU_BLOCK_END();
|
||||
if (trap)
|
||||
CPU_BLOCK_END();
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
ins++;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t phys_addr = get_phys(cs+cpu_state.pc);
|
||||
int hash = HASH(phys_addr);
|
||||
codeblock_t *block = &codeblock[codeblock_hash[hash]];
|
||||
int valid_block = 0;
|
||||
|
||||
if (!cpu_state.abrt)
|
||||
{
|
||||
page_t *page = &pages[phys_addr >> 12];
|
||||
|
||||
/*Block must match current CS, PC, code segment size,
|
||||
and physical address. The physical address check will
|
||||
also catch any page faults at this stage*/
|
||||
valid_block = (block->pc == cs + cpu_state.pc) && (block->_cs == cs) &&
|
||||
(block->phys == phys_addr) && !((block->status ^ cpu_cur_status) & CPU_STATUS_FLAGS) &&
|
||||
((block->status & cpu_cur_status & CPU_STATUS_MASK) == (cpu_cur_status & CPU_STATUS_MASK));
|
||||
if (!valid_block)
|
||||
{
|
||||
uint64_t mask = (uint64_t)1 << ((phys_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
|
||||
int byte_offset = (phys_addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
|
||||
uint64_t byte_mask = 1ull << (PAGE_BYTE_MASK_MASK & 0x3f);
|
||||
|
||||
if ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask))
|
||||
{
|
||||
/*Walk page tree to see if we find the correct block*/
|
||||
codeblock_t *new_block = codeblock_tree_find(phys_addr, cs);
|
||||
if (new_block)
|
||||
{
|
||||
valid_block = (new_block->pc == cs + cpu_state.pc) && (new_block->_cs == cs) &&
|
||||
(new_block->phys == phys_addr) && !((new_block->status ^ cpu_cur_status) & CPU_STATUS_FLAGS) &&
|
||||
((new_block->status & cpu_cur_status & CPU_STATUS_MASK) == (cpu_cur_status & CPU_STATUS_MASK));
|
||||
if (valid_block)
|
||||
{
|
||||
block = new_block;
|
||||
codeblock_hash[hash] = get_block_nr(block);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (valid_block && (block->page_mask & *block->dirty_mask))
|
||||
{
|
||||
codegen_check_flush(page, page->dirty_mask, phys_addr);
|
||||
if (block->pc == BLOCK_PC_INVALID)
|
||||
valid_block = 0;
|
||||
else if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
|
||||
block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
|
||||
}
|
||||
if (valid_block && block->page_mask2)
|
||||
{
|
||||
/*We don't want the second page to cause a page
|
||||
fault at this stage - that would break any
|
||||
code crossing a page boundary where the first
|
||||
page is present but the second isn't. Instead
|
||||
allow the first page to be interpreted and for
|
||||
the page fault to occur when the page boundary
|
||||
is actually crossed.*/
|
||||
uint32_t phys_addr_2 = get_phys_noabrt(block->pc + ((block->flags & CODEBLOCK_BYTE_MASK) ? 0x40 : 0x400));
|
||||
page_t *page_2 = &pages[phys_addr_2 >> 12];
|
||||
if ((block->phys_2 ^ phys_addr_2) & ~0xfff)
|
||||
valid_block = 0;
|
||||
else if (block->page_mask2 & *block->dirty_mask2)
|
||||
{
|
||||
codegen_check_flush(page_2, page_2->dirty_mask, phys_addr_2);
|
||||
if (block->pc == BLOCK_PC_INVALID)
|
||||
valid_block = 0;
|
||||
else if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
|
||||
block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
|
||||
}
|
||||
}
|
||||
if (valid_block && (block->flags & CODEBLOCK_IN_DIRTY_LIST))
|
||||
{
|
||||
block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
|
||||
if (block->flags & CODEBLOCK_BYTE_MASK)
|
||||
block->flags |= CODEBLOCK_NO_IMMEDIATES;
|
||||
else
|
||||
block->flags |= CODEBLOCK_BYTE_MASK;
|
||||
}
|
||||
if (valid_block && (block->flags & CODEBLOCK_WAS_RECOMPILED) && (block->flags & CODEBLOCK_STATIC_TOP) && block->TOP != (cpu_state.TOP & 7))
|
||||
{
|
||||
/*FPU top-of-stack does not match the value this block was compiled
|
||||
with, re-compile using dynamic top-of-stack*/
|
||||
block->flags &= ~(CODEBLOCK_STATIC_TOP | CODEBLOCK_WAS_RECOMPILED);
|
||||
}
|
||||
}
|
||||
|
||||
if (valid_block && (block->flags & CODEBLOCK_WAS_RECOMPILED))
|
||||
{
|
||||
void (*code)() = (void *)&block->data[BLOCK_START];
|
||||
|
||||
inrecomp=1;
|
||||
code();
|
||||
inrecomp=0;
|
||||
|
||||
cpu_recomp_blocks++;
|
||||
}
|
||||
else if (valid_block && !cpu_state.abrt)
|
||||
{
|
||||
uint32_t start_pc = cs+cpu_state.pc;
|
||||
const int max_block_size = (block->flags & CODEBLOCK_BYTE_MASK) ? ((128 - 25) - (start_pc & 0x3f)) : 1000;
|
||||
|
||||
cpu_block_end = 0;
|
||||
x86_was_reset = 0;
|
||||
|
||||
cpu_new_blocks++;
|
||||
|
||||
codegen_block_start_recompile(block);
|
||||
codegen_in_recompile = 1;
|
||||
|
||||
while (!cpu_block_end)
|
||||
{
|
||||
cpu_state.oldpc = cpu_state.pc;
|
||||
cpu_state.op32 = use32;
|
||||
|
||||
cpu_state.ea_seg = &cpu_state.seg_ds;
|
||||
cpu_state.ssegs = 0;
|
||||
|
||||
fetchdat = fastreadl(cs + cpu_state.pc);
|
||||
|
||||
if (!cpu_state.abrt)
|
||||
{
|
||||
uint8_t opcode = fetchdat & 0xFF;
|
||||
fetchdat >>= 8;
|
||||
|
||||
trap = cpu_state.flags & T_FLAG;
|
||||
|
||||
cpu_state.pc++;
|
||||
|
||||
codegen_generate_call(opcode, x86_opcodes[(opcode | cpu_state.op32) & 0x3ff], fetchdat, cpu_state.pc, cpu_state.pc-1);
|
||||
|
||||
x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
|
||||
|
||||
if (x86_was_reset)
|
||||
break;
|
||||
}
|
||||
|
||||
/*Cap source code at 4000 bytes per block; this
|
||||
will prevent any block from spanning more than
|
||||
2 pages. In practice this limit will never be
|
||||
hit, as host block size is only 2kB*/
|
||||
if (((cs+cpu_state.pc) - start_pc) >= max_block_size)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (trap)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (cpu_state.abrt)
|
||||
{
|
||||
codegen_block_remove();
|
||||
CPU_BLOCK_END();
|
||||
}
|
||||
|
||||
ins++;
|
||||
}
|
||||
|
||||
if (!cpu_state.abrt && !x86_was_reset)
|
||||
codegen_block_end_recompile(block);
|
||||
|
||||
if (x86_was_reset)
|
||||
codegen_reset();
|
||||
|
||||
codegen_in_recompile = 0;
|
||||
}
|
||||
else if (!cpu_state.abrt)
|
||||
{
|
||||
/*Mark block but do not recompile*/
|
||||
uint32_t start_pc = cs+cpu_state.pc;
|
||||
const int max_block_size = (block->flags & CODEBLOCK_BYTE_MASK) ? ((128 - 25) - (start_pc & 0x3f)) : 1000;
|
||||
|
||||
cpu_block_end = 0;
|
||||
x86_was_reset = 0;
|
||||
|
||||
codegen_block_init(phys_addr);
|
||||
|
||||
while (!cpu_block_end)
|
||||
{
|
||||
cpu_state.oldpc = cpu_state.pc;
|
||||
cpu_state.op32 = use32;
|
||||
|
||||
cpu_state.ea_seg = &cpu_state.seg_ds;
|
||||
cpu_state.ssegs = 0;
|
||||
|
||||
codegen_endpc = (cs + cpu_state.pc) + 8;
|
||||
fetchdat = fastreadl(cs + cpu_state.pc);
|
||||
|
||||
if (!cpu_state.abrt)
|
||||
{
|
||||
uint8_t opcode = fetchdat & 0xFF;
|
||||
fetchdat >>= 8;
|
||||
|
||||
trap = cpu_state.flags & T_FLAG;
|
||||
|
||||
cpu_state.pc++;
|
||||
|
||||
x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
|
||||
|
||||
if (x86_was_reset)
|
||||
break;
|
||||
}
|
||||
|
||||
/*Cap source code at 4000 bytes per block; this
|
||||
will prevent any block from spanning more than
|
||||
2 pages. In practice this limit will never be
|
||||
hit, as host block size is only 2kB*/
|
||||
if (((cs+cpu_state.pc) - start_pc) >= max_block_size)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (trap)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
if (cpu_state.abrt)
|
||||
{
|
||||
codegen_block_remove();
|
||||
CPU_BLOCK_END();
|
||||
}
|
||||
|
||||
ins++;
|
||||
}
|
||||
|
||||
if (!cpu_state.abrt && !x86_was_reset)
|
||||
codegen_block_end();
|
||||
|
||||
if (x86_was_reset)
|
||||
codegen_reset();
|
||||
}
|
||||
else
|
||||
cpu_state.oldpc = cpu_state.pc;
|
||||
|
||||
}
|
||||
|
||||
cycdiff=oldcyc-cycles;
|
||||
tsc += cycdiff;
|
||||
|
||||
if (cpu_state.abrt)
|
||||
{
|
||||
flags_rebuild();
|
||||
tempi = cpu_state.abrt;
|
||||
cpu_state.abrt = 0;
|
||||
x86_doabrt(tempi);
|
||||
if (cpu_state.abrt)
|
||||
{
|
||||
cpu_state.abrt = 0;
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x386_dynarec_log("Double fault %i\n", ins);
|
||||
pmodeint(8, 0);
|
||||
if (cpu_state.abrt)
|
||||
{
|
||||
cpu_state.abrt = 0;
|
||||
softresetx86();
|
||||
cpu_set_edx();
|
||||
#ifdef ENABLE_386_DYNAREC_LOG
|
||||
x386_dynarec_log("Triple fault - reset\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (trap)
|
||||
{
|
||||
trap = 0;
|
||||
flags_rebuild();
|
||||
if (msw&1)
|
||||
{
|
||||
pmodeint(1,0);
|
||||
}
|
||||
else
|
||||
{
|
||||
writememw(ss,(SP-2)&0xFFFF,cpu_state.flags);
|
||||
writememw(ss,(SP-4)&0xFFFF,CS);
|
||||
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
|
||||
SP-=6;
|
||||
addr = (1 << 2) + idt.base;
|
||||
cpu_state.flags &= ~I_FLAG;
|
||||
cpu_state.flags &= ~T_FLAG;
|
||||
cpu_state.pc=readmemw(0,addr);
|
||||
loadcs(readmemw(0,addr+2));
|
||||
}
|
||||
}
|
||||
else if (nmi && nmi_enable && nmi_mask)
|
||||
{
|
||||
cpu_state.oldpc = cpu_state.pc;
|
||||
x86_int(2);
|
||||
nmi_enable = 0;
|
||||
if (nmi_auto_clear)
|
||||
{
|
||||
nmi_auto_clear = 0;
|
||||
nmi = 0;
|
||||
}
|
||||
}
|
||||
else if ((cpu_state.flags & I_FLAG) && pic_intpending)
|
||||
{
|
||||
vector = picinterrupt();
|
||||
if (vector != -1)
|
||||
{
|
||||
CPU_BLOCK_END();
|
||||
flags_rebuild();
|
||||
if (msw&1)
|
||||
{
|
||||
pmodeint(vector,0);
|
||||
}
|
||||
else
|
||||
{
|
||||
writememw(ss,(SP-2)&0xFFFF,cpu_state.flags);
|
||||
writememw(ss,(SP-4)&0xFFFF,CS);
|
||||
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
|
||||
SP-=6;
|
||||
addr=vector<<2;
|
||||
cpu_state.flags &= ~I_FLAG;
|
||||
cpu_state.flags &= ~T_FLAG;
|
||||
cpu_state.pc=readmemw(0,addr);
|
||||
loadcs(readmemw(0,addr+2));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
|
||||
timer_process();
|
||||
cycles_main -= (cycles_start - cycles);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user