Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
@@ -6,15 +6,16 @@
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Intel 1 Mbit 8-bit flash devices.
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* Implementation of the Intel 1 Mbit and 2 Mbit, 8-bit and
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* 16-bit flash devices.
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*
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* Version: @(#)intel_flash.c 1.0.18 2018/10/30
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* Version: @(#)intel_flash.c 1.0.19 2019/06/25
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2008-2018 Sarah Walker.
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* Copyright 2016-2018 Miran Grca.
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* Copyright 2008-2019 Sarah Walker.
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* Copyright 2016-2019 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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@@ -25,307 +26,473 @@
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#include "device.h"
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#include "mem.h"
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#include "machine/machine.h"
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#include "timer.h"
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#include "nvr.h"
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#include "plat.h"
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#define FLASH_IS_BXB 2
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#define FLASH_INVERT 1
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#define FLAG_WORD 4
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#define FLAG_BXB 2
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#define FLAG_INV_A16 1
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#define BLOCK_MAIN 0
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#define BLOCK_DATA1 1
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#define BLOCK_DATA2 2
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#define BLOCK_BOOT 3
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enum
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{
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CMD_READ_ARRAY = 0xff,
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CMD_IID = 0x90,
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CMD_READ_STATUS = 0x70,
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CMD_CLEAR_STATUS = 0x50,
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CMD_ERASE_SETUP = 0x20,
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CMD_ERASE_CONFIRM = 0xd0,
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CMD_ERASE_SUSPEND = 0xb0,
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CMD_PROGRAM_SETUP = 0x40,
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CMD_PROGRAM_SETUP_ALT = 0x10
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BLOCK_MAIN1,
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BLOCK_MAIN2,
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BLOCK_DATA1,
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BLOCK_DATA2,
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BLOCK_BOOT,
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BLOCKS_NUM
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};
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enum
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{
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CMD_READ_ARRAY = 0xff,
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CMD_IID = 0x90,
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CMD_READ_STATUS = 0x70,
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CMD_CLEAR_STATUS = 0x50,
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CMD_ERASE_SETUP = 0x20,
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CMD_ERASE_CONFIRM = 0xd0,
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CMD_ERASE_SUSPEND = 0xb0,
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CMD_PROGRAM_SETUP = 0x40,
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CMD_PROGRAM_SETUP_ALT = 0x10
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};
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typedef struct flash_t
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{
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uint8_t command, status;
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uint8_t flash_id;
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int invert_high_pin;
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uint32_t program_addr;
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mem_mapping_t mapping[8], mapping_h[8];
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uint32_t block_start[4], block_end[4], block_len[4];
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uint8_t array[131072];
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uint8_t command, status,
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flash_id, flags,
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*array;
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uint32_t program_addr,
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block_start[BLOCKS_NUM], block_end[BLOCKS_NUM],
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block_len[BLOCKS_NUM];
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mem_mapping_t mapping[4], mapping_h[8];
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} flash_t;
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static wchar_t flash_path[1024];
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static uint8_t flash_read(uint32_t addr, void *p)
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static wchar_t flash_path[1024];
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static uint8_t
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flash_read(uint32_t addr, void *p)
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{
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flash_t *flash = (flash_t *)p;
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if (flash->invert_high_pin)
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addr ^= 0x10000;
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addr &= 0x1ffff;
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switch (flash->command) {
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case CMD_READ_ARRAY:
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default:
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return flash->array[addr];
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flash_t *dev = (flash_t *) p;
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uint8_t ret = 0xff;
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case CMD_IID:
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if (addr & 1)
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return flash->flash_id;
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return 0x89;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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case CMD_READ_STATUS:
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return flash->status;
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}
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switch (dev->command) {
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case CMD_READ_ARRAY:
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default:
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ret = dev->array[addr];
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break;
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case CMD_IID:
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if (addr & 1)
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ret = dev->flash_id & 0xff;
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else
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ret = 0x89;
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break;
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case CMD_READ_STATUS:
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ret = dev->status;
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break;
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}
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return ret;
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}
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static uint16_t flash_readw(uint32_t addr, void *p)
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static uint16_t
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flash_readw(uint32_t addr, void *p)
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{
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flash_t *flash = (flash_t *)p;
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uint16_t *q;
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addr &= 0x1ffff;
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if (flash->invert_high_pin) addr ^= 0x10000;
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q = (uint16_t *)&(flash->array[addr]);
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return *q;
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flash_t *dev = (flash_t *) p;
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uint16_t *q;
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uint16_t ret = 0xffff;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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if (dev->flags & FLAG_WORD)
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addr &= 0xfffffffe;
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q = (uint16_t *)&(dev->array[addr]);
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ret = *q;
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if (dev->flags & FLAG_WORD) switch (dev->command) {
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case CMD_READ_ARRAY:
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default:
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break;
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case CMD_IID:
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if (addr & 2)
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ret = dev->flash_id;
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else
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ret = 0x0089;
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break;
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case CMD_READ_STATUS:
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ret = dev->status;
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break;
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}
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return ret;
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}
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static uint32_t flash_readl(uint32_t addr, void *p)
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static uint32_t
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flash_readl(uint32_t addr, void *p)
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{
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flash_t *flash = (flash_t *)p;
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uint32_t *q;
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addr &= 0x1ffff;
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if (flash->invert_high_pin) addr ^= 0x10000;
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q = (uint32_t *)&(flash->array[addr]);
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return *q;
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flash_t *dev = (flash_t *)p;
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uint32_t *q;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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q = (uint32_t *)&(dev->array[addr]);
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return *q;
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}
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static void flash_write(uint32_t addr, uint8_t val, void *p)
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static void
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flash_write(uint32_t addr, uint8_t val, void *p)
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{
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flash_t *flash = (flash_t *)p;
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int i;
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flash_t *dev = (flash_t *) p;
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int i;
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uint32_t bb_mask = biosmask & 0xffffe000;
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if (biosmask == 0x3ffff)
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bb_mask &= 0xffffc000;
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if (flash->invert_high_pin)
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addr ^= 0x10000;
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addr &= 0x1ffff;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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switch (flash->command) {
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case CMD_ERASE_SETUP:
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if (val == CMD_ERASE_CONFIRM) {
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switch (dev->command) {
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case CMD_ERASE_SETUP:
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if (val == CMD_ERASE_CONFIRM) {
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for (i = 0; i < 3; i++) {
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if ((addr >= flash->block_start[i]) && (addr <= flash->block_end[i]))
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memset(&(flash->array[flash->block_start[i]]), 0xff, flash->block_len[i]);
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if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
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memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]);
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}
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flash->status = 0x80;
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}
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flash->command = CMD_READ_STATUS;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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if (((addr & 0x1e000) != (flash->block_start[3] & 0x1e000)) && (addr == flash->program_addr))
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flash->array[addr] = val;
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flash->command = CMD_READ_STATUS;
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flash->status = 0x80;
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break;
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default:
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flash->command = val;
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switch (val) {
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case CMD_CLEAR_STATUS:
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flash->status = 0;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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flash->program_addr = addr;
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dev->status = 0x80;
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}
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dev->command = CMD_READ_STATUS;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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if (((addr & bb_mask) != (dev->block_start[4] & bb_mask)) && (addr == dev->program_addr))
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dev->array[addr] = val;
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dev->command = CMD_READ_STATUS;
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dev->status = 0x80;
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break;
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default:
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dev->command = val;
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switch (val) {
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case CMD_CLEAR_STATUS:
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dev->status = 0;
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break;
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}
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}
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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dev->program_addr = addr;
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break;
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}
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}
|
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}
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static void intel_flash_add_mappings(flash_t *flash)
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{
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int i = 0;
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for (i = 0; i <= 7; i++) {
|
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mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
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mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), 0, (void *)flash);
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static void
|
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flash_writew(uint32_t addr, uint16_t val, void *p)
|
||||
{
|
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flash_t *dev = (flash_t *) p;
|
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int i;
|
||||
uint32_t bb_mask = biosmask & 0xffffe000;
|
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if (biosmask == 0x3ffff)
|
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bb_mask &= 0xffffc000;
|
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|
||||
if (dev->flags & FLAG_INV_A16)
|
||||
addr ^= 0x10000;
|
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addr &= biosmask;
|
||||
|
||||
if (dev->flags & FLAG_WORD) switch (dev->command) {
|
||||
case CMD_ERASE_SETUP:
|
||||
if (val == CMD_ERASE_CONFIRM) {
|
||||
for (i = 0; i < 3; i++) {
|
||||
if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
|
||||
memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]);
|
||||
}
|
||||
|
||||
dev->status = 0x80;
|
||||
}
|
||||
dev->command = CMD_READ_STATUS;
|
||||
break;
|
||||
|
||||
case CMD_PROGRAM_SETUP:
|
||||
case CMD_PROGRAM_SETUP_ALT:
|
||||
if (((addr & bb_mask) != (dev->block_start[4] & bb_mask)) && (addr == dev->program_addr))
|
||||
*(uint16_t *) (&dev->array[addr]) = val;
|
||||
dev->command = CMD_READ_STATUS;
|
||||
dev->status = 0x80;
|
||||
break;
|
||||
|
||||
default:
|
||||
dev->command = val & 0xff;
|
||||
switch (val) {
|
||||
case CMD_CLEAR_STATUS:
|
||||
dev->status = 0;
|
||||
break;
|
||||
case CMD_PROGRAM_SETUP:
|
||||
case CMD_PROGRAM_SETUP_ALT:
|
||||
dev->program_addr = addr;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
flash_writel(uint32_t addr, uint32_t val, void *p)
|
||||
{
|
||||
#if 0
|
||||
flash_writew(addr, val & 0xffff, p);
|
||||
flash_writew(addr + 2, (val >> 16) & 0xffff, p);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
intel_flash_add_mappings(flash_t *dev)
|
||||
{
|
||||
int max = 2, i = 0;
|
||||
uint32_t base, fbase;
|
||||
|
||||
if (biosmask == 0x3ffff)
|
||||
max = 4;
|
||||
|
||||
for (i = 0; i < max; i++) {
|
||||
if (biosmask == 0x3ffff)
|
||||
base = 0xc0000 + (i << 16);
|
||||
else
|
||||
base = 0xe0000 + (i << 16);
|
||||
fbase = base & biosmask;
|
||||
if (dev->flags & FLAG_INV_A16)
|
||||
fbase ^= 0x10000;
|
||||
|
||||
memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000);
|
||||
|
||||
if ((max == 2) || (i >= 2)) {
|
||||
mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
|
||||
flash_read, flash_readw, flash_readl,
|
||||
flash_write, flash_writew, flash_writel,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL, (void *) dev);
|
||||
}
|
||||
mem_mapping_add(&(dev->mapping_h[i]), (base | 0xfff00000) - 0x40000, 0x10000,
|
||||
flash_read, flash_readw, flash_readl,
|
||||
flash_write, flash_writew, flash_writel,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL, (void *) dev);
|
||||
mem_mapping_add(&(dev->mapping_h[i + 4]), (base | 0xfff00000), 0x10000,
|
||||
flash_read, flash_readw, flash_readl,
|
||||
flash_write, flash_writew, flash_writel,
|
||||
dev->array + fbase, MEM_MAPPING_EXTERNAL, (void *) dev);
|
||||
}
|
||||
}
|
||||
|
||||
/* This is for boards which invert the high pin - the flash->array pointers need to pointer invertedly in order for INTERNAL writes to go to the right part of the array. */
|
||||
static void intel_flash_add_mappings_inverted(flash_t *flash)
|
||||
|
||||
static void *
|
||||
intel_flash_init(const device_t *info)
|
||||
{
|
||||
int i = 0;
|
||||
FILE *f;
|
||||
int l;
|
||||
flash_t *dev;
|
||||
wchar_t *machine_name, *flash_name;
|
||||
uint8_t type = info->local & 0xff;
|
||||
|
||||
for (i = 0; i <= 7; i++) {
|
||||
mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
|
||||
mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), 0, (void *)flash);
|
||||
}
|
||||
}
|
||||
dev = malloc(sizeof(flash_t));
|
||||
memset(dev, 0, sizeof(flash_t));
|
||||
|
||||
void *intel_flash_init(uint8_t type)
|
||||
{
|
||||
FILE *f;
|
||||
int i, l;
|
||||
flash_t *flash;
|
||||
wchar_t *machine_name;
|
||||
wchar_t *flash_name;
|
||||
l = strlen(machine_get_internal_name_ex(machine))+1;
|
||||
machine_name = (wchar_t *) malloc(l * sizeof(wchar_t));
|
||||
mbstowcs(machine_name, machine_get_internal_name_ex(machine), l);
|
||||
l = wcslen(machine_name)+5;
|
||||
flash_name = (wchar_t *)malloc(l*sizeof(wchar_t));
|
||||
swprintf(flash_name, l, L"%ls.bin", machine_name);
|
||||
|
||||
flash = malloc(sizeof(flash_t));
|
||||
memset(flash, 0, sizeof(flash_t));
|
||||
wcscpy(flash_path, flash_name);
|
||||
|
||||
l = strlen(machine_get_internal_name_ex(machine))+1;
|
||||
machine_name = (wchar_t *) malloc(l * sizeof(wchar_t));
|
||||
mbstowcs(machine_name, machine_get_internal_name_ex(machine), l);
|
||||
l = wcslen(machine_name)+5;
|
||||
flash_name = (wchar_t *)malloc(l*sizeof(wchar_t));
|
||||
swprintf(flash_name, l, L"%ls.bin", machine_name);
|
||||
dev->flags = info->local & 0xff;
|
||||
|
||||
wcscpy(flash_path, flash_name);
|
||||
mem_mapping_disable(&bios_mapping);
|
||||
mem_mapping_disable(&bios_high_mapping);
|
||||
|
||||
flash->flash_id = (type & FLASH_IS_BXB) ? 0x95 : 0x94;
|
||||
flash->invert_high_pin = (type & FLASH_INVERT);
|
||||
dev->array = (uint8_t *) malloc(biosmask + 1);
|
||||
memset(dev->array, 0xff, biosmask + 1);
|
||||
|
||||
if (biosmask == 0x3ffff) {
|
||||
if (dev->flags & FLAG_WORD)
|
||||
dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274;
|
||||
else
|
||||
dev->flash_id = (dev->flags & FLAG_BXB) ? 0x7D : 0x7C;
|
||||
|
||||
/* The block lengths are the same both flash types. */
|
||||
flash->block_len[BLOCK_MAIN] = 0x1c000;
|
||||
flash->block_len[BLOCK_DATA1] = 0x01000;
|
||||
flash->block_len[BLOCK_DATA2] = 0x01000;
|
||||
flash->block_len[BLOCK_BOOT] = 0x02000;
|
||||
dev->block_len[BLOCK_MAIN1] = 0x20000;
|
||||
dev->block_len[BLOCK_MAIN2] = 0x18000;
|
||||
dev->block_len[BLOCK_DATA1] = 0x02000;
|
||||
dev->block_len[BLOCK_DATA2] = 0x02000;
|
||||
dev->block_len[BLOCK_BOOT] = 0x04000;
|
||||
|
||||
if (type & FLASH_IS_BXB) { /* 28F001BX-B */
|
||||
flash->block_start[BLOCK_MAIN] = 0x04000; /* MAIN BLOCK */
|
||||
flash->block_end[BLOCK_MAIN] = 0x1ffff;
|
||||
flash->block_start[BLOCK_DATA1] = 0x03000; /* DATA AREA 1 BLOCK */
|
||||
flash->block_end[BLOCK_DATA1] = 0x03fff;
|
||||
flash->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
|
||||
flash->block_end[BLOCK_DATA2] = 0x04fff;
|
||||
flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
|
||||
flash->block_end[BLOCK_BOOT] = 0x01fff;
|
||||
} else { /* 28F001BX-T */
|
||||
flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
|
||||
flash->block_end[BLOCK_MAIN] = 0x1bfff;
|
||||
flash->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
|
||||
flash->block_end[BLOCK_DATA1] = 0x1cfff;
|
||||
flash->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
|
||||
flash->block_end[BLOCK_DATA2] = 0x1dfff;
|
||||
flash->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
|
||||
flash->block_end[BLOCK_BOOT] = 0x1ffff;
|
||||
if (dev->flags & FLAG_BXB) { /* 28F002BX-B/28F200BX-B */
|
||||
dev->block_start[BLOCK_MAIN1] = 0x20000; /* MAIN BLOCK 1 */
|
||||
dev->block_end[BLOCK_MAIN1] = 0x3ffff;
|
||||
dev->block_start[BLOCK_MAIN2] = 0x08000; /* MAIN BLOCK 2 */
|
||||
dev->block_end[BLOCK_MAIN2] = 0x1ffff;
|
||||
dev->block_start[BLOCK_DATA1] = 0x06000; /* DATA AREA 1 BLOCK */
|
||||
dev->block_end[BLOCK_DATA1] = 0x07fff;
|
||||
dev->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
|
||||
dev->block_end[BLOCK_DATA2] = 0x05fff;
|
||||
dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
|
||||
dev->block_end[BLOCK_BOOT] = 0x03fff;
|
||||
} else { /* 28F002BX-T/28F200BX-T */
|
||||
dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
|
||||
dev->block_end[BLOCK_MAIN1] = 0x1ffff;
|
||||
dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */
|
||||
dev->block_end[BLOCK_MAIN2] = 0x37fff;
|
||||
dev->block_start[BLOCK_DATA1] = 0x38000; /* DATA AREA 1 BLOCK */
|
||||
dev->block_end[BLOCK_DATA1] = 0x39fff;
|
||||
dev->block_start[BLOCK_DATA2] = 0x3a000; /* DATA AREA 2 BLOCK */
|
||||
dev->block_end[BLOCK_DATA2] = 0x3bfff;
|
||||
dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */
|
||||
dev->block_end[BLOCK_BOOT] = 0x3ffff;
|
||||
}
|
||||
} else {
|
||||
dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
mem_mapping_disable(&bios_mapping[i]);
|
||||
mem_mapping_disable(&bios_high_mapping[i]);
|
||||
/* The block lengths are the same both flash types. */
|
||||
dev->block_len[BLOCK_MAIN1] = 0x1c000;
|
||||
dev->block_len[BLOCK_MAIN2] = 0x00000;
|
||||
dev->block_len[BLOCK_DATA1] = 0x01000;
|
||||
dev->block_len[BLOCK_DATA2] = 0x01000;
|
||||
dev->block_len[BLOCK_BOOT] = 0x02000;
|
||||
|
||||
if (dev->flags & FLAG_BXB) { /* 28F001BX-B/28F100BX-B */
|
||||
dev->block_start[BLOCK_MAIN1] = 0x04000; /* MAIN BLOCK 1 */
|
||||
dev->block_end[BLOCK_MAIN1] = 0x1ffff;
|
||||
dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */
|
||||
dev->block_end[BLOCK_MAIN2] = 0xfffff;
|
||||
dev->block_start[BLOCK_DATA1] = 0x02000; /* DATA AREA 1 BLOCK */
|
||||
dev->block_end[BLOCK_DATA1] = 0x02fff;
|
||||
dev->block_start[BLOCK_DATA2] = 0x03000; /* DATA AREA 2 BLOCK */
|
||||
dev->block_end[BLOCK_DATA2] = 0x03fff;
|
||||
dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
|
||||
dev->block_end[BLOCK_BOOT] = 0x01fff;
|
||||
} else { /* 28F001BX-T/28F100BX-T */
|
||||
dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
|
||||
dev->block_end[BLOCK_MAIN1] = 0x1bfff;
|
||||
dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */
|
||||
dev->block_end[BLOCK_MAIN2] = 0xfffff;
|
||||
dev->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
|
||||
dev->block_end[BLOCK_DATA1] = 0x1cfff;
|
||||
dev->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
|
||||
dev->block_end[BLOCK_DATA2] = 0x1dfff;
|
||||
dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
|
||||
dev->block_end[BLOCK_BOOT] = 0x1ffff;
|
||||
}
|
||||
}
|
||||
|
||||
if (flash->invert_high_pin) {
|
||||
memcpy(flash->array, rom + 65536, 65536);
|
||||
memcpy(flash->array + 65536, rom, 65536);
|
||||
}
|
||||
else
|
||||
memcpy(flash->array, rom, 131072);
|
||||
intel_flash_add_mappings(dev);
|
||||
|
||||
if (flash->invert_high_pin)
|
||||
intel_flash_add_mappings_inverted(flash);
|
||||
else
|
||||
intel_flash_add_mappings(flash);
|
||||
dev->command = CMD_READ_ARRAY;
|
||||
dev->status = 0;
|
||||
|
||||
flash->command = CMD_READ_ARRAY;
|
||||
flash->status = 0;
|
||||
f = nvr_fopen(flash_path, L"rb");
|
||||
if (f) {
|
||||
fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
|
||||
if (dev->block_len[BLOCK_MAIN2])
|
||||
fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
|
||||
fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
|
||||
fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
|
||||
fclose(f);
|
||||
}
|
||||
|
||||
f = nvr_fopen(flash_path, L"rb");
|
||||
if (f) {
|
||||
fread(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
|
||||
fread(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
|
||||
fread(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
|
||||
fclose(f);
|
||||
}
|
||||
free(flash_name);
|
||||
free(machine_name);
|
||||
|
||||
free(flash_name);
|
||||
free(machine_name);
|
||||
|
||||
return flash;
|
||||
return dev;
|
||||
}
|
||||
|
||||
void *intel_flash_bxb_ami_init()
|
||||
|
||||
static void
|
||||
intel_flash_close(void *p)
|
||||
{
|
||||
return intel_flash_init(FLASH_IS_BXB | FLASH_INVERT);
|
||||
}
|
||||
FILE *f;
|
||||
flash_t *dev = (flash_t *)p;
|
||||
|
||||
/* For AMI BIOS'es - Intel 28F001BXT with high address pin inverted. */
|
||||
void *intel_flash_bxt_ami_init()
|
||||
{
|
||||
return intel_flash_init(FLASH_INVERT);
|
||||
}
|
||||
f = nvr_fopen(flash_path, L"wb");
|
||||
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
|
||||
if (dev->block_len[BLOCK_MAIN2])
|
||||
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
|
||||
fwrite(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
|
||||
fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
|
||||
fclose(f);
|
||||
|
||||
/* For Award BIOS'es - Intel 28F001BXT with high address pin not inverted. */
|
||||
void *intel_flash_bxt_init()
|
||||
{
|
||||
return intel_flash_init(0);
|
||||
}
|
||||
|
||||
/* For Acer BIOS'es - Intel 28F001BXB. */
|
||||
void *intel_flash_bxb_init()
|
||||
{
|
||||
return intel_flash_init(FLASH_IS_BXB);
|
||||
}
|
||||
|
||||
void intel_flash_close(void *p)
|
||||
{
|
||||
FILE *f;
|
||||
flash_t *flash = (flash_t *)p;
|
||||
|
||||
f = nvr_fopen(flash_path, L"wb");
|
||||
fwrite(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
|
||||
fwrite(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
|
||||
fwrite(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
|
||||
fclose(f);
|
||||
|
||||
free(flash);
|
||||
free(dev);
|
||||
}
|
||||
|
||||
|
||||
/* For AMI BIOS'es - Intel 28F001BXT with A16 pin inverted. */
|
||||
const device_t intel_flash_bxt_ami_device =
|
||||
{
|
||||
"Intel 28F001BXT Flash BIOS",
|
||||
0, 0,
|
||||
intel_flash_bxt_ami_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
"Intel 28F001BXT/28F002BXT Flash BIOS",
|
||||
0,
|
||||
FLAG_INV_A16,
|
||||
intel_flash_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
};
|
||||
|
||||
const device_t intel_flash_bxb_ami_device =
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_TC430HX)
|
||||
const device_t intel_flash_bxtw_ami_device =
|
||||
{
|
||||
"Intel 28F001BXB Flash BIOS",
|
||||
0, 0,
|
||||
intel_flash_bxb_ami_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
"Intel 28F100BXT/28F200BXT Flash BIOS",
|
||||
0,
|
||||
FLAG_INV_A16 | FLAG_WORD,
|
||||
intel_flash_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
const device_t intel_flash_bxt_device =
|
||||
{
|
||||
"Intel 28F001BXT Flash BIOS",
|
||||
0, 0,
|
||||
intel_flash_bxt_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
"Intel 28F001BXT/28F002BXT Flash BIOS",
|
||||
0, 0,
|
||||
intel_flash_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
};
|
||||
|
||||
|
||||
const device_t intel_flash_bxb_device =
|
||||
{
|
||||
"Intel 28F001BXB Flash BIOS",
|
||||
0, 0,
|
||||
intel_flash_bxb_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
"Intel 28F001BXB/28F002BXB Flash BIOS",
|
||||
0, FLAG_BXB,
|
||||
intel_flash_init,
|
||||
intel_flash_close,
|
||||
NULL,
|
||||
NULL, NULL, NULL, NULL
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user