Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
225
src/intel_sio.c
225
src/intel_sio.c
@@ -19,24 +19,106 @@
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include "86box.h"
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#include "device.h"
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#include "io.h"
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#include "apm.h"
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#include "dma.h"
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#include "mem.h"
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#include "pci.h"
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#include "timer.h"
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#include "pit.h"
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#include "port_92.h"
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#include "machine/machine.h"
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#include "intel_sio.h"
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typedef struct
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{
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uint8_t regs[256];
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uint8_t id,
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regs[256];
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uint16_t timer_base,
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timer_latch;
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pc_timer_t timer;
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port_92_t * port_92;
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} sio_t;
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static void
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sio_timer_write(uint16_t addr, uint8_t val, void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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if (!(addr & 0x0002)) {
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if (addr & 0x0001)
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dev->timer_latch = (dev->timer_latch & 0xff) | (val << 8);
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else
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dev->timer_latch = (dev->timer_latch & 0xff00) | val;
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timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC);
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}
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}
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static void
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sio_timer_writew(uint16_t addr, uint16_t val, void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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if (!(addr & 0x0002)) {
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dev->timer_latch = val;
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timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC);
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}
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}
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static uint8_t
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sio_timer_read(uint16_t addr, void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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uint16_t sio_timer_latch;
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uint8_t ret = 0xff;
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if (!(addr & 0x0002)) {
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sub_cycles((int)(PITCONST >> 32));
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sio_timer_latch = timer_get_remaining_us(&dev->timer);
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if (addr & 0x0001)
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ret = sio_timer_latch >> 8;
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else
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ret = sio_timer_latch & 0xff;
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}
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return ret;
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}
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static uint16_t
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sio_timer_readw(uint16_t addr, void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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uint16_t ret = 0xffff;
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if (!(addr & 0x0002)) {
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sub_cycles((int)(PITCONST >> 32));
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ret = timer_get_remaining_us(&dev->timer);
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}
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return ret;
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}
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static void
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sio_write(int func, int addr, uint8_t val, void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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uint8_t old;
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if (func > 0)
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return;
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@@ -44,6 +126,13 @@ sio_write(int func, int addr, uint8_t val, void *priv)
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if (addr >= 0x0f && addr < 0x4c)
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return;
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/* The IB (original) variant of the SIO has no PCI IRQ steering. */
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if ((addr >= 0x60) && (addr <= 0x63) && (dev->id < 0x03))
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return;
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old = dev->regs[addr];
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dev->regs[addr] = val;
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switch (addr) {
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case 0x00: case 0x01: case 0x02: case 0x03:
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case 0x08: case 0x09: case 0x0a: case 0x0b:
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@@ -66,23 +155,22 @@ sio_write(int func, int addr, uint8_t val, void *priv)
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break;
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case 0x40:
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if (!((val ^ dev->regs[addr]) & 0x40))
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if (!((val ^ old) & 0x40))
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return;
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dma_alias_remove();
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if (val & 0x40)
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dma_alias_remove();
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else
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dma_alias_set();
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break;
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case 0x4f:
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if (!((val ^ dev->regs[addr]) & 0x40))
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if (!((val ^ old) & 0x40))
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return;
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port_92_remove(dev->port_92);
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if (val & 0x40)
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port_92_add();
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else
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port_92_remove();
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port_92_add(dev->port_92);
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break;
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case 0x60:
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if (val & 0x80)
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@@ -108,8 +196,22 @@ sio_write(int func, int addr, uint8_t val, void *priv)
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else
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pci_set_irq_routing(PCI_INTD, val & 0xf);
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break;
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case 0x80:
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case 0x81:
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if (dev->timer_base & 0x01) {
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io_removehandler(dev->timer_base & 0xfffc, 0x0004,
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sio_timer_read, sio_timer_readw, NULL,
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sio_timer_write, sio_timer_writew, NULL, dev);
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}
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dev->timer_base = (dev->regs[0x81] << 8) | (dev->regs[0x80] & 0xfd);
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if (dev->timer_base & 0x01) {
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io_sethandler(dev->timer_base & 0xfffc, 0x0004,
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sio_timer_read, sio_timer_readw, NULL,
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sio_timer_write, sio_timer_writew, NULL, dev);
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}
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break;
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}
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dev->regs[addr] = val;
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}
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@@ -128,6 +230,46 @@ sio_read(int func, int addr, void *priv)
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}
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static void
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sio_config_write(uint16_t addr, uint8_t val, void *priv)
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{
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}
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static uint8_t
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sio_config_read(uint16_t port, void *priv)
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{
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uint8_t ret = 0x00;
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switch (port & 0x000f) {
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case 3:
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ret = 0xff;
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break;
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case 5:
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ret = 0xd3;
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].pci_speed) {
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case 20000000:
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ret |= 0x0c;
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break;
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case 25000000:
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default:
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ret |= 0x00;
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break;
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case 30000000:
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ret |= 0x08;
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break;
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case 33333333:
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ret |= 0x04;
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break;
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}
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break;
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}
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return ret;
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}
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static void
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sio_reset(void *priv)
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{
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@@ -139,7 +281,7 @@ sio_reset(void *priv)
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dev->regs[0x02] = 0x84; dev->regs[0x03] = 0x04; /*82378IB (SIO)*/
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dev->regs[0x04] = 0x07; dev->regs[0x05] = 0x00;
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dev->regs[0x06] = 0x00; dev->regs[0x07] = 0x02;
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dev->regs[0x08] = 0x03; /*A0 stepping*/
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dev->regs[0x08] = dev->id;
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dev->regs[0x40] = 0x20; dev->regs[0x41] = 0x00;
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dev->regs[0x42] = 0x04; dev->regs[0x43] = 0x00;
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@@ -159,6 +301,14 @@ sio_reset(void *priv)
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pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
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pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
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pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
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if (dev->timer_base & 0x0001) {
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io_removehandler(dev->timer_base & 0xfffc, 0x0004,
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sio_timer_read, sio_timer_readw, NULL,
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sio_timer_write, sio_timer_writew, NULL, dev);
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}
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dev->timer_base = 0x0078;
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}
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@@ -172,21 +322,43 @@ sio_close(void *p)
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static void
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*sio_init(const device_t *info)
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sio_speed_changed(void *priv)
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{
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sio_t *dev = (sio_t *) priv;
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int te;
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te = timer_is_enabled(&dev->timer);
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timer_disable(&dev->timer);
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if (te)
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timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC);
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}
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static void *
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sio_init(const device_t *info)
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{
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sio_t *sio = (sio_t *) malloc(sizeof(sio_t));
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memset(sio, 0, sizeof(sio_t));
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pci_add_card(2, sio_read, sio_write, sio);
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device_add(&apm_device);
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sio->id = info->local;
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sio_reset(sio);
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port_92_reset();
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port_92_add();
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sio->port_92 = device_add(&port_92_pci_device);
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dma_alias_set();
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io_sethandler(0x0073, 0x0001,
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sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, sio);
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io_sethandler(0x0075, 0x0001,
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sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, sio);
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timer_add(&sio->timer, NULL, NULL, 0);
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return sio;
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}
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@@ -195,12 +367,27 @@ const device_t sio_device =
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{
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"Intel 82378IB (SIO)",
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DEVICE_PCI,
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0,
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sio_init,
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sio_close,
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NULL,
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0x00,
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sio_init,
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sio_close,
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NULL,
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NULL,
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sio_speed_changed,
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NULL,
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NULL
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};
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const device_t sio_zb_device =
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{
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"Intel 82378ZB (SIO)",
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DEVICE_PCI,
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0x03,
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sio_init,
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sio_close,
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NULL,
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NULL,
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sio_speed_changed,
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NULL,
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NULL
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};
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