claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Added the IBM 5161 ISA expansion for PC and XT;

Browse Source 
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g  / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
2019-09-20 14:02:30 +02:00
parent b06296bbf6
commit 552a87ea3d
524 changed files with 129555 additions and 21862 deletions
Download Patch File Download Diff File Expand all files Collapse all files

91
src/pic.c
View File

@@ -21,10 +21,12 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "cpu/cpu.h"
#include "machine/machine.h"
#include "io.h"
#include "pci.h"
#include "pic.h"
#include "timer.h"
#include "pit.h"
@@ -124,6 +126,7 @@ picint_is_level(uint16_t irq)
}
/* Should this really EOI *ALL* IRQ's at once? */
static void
pic_autoeoi()
{
@@ -139,10 +142,12 @@ pic_autoeoi()
pic.pend |= pic.icw3;
}
#if 0
if ((pic_current & (1 << c)) && picint_is_level(c)) {
if (((1 << c) != pic.icw3) || !AT)
pic.pend |= 1 << c;
}
#endif
pic_updatepending();
return;
@@ -155,7 +160,11 @@ void
pic_write(uint16_t addr, uint8_t val, void *priv)
{
int c;
addr &= ~0x06;
if (addr&1) {
pic_log("%04X:%04X: write: %02X\n", CS, cpu_state.pc, val);
switch (pic.icw) {
case 0: /*OCW1*/
pic.mask=val;
@@ -163,27 +172,36 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
break;
case 1: /*ICW2*/
pic.vector=val&0xF8;
pic_log("ICW%i ->", pic.icw + 1);
if (pic.icw1 & 2) pic.icw=3;
else pic.icw=2;
pic_log("ICW%i\n", pic.icw + 1);
break;
case 2: /*ICW3*/
pic.icw3 = val;
pic_log("PIC1 ICW3 now %02X\n", val);
pic_log("ICW%i ->", pic.icw + 1);
if (pic.icw1 & 1) pic.icw=3;
else pic.icw=0;
pic_log("ICW%i\n", pic.icw + 1);
break;
case 3: /*ICW4*/
pic_log("ICW%i ->", pic.icw + 1);
pic.icw4 = val;
pic.icw=0;
pic_log("ICW%i\n", pic.icw + 1);
break;
}
} else {
if (val & 16) { /*ICW1*/
pic.mask = 0;
pic.mask2 = 0;
pic_log("ICW%i ->", pic.icw + 1);
pic.icw = 1;
pic.icw1 = val;
pic_log("ICW%i\n", pic.icw + 1);
pic.ins = 0;
pic.pend = 0; /* Pending IRQ's are cleared. */
pic_updatepending();
}
else if (!(val & 8)) { /*OCW2*/
@@ -195,10 +213,12 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
pic.pend |= pic.icw3;
}
#if 0
if ((pic_current & (1 << (val & 7))) && picint_is_level(val & 7)) {
if ((((1 << (val & 7)) != pic.icw3) || !AT))
pic.pend |= 1 << (val & 7);
}
#endif
pic_updatepending();
} else {
@@ -212,10 +232,12 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
pic.pend |= pic.icw3;
}
#if 0
if ((pic_current & (1 << c)) && picint_is_level(c)) {
if ((((1 << c) != pic.icw3) || !AT))
pic.pend |= 1 << c;
}
#endif
if ((c == 1) && keywaiting)
intclear &= ~1;
@@ -235,16 +257,23 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
uint8_t
pic_read(uint16_t addr, void *priv)
{
addr &= ~0x06;
if (addr & 1) {
pic_log("Read PIC mask %02X\n", pic.mask);
pic_log("%04X:%04X: Read PIC mask %02X\n", CS, cpu_state.pc, pic.mask);
return pic.mask;
}
if (pic.read) {
pic_log("Read PIC ins %02X\n", pic.ins);
#if 0
if (AT)
return pic.ins | (pic2.ins ? 4 : 0);
else
return pic.ins;
#else
return pic.ins | (pic2.ins ? 4 : 0);
#endif
}
return pic.pend;
}
@@ -257,6 +286,13 @@ pic_init()
}
void
pic_init_pcjr()
{
io_sethandler(0x0020, 0x0008, pic_read, NULL, NULL, pic_write, NULL, NULL, NULL);
}
static void
pic2_autoeoi()
{
@@ -267,10 +303,12 @@ pic2_autoeoi()
pic2.ins &= ~(1 << c);
pic_update_mask(&pic2.mask2, pic2.ins);
#if 0
if (pic_current & (0x100 << c) && picint_is_level(c + 8)) {
pic2.pend |= (1 << c);
pic.pend |= (1 << pic2.icw3);
}
#endif
pic_updatepending();
return;
@@ -309,20 +347,24 @@ pic2_write(uint16_t addr, uint8_t val, void *priv)
} else {
if (val & 16) { /*ICW1*/
pic2.mask = 0;
pic2.mask2=0;
pic2.icw=1;
pic2.mask2 = 0;
pic2.icw = 1;
pic2.icw1 = val;
pic2.ins = 0;
pic2.pend = 0; /* Pending IRQ's are cleared. */
pic.pend &= ~4;
pic_updatepending();
} else if (!(val & 8)) { /*OCW2*/
if ((val & 0xE0) == 0x60) {
pic2.ins &= ~(1 << (val & 7));
pic_update_mask(&pic2.mask2, pic2.ins);
#if 0
if (pic_current & (0x100 << (val & 7)) && picint_is_level((val & 7) + 8)) {
pic2.pend |= (1 << (val & 7));
pic.pend |= (1 << pic2.icw3);
}
#endif
pic_updatepending();
} else {
@@ -331,10 +373,12 @@ pic2_write(uint16_t addr, uint8_t val, void *priv)
pic2.ins &= ~(1<<c);
pic_update_mask(&pic2.mask2, pic2.ins);
#if 0
if (pic_current & (0x100 << c) && picint_is_level(c + 8)) {
pic2.pend |= (1 << c);
pic.pend |= (1 << pic2.icw3);
}
#endif
pic_updatepending();
return;
@@ -476,35 +520,37 @@ picintc(uint16_t num)
}
static uint8_t
static int
pic_process_interrupt(PIC* target_pic, int c)
{
uint8_t pending = target_pic->pend & ~target_pic->mask;
int ret = -1;
int pic_int = c & 7;
int pic_int_num = 1 << pic_int;
int in_service = 0;
#if 0
in_service = (target_pic->ins & (pic_int_num - 1)); /* Is anything of higher priority already in service? */
in_service |= (target_pic->ins & pic_int_num); /* Is the current IRQ already in service? */
if (AT) {
in_service = (target_pic->ins & (pic_int_num - 1));
/* AT-specific stuff. */
if (c >= 8)
in_service |= (pic.ins & 0x03);
in_service |= (pic.ins & 0x03); /* IRQ 8 to 15, are IRQ's with higher priorities than the
cascade IRQ already in service? */
/* For IRQ 0 to 7, the cascade IRQ's in service bit indicates that one or
more IRQ's between 8 and 15 are already in service. */
}
if (!AT)
in_service = (target_pic->ins & (pic_int_num - 1));
#else
in_service = (target_pic->ins & (pic_int_num - 1));
if (AT && (c >= 8))
in_service |= (pic.ins & 0x03);
#endif
if ((pending & pic_int_num) && !in_service) {
target_pic->pend &= ~pic_int_num;
if (!((pic_current & (1 << c)) && picint_is_level(c)))
target_pic->pend &= ~pic_int_num;
target_pic->ins |= pic_int_num;
pic_update_mask(&target_pic->mask2, target_pic->ins);
if (AT && (c >= 8)) {
if (!((target_pic->pend & ~target_pic->mask) & ~target_pic->mask2))
pic.pend &= ~(1 << pic2.icw3);
pic.ins |= (1 << pic2.icw3); /*Cascade IRQ*/
pic_update_mask(&pic.mask2, pic.ins);
}
@@ -517,30 +563,31 @@ pic_process_interrupt(PIC* target_pic, int c)
if (!c)
pit_set_gate(&pit2, 0, 0);
return pic_int + target_pic->vector;
} else
return 0xFF;
ret = pic_int + target_pic->vector;
}
return ret;
}
uint8_t
int
picinterrupt()
{
int c, d;
uint8_t ret;
int ret;
for (c = 0; c <= 7; c++) {
if (AT && ((1 << c) == pic.icw3)) {
for (d = 8; d <= 15; d++) {
ret = pic_process_interrupt(&pic2, d);
if (ret != 0xFF) return ret;
if (ret != -1) return ret;
}
} else {
ret = pic_process_interrupt(&pic, c);
if (ret != 0xFF) return ret;
if (ret != -1) return ret;
}
}
return 0xFF;
return -1;
}