Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
125
src/serial.c
125
src/serial.c
@@ -7,13 +7,13 @@
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#define HAVE_STDARG_H
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#include "86box.h"
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#include "device.h"
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#include "timer.h"
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#include "machine/machine.h"
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#include "io.h"
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#include "pic.h"
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#include "mem.h"
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#include "rom.h"
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#include "serial.h"
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#include "timer.h"
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#include "mouse.h"
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@@ -64,11 +64,12 @@ serial_reset_port(serial_t *dev)
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void
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serial_transmit_period(serial_t *dev)
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{
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double ddlab, byte_period, bits, dusec;
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double ddlab, byte_period, bits;
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ddlab = (double) dev->dlab;
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/* Bit period based on DLAB. */
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byte_period = (16000000.0 * ddlab) / 1846200.0;
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/* correct: 833.333333... */
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byte_period = (16000000.0 * ddlab) / 1843200.0;
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/* Data bits according to LCR 1,0. */
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bits = (double) ((dev->lcr & 0x03) + 5);
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/* Stop bits. */
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@@ -80,10 +81,8 @@ serial_transmit_period(serial_t *dev)
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if (dev->lcr & 0x08)
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bits += 1.0;
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byte_period *= bits;
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dusec = (double) TIMER_USEC;
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byte_period *= dusec;
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dev->transmit_period = (int64_t) byte_period;
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dev->transmit_period = byte_period;
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}
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@@ -112,8 +111,8 @@ serial_update_ints(serial_t *dev)
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dev->iir = 0;
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}
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if (stat && ((dev->mctrl & 8) || PCJR)) {
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if (dev->type >= SERIAL_NS16540)
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if (stat && ((dev->mctrl & 8) || (dev->type == SERIAL_8250_PCJR))) {
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if (dev->type >= SERIAL_NS16450)
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picintlevel(1 << dev->irq);
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else
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picint(1 << dev->irq);
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@@ -133,7 +132,7 @@ serial_write_fifo(serial_t *dev, uint8_t dat)
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dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
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dev->lsr &= 0xfe;
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dev->lsr |= (!dev->rcvr_fifo_pos);
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dev->int_status &= SERIAL_INT_RECEIVE;
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dev->int_status &= ~SERIAL_INT_RECEIVE;
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if (!dev->rcvr_fifo_pos) {
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dev->int_status |= SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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@@ -166,17 +165,27 @@ serial_transmit_timer(void *priv)
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if (dev->fifo_enabled) {
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serial_transmit(dev, dev->xmit_fifo[dev->xmit_fifo_pos++]);
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if (dev->xmit_fifo_pos == 16) {
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dev->transmit_delay = 0LL;
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dev->xmit_fifo_pos = 0;
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/* Mark both FIFO and shift register as empty. */
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dev->lsr |= 0x40;
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dev->transmit_enabled = 0;
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} else
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dev->transmit_delay += dev->transmit_period;
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timer_advance_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
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} else {
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serial_transmit(dev, dev->thr);
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dev->transmit_delay = 0LL;
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/* Mark both THR and shift register as empty. */
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dev->lsr |= 0x40;
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dev->transmit_enabled = 0;
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}
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}
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static void
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serial_update_speed(serial_t *dev)
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{
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if (dev->transmit_enabled) {
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timer_disable(&dev->transmit_timer);
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timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
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}
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}
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@@ -189,11 +198,14 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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serial_log("UART: Write %02X to port %02X\n", val, addr);
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sub_cycles(ISA_CYCLES(8));
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switch (addr & 7) {
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case 0:
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if (dev->lcr & 0x80) {
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dev->dlab = (dev->dlab & 0xff00) | val;
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serial_transmit_period(dev);
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serial_update_speed(dev);
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return;
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}
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@@ -211,7 +223,9 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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serial_update_ints(dev);
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} else {
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/* FIFO full, begin transmitting. */
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dev->transmit_delay = dev->transmit_period;
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timer_disable(&dev->transmit_timer);
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timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
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dev->transmit_enabled = 1;
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dev->lsr &= 0xbf;
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/* Update interrupts. */
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dev->lsr |= 0x20;
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@@ -221,7 +235,9 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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} else {
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/* Non-FIFO mode. */
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/* Begin transmitting. */
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dev->transmit_delay = dev->transmit_period;
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timer_disable(&dev->transmit_timer);
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timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
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dev->transmit_enabled = 1;
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dev->thr = val;
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/* Clear bit 6 because shift register is full. */
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dev->lsr &= 0xbf;
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@@ -236,6 +252,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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if (dev->lcr & 0x80) {
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dev->dlab = (dev->dlab & 0x00ff) | (val << 8);
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serial_transmit_period(dev);
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serial_update_speed(dev);
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return;
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}
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dev->ier = val & 0xf;
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@@ -247,7 +264,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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dev->fifo_enabled = val & 0x01;
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if (!dev->fifo_enabled) {
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memset(dev->rcvr_fifo, 0, 14);
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memset(dev->xmit_fifo, 0, 14);
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memset(dev->xmit_fifo, 0, 16);
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dev->rcvr_fifo_pos = dev->xmit_fifo_pos = 0;
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dev->rcvr_fifo_len = 1;
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break;
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@@ -257,7 +274,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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dev->rcvr_fifo_pos = 0;
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}
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if (val & 0x04) {
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memset(dev->xmit_fifo, 0, 14);
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memset(dev->xmit_fifo, 0, 16);
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dev->xmit_fifo_pos = 0;
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}
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switch ((val >> 6) & 0x03) {
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@@ -279,8 +296,10 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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case 3:
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old = dev->lcr;
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dev->lcr = val;
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if ((old ^ val) & 0x0f)
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if ((old ^ val) & 0x0f) {
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serial_transmit_period(dev);
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serial_update_speed(dev);
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}
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break;
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case 4:
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if ((val & 2) && !(dev->mctrl & 2)) {
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@@ -303,6 +322,8 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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new_msr |= 0x04;
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dev->msr = new_msr;
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dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
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}
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break;
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case 5:
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@@ -322,7 +343,8 @@ serial_write(uint16_t addr, uint8_t val, void *p)
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serial_update_ints(dev);
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break;
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case 7:
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dev->scratch = val;
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if (dev->type >= SERIAL_NS16450)
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dev->scratch = val;
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break;
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}
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}
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@@ -334,6 +356,8 @@ serial_read(uint16_t addr, void *p)
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serial_t *dev = (serial_t *)p;
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uint8_t ret = 0;
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sub_cycles(ISA_CYCLES(8));
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switch (addr & 7) {
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case 0:
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if (dev->lcr & 0x80) {
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@@ -343,12 +367,22 @@ serial_read(uint16_t addr, void *p)
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if ((dev->type >= SERIAL_NS16550) && dev->fifo_enabled) {
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/* FIFO mode. */
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ret = dev->rcvr_fifo[dev->rcvr_fifo_pos++];
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dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
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if (!dev->rcvr_fifo_pos) {
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dev->lsr &= 0xfe;
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dev->int_status &= ~SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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if (dev->mctrl & 0x10) {
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ret = dev->xmit_fifo[dev->xmit_fifo_pos++];
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dev->xmit_fifo_pos %= 16;
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if (!dev->xmit_fifo_pos) {
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dev->lsr &= 0xfe;
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dev->int_status &= ~SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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}
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} else {
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ret = dev->rcvr_fifo[dev->rcvr_fifo_pos++];
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dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
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if (!dev->rcvr_fifo_pos) {
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dev->lsr &= 0xfe;
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dev->int_status &= ~SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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}
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}
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} else {
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ret = dev->dat;
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@@ -454,6 +488,15 @@ serial_attach(int port,
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}
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static void
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serial_speed_changed(void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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serial_update_speed(dev);
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}
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static void
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serial_close(void *priv)
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{
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@@ -489,8 +532,7 @@ serial_init(const device_t *info)
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dev->dlab = 96;
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dev->fcr = 0x06;
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serial_transmit_period(dev);
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dev->transmit_delay = 0LL;
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timer_add(serial_transmit_timer, &dev->transmit_delay, &dev->transmit_delay, dev);
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timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0);
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}
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next_inst++;
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@@ -499,15 +541,18 @@ serial_init(const device_t *info)
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}
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void
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serial_set_next_inst(int ni)
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{
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next_inst = ni;
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}
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void
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serial_standalone_init(void) {
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if (next_inst == 0) {
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if (PCJR)
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device_add(&i8250_pcjr_device);
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else {
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device_add_inst(&i8250_device, 1);
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device_add_inst(&i8250_device, 2);
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}
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device_add_inst(&i8250_device, 1);
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device_add_inst(&i8250_device, 2);
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} else if (next_inst == 1)
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device_add_inst(&i8250_device, 2);
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};
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@@ -518,25 +563,25 @@ const device_t i8250_device = {
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0,
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SERIAL_8250,
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serial_init, serial_close, NULL,
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NULL, NULL, NULL,
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NULL, serial_speed_changed, NULL,
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NULL
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};
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const device_t i8250_pcjr_device = {
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"Intel 8250(-compatible) UART for PCjr",
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DEVICE_PCJR,
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SERIAL_8250,
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SERIAL_8250_PCJR,
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serial_init, serial_close, NULL,
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NULL, NULL, NULL,
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NULL, serial_speed_changed, NULL,
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NULL
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};
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const device_t ns16540_device = {
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"National Semiconductor NS16540(-compatible) UART",
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const device_t ns16450_device = {
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"National Semiconductor NS16450(-compatible) UART",
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0,
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SERIAL_NS16540,
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SERIAL_NS16450,
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serial_init, serial_close, NULL,
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NULL, NULL, NULL,
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NULL, serial_speed_changed, NULL,
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NULL
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};
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@@ -545,6 +590,6 @@ const device_t ns16550_device = {
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0,
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SERIAL_NS16550,
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serial_init, serial_close, NULL,
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NULL, NULL, NULL,
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NULL, serial_speed_changed, NULL,
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NULL
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};
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Block a user