Added the IBM 5161 ISA expansion for PC and XT;

Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g  / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
This commit is contained in:
OBattler
2019-09-20 14:02:30 +02:00
parent b06296bbf6
commit 552a87ea3d
524 changed files with 129555 additions and 21862 deletions

View File

@@ -7,13 +7,13 @@
#define HAVE_STDARG_H
#include "86box.h"
#include "device.h"
#include "timer.h"
#include "machine/machine.h"
#include "io.h"
#include "pic.h"
#include "mem.h"
#include "rom.h"
#include "serial.h"
#include "timer.h"
#include "mouse.h"
@@ -64,11 +64,12 @@ serial_reset_port(serial_t *dev)
void
serial_transmit_period(serial_t *dev)
{
double ddlab, byte_period, bits, dusec;
double ddlab, byte_period, bits;
ddlab = (double) dev->dlab;
/* Bit period based on DLAB. */
byte_period = (16000000.0 * ddlab) / 1846200.0;
/* correct: 833.333333... */
byte_period = (16000000.0 * ddlab) / 1843200.0;
/* Data bits according to LCR 1,0. */
bits = (double) ((dev->lcr & 0x03) + 5);
/* Stop bits. */
@@ -80,10 +81,8 @@ serial_transmit_period(serial_t *dev)
if (dev->lcr & 0x08)
bits += 1.0;
byte_period *= bits;
dusec = (double) TIMER_USEC;
byte_period *= dusec;
dev->transmit_period = (int64_t) byte_period;
dev->transmit_period = byte_period;
}
@@ -112,8 +111,8 @@ serial_update_ints(serial_t *dev)
dev->iir = 0;
}
if (stat && ((dev->mctrl & 8) || PCJR)) {
if (dev->type >= SERIAL_NS16540)
if (stat && ((dev->mctrl & 8) || (dev->type == SERIAL_8250_PCJR))) {
if (dev->type >= SERIAL_NS16450)
picintlevel(1 << dev->irq);
else
picint(1 << dev->irq);
@@ -133,7 +132,7 @@ serial_write_fifo(serial_t *dev, uint8_t dat)
dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
dev->lsr &= 0xfe;
dev->lsr |= (!dev->rcvr_fifo_pos);
dev->int_status &= SERIAL_INT_RECEIVE;
dev->int_status &= ~SERIAL_INT_RECEIVE;
if (!dev->rcvr_fifo_pos) {
dev->int_status |= SERIAL_INT_RECEIVE;
serial_update_ints(dev);
@@ -166,17 +165,27 @@ serial_transmit_timer(void *priv)
if (dev->fifo_enabled) {
serial_transmit(dev, dev->xmit_fifo[dev->xmit_fifo_pos++]);
if (dev->xmit_fifo_pos == 16) {
dev->transmit_delay = 0LL;
dev->xmit_fifo_pos = 0;
/* Mark both FIFO and shift register as empty. */
dev->lsr |= 0x40;
dev->transmit_enabled = 0;
} else
dev->transmit_delay += dev->transmit_period;
timer_advance_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
} else {
serial_transmit(dev, dev->thr);
dev->transmit_delay = 0LL;
/* Mark both THR and shift register as empty. */
dev->lsr |= 0x40;
dev->transmit_enabled = 0;
}
}
static void
serial_update_speed(serial_t *dev)
{
if (dev->transmit_enabled) {
timer_disable(&dev->transmit_timer);
timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
}
}
@@ -189,11 +198,14 @@ serial_write(uint16_t addr, uint8_t val, void *p)
serial_log("UART: Write %02X to port %02X\n", val, addr);
sub_cycles(ISA_CYCLES(8));
switch (addr & 7) {
case 0:
if (dev->lcr & 0x80) {
dev->dlab = (dev->dlab & 0xff00) | val;
serial_transmit_period(dev);
serial_update_speed(dev);
return;
}
@@ -211,7 +223,9 @@ serial_write(uint16_t addr, uint8_t val, void *p)
serial_update_ints(dev);
} else {
/* FIFO full, begin transmitting. */
dev->transmit_delay = dev->transmit_period;
timer_disable(&dev->transmit_timer);
timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
dev->transmit_enabled = 1;
dev->lsr &= 0xbf;
/* Update interrupts. */
dev->lsr |= 0x20;
@@ -221,7 +235,9 @@ serial_write(uint16_t addr, uint8_t val, void *p)
} else {
/* Non-FIFO mode. */
/* Begin transmitting. */
dev->transmit_delay = dev->transmit_period;
timer_disable(&dev->transmit_timer);
timer_set_delay_u64(&dev->transmit_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
dev->transmit_enabled = 1;
dev->thr = val;
/* Clear bit 6 because shift register is full. */
dev->lsr &= 0xbf;
@@ -236,6 +252,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
if (dev->lcr & 0x80) {
dev->dlab = (dev->dlab & 0x00ff) | (val << 8);
serial_transmit_period(dev);
serial_update_speed(dev);
return;
}
dev->ier = val & 0xf;
@@ -247,7 +264,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
dev->fifo_enabled = val & 0x01;
if (!dev->fifo_enabled) {
memset(dev->rcvr_fifo, 0, 14);
memset(dev->xmit_fifo, 0, 14);
memset(dev->xmit_fifo, 0, 16);
dev->rcvr_fifo_pos = dev->xmit_fifo_pos = 0;
dev->rcvr_fifo_len = 1;
break;
@@ -257,7 +274,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
dev->rcvr_fifo_pos = 0;
}
if (val & 0x04) {
memset(dev->xmit_fifo, 0, 14);
memset(dev->xmit_fifo, 0, 16);
dev->xmit_fifo_pos = 0;
}
switch ((val >> 6) & 0x03) {
@@ -279,8 +296,10 @@ serial_write(uint16_t addr, uint8_t val, void *p)
case 3:
old = dev->lcr;
dev->lcr = val;
if ((old ^ val) & 0x0f)
if ((old ^ val) & 0x0f) {
serial_transmit_period(dev);
serial_update_speed(dev);
}
break;
case 4:
if ((val & 2) && !(dev->mctrl & 2)) {
@@ -303,6 +322,8 @@ serial_write(uint16_t addr, uint8_t val, void *p)
new_msr |= 0x04;
dev->msr = new_msr;
dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
}
break;
case 5:
@@ -322,7 +343,8 @@ serial_write(uint16_t addr, uint8_t val, void *p)
serial_update_ints(dev);
break;
case 7:
dev->scratch = val;
if (dev->type >= SERIAL_NS16450)
dev->scratch = val;
break;
}
}
@@ -334,6 +356,8 @@ serial_read(uint16_t addr, void *p)
serial_t *dev = (serial_t *)p;
uint8_t ret = 0;
sub_cycles(ISA_CYCLES(8));
switch (addr & 7) {
case 0:
if (dev->lcr & 0x80) {
@@ -343,12 +367,22 @@ serial_read(uint16_t addr, void *p)
if ((dev->type >= SERIAL_NS16550) && dev->fifo_enabled) {
/* FIFO mode. */
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos++];
dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
if (!dev->rcvr_fifo_pos) {
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
if (dev->mctrl & 0x10) {
ret = dev->xmit_fifo[dev->xmit_fifo_pos++];
dev->xmit_fifo_pos %= 16;
if (!dev->xmit_fifo_pos) {
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
}
} else {
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos++];
dev->rcvr_fifo_pos %= dev->rcvr_fifo_len;
if (!dev->rcvr_fifo_pos) {
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
}
}
} else {
ret = dev->dat;
@@ -454,6 +488,15 @@ serial_attach(int port,
}
static void
serial_speed_changed(void *priv)
{
serial_t *dev = (serial_t *) priv;
serial_update_speed(dev);
}
static void
serial_close(void *priv)
{
@@ -489,8 +532,7 @@ serial_init(const device_t *info)
dev->dlab = 96;
dev->fcr = 0x06;
serial_transmit_period(dev);
dev->transmit_delay = 0LL;
timer_add(serial_transmit_timer, &dev->transmit_delay, &dev->transmit_delay, dev);
timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0);
}
next_inst++;
@@ -499,15 +541,18 @@ serial_init(const device_t *info)
}
void
serial_set_next_inst(int ni)
{
next_inst = ni;
}
void
serial_standalone_init(void) {
if (next_inst == 0) {
if (PCJR)
device_add(&i8250_pcjr_device);
else {
device_add_inst(&i8250_device, 1);
device_add_inst(&i8250_device, 2);
}
device_add_inst(&i8250_device, 1);
device_add_inst(&i8250_device, 2);
} else if (next_inst == 1)
device_add_inst(&i8250_device, 2);
};
@@ -518,25 +563,25 @@ const device_t i8250_device = {
0,
SERIAL_8250,
serial_init, serial_close, NULL,
NULL, NULL, NULL,
NULL, serial_speed_changed, NULL,
NULL
};
const device_t i8250_pcjr_device = {
"Intel 8250(-compatible) UART for PCjr",
DEVICE_PCJR,
SERIAL_8250,
SERIAL_8250_PCJR,
serial_init, serial_close, NULL,
NULL, NULL, NULL,
NULL, serial_speed_changed, NULL,
NULL
};
const device_t ns16540_device = {
"National Semiconductor NS16540(-compatible) UART",
const device_t ns16450_device = {
"National Semiconductor NS16450(-compatible) UART",
0,
SERIAL_NS16540,
SERIAL_NS16450,
serial_init, serial_close, NULL,
NULL, NULL, NULL,
NULL, serial_speed_changed, NULL,
NULL
};
@@ -545,6 +590,6 @@ const device_t ns16550_device = {
0,
SERIAL_NS16550,
serial_init, serial_close, NULL,
NULL, NULL, NULL,
NULL, serial_speed_changed, NULL,
NULL
};