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Fixed serial (and serial mouse) operation on boards with Super I/O chips;

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A few video bug fixes per patches from the mainline PCem forum;
Added CUE/BIN image support per patches from the mainline PCem forum.
This commit is contained in:
OBattler
2017-05-08 04:54:17 +02:00
parent d75d630976
commit 55a294ad37
29 changed files with 610 additions and 1216 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/VIDEO/vid_cga.c
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@@ -469,7 +469,7 @@ void *cga_standalone_init()
cga_comp_init(cga->revision);
timer_add(cga_poll, &cga->vidtime, TIMER_ALWAYS_ENABLED, cga);
mem_mapping_add(&cga->mapping, 0xb8000, 0x08000, cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, 0, cga);
mem_mapping_add(&cga->mapping, 0xb8000, 0x08000, cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, cga);
io_sethandler(0x03d0, 0x0010, cga_in, NULL, NULL, cga_out, NULL, NULL, cga);
overscan_x = overscan_y = 16;

2
src/VIDEO/vid_colorplus.c
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@@ -379,7 +379,7 @@ void *colorplus_standalone_init()
cga_comp_init(1);
timer_add(colorplus_poll, &colorplus->cga.vidtime, TIMER_ALWAYS_ENABLED, colorplus);
mem_mapping_add(&colorplus->cga.mapping, 0xb8000, 0x08000, colorplus_read, NULL, NULL, colorplus_write, NULL, NULL, NULL, 0, colorplus);
mem_mapping_add(&colorplus->cga.mapping, 0xb8000, 0x08000, colorplus_read, NULL, NULL, colorplus_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, colorplus);
io_sethandler(0x03d0, 0x0010, colorplus_in, NULL, NULL, colorplus_out, NULL, NULL, colorplus);
return colorplus;

6
src/VIDEO/vid_ega.c
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@@ -925,7 +925,7 @@ void *ega_standalone_init()
ega_common_defaults(ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, 0, ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, ega);
timer_add(ega_poll, &ega->vidtime, TIMER_ALWAYS_ENABLED, ega);
io_sethandler(0x03c0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega);
return ega;
@@ -961,7 +961,7 @@ void *cpqega_standalone_init()
ega_common_defaults(ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, 0, ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, ega);
timer_add(ega_poll, &ega->vidtime, TIMER_ALWAYS_ENABLED, ega);
io_sethandler(0x03c0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega);
return ega;
@@ -997,7 +997,7 @@ void *sega_standalone_init()
ega_common_defaults(ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, 0, ega);
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, ega);
timer_add(ega_poll, &ega->vidtime, TIMER_ALWAYS_ENABLED, ega);
io_sethandler(0x03c0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega);
return ega;

2
src/VIDEO/vid_genius.c
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@@ -562,7 +562,7 @@ void *genius_init()
/* Occupy memory between 0xB0000 and 0xBFFFF (moves to 0xA0000 in
* high-resolution modes) */
mem_mapping_add(&genius->mapping, 0xb0000, 0x10000, genius_read, NULL, NULL, genius_write, NULL, NULL, NULL, 0, genius);
mem_mapping_add(&genius->mapping, 0xb0000, 0x10000, genius_read, NULL, NULL, genius_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, genius);
/* Respond to both MDA and CGA I/O ports */
io_sethandler(0x03b0, 0x000C, genius_in, NULL, NULL, genius_out, NULL, NULL, genius);
io_sethandler(0x03d0, 0x0010, genius_in, NULL, NULL, genius_out, NULL, NULL, genius);

2
src/VIDEO/vid_hercules.c
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@@ -320,7 +320,7 @@ void *hercules_init()
hercules->vram = malloc(0x10000);
timer_add(hercules_poll, &hercules->vidtime, TIMER_ALWAYS_ENABLED, hercules);
mem_mapping_add(&hercules->mapping, 0xb0000, 0x08000, hercules_read, NULL, NULL, hercules_write, NULL, NULL, NULL, 0, hercules);
mem_mapping_add(&hercules->mapping, 0xb0000, 0x08000, hercules_read, NULL, NULL, hercules_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, hercules);
io_sethandler(0x03b0, 0x0010, hercules_in, NULL, NULL, hercules_out, NULL, NULL, hercules);
for (c = 0; c < 256; c++)

2
src/VIDEO/vid_herculesplus.c
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@@ -667,7 +667,7 @@ void *herculesplus_init()
herculesplus->vram = malloc(0x10000); /* 64k VRAM */
timer_add(herculesplus_poll, &herculesplus->vidtime, TIMER_ALWAYS_ENABLED, herculesplus);
mem_mapping_add(&herculesplus->mapping, 0xb0000, 0x10000, herculesplus_read, NULL, NULL, herculesplus_write, NULL, NULL, NULL, 0, herculesplus);
mem_mapping_add(&herculesplus->mapping, 0xb0000, 0x10000, herculesplus_read, NULL, NULL, herculesplus_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, herculesplus);
io_sethandler(0x03b0, 0x0010, herculesplus_in, NULL, NULL, herculesplus_out, NULL, NULL, herculesplus);
for (c = 0; c < 256; c++)

2
src/VIDEO/vid_incolor.c
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@@ -1014,7 +1014,7 @@ void *incolor_init()
incolor->vram = malloc(0x40000); /* 4 planes of 64k */
timer_add(incolor_poll, &incolor->vidtime, TIMER_ALWAYS_ENABLED, incolor);
mem_mapping_add(&incolor->mapping, 0xb0000, 0x08000, incolor_read, NULL, NULL, incolor_write, NULL, NULL, NULL, 0, incolor);
mem_mapping_add(&incolor->mapping, 0xb0000, 0x08000, incolor_read, NULL, NULL, incolor_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, incolor);
io_sethandler(0x03b0, 0x0010, incolor_in, NULL, NULL, incolor_out, NULL, NULL, incolor);
for (c = 0; c < 64; c++)

2
src/VIDEO/vid_mda.c
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@@ -269,7 +269,7 @@ void *mda_init()
mda->vram = malloc(0x1000);
timer_add(mda_poll, &mda->vidtime, TIMER_ALWAYS_ENABLED, mda);
mem_mapping_add(&mda->mapping, 0xb0000, 0x08000, mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, 0, mda);
mem_mapping_add(&mda->mapping, 0xb0000, 0x08000, mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, mda);
io_sethandler(0x03b0, 0x0010, mda_in, NULL, NULL, mda_out, NULL, NULL, mda);
for (c = 0; c < 256; c++)

69
src/VIDEO/vid_s3.c
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@@ -736,8 +736,10 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
}
if (svga->seqaddr == 4) /*Chain-4 - update banking*/
{
if (val & 8) svga->write_bank = svga->read_bank = s3->bank << 16;
else svga->write_bank = svga->read_bank = s3->bank << 14;
if (val & 8 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
}
break;
@@ -767,6 +769,10 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
{
case 0x31:
s3->ma_ext = (s3->ma_ext & 0x1c) | ((val & 0x30) >> 4);
if (svga->chain4 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
break;
case 0x32:
svga->vrammask = (val & 0x40) ? 0x3ffff : s3->vram_mask;
@@ -790,19 +796,25 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
case 0x35:
s3->bank = (s3->bank & 0x70) | (val & 0xf);
if (svga->chain4) svga->write_bank = svga->read_bank = s3->bank << 16;
else svga->write_bank = svga->read_bank = s3->bank << 14;
if (svga->chain4 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
break;
case 0x51:
s3->bank = (s3->bank & 0x4f) | ((val & 0xc) << 2);
if (svga->chain4) svga->write_bank = svga->read_bank = s3->bank << 16;
else svga->write_bank = svga->read_bank = s3->bank << 14;
if (svga->chain4 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
s3->ma_ext = (s3->ma_ext & ~0xc) | ((val & 3) << 2);
break;
case 0x6a:
s3->bank = val;
if (svga->chain4) svga->write_bank = svga->read_bank = s3->bank << 16;
else svga->write_bank = svga->read_bank = s3->bank << 14;
if (svga->chain4 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
break;
case 0x3a:
@@ -981,7 +993,12 @@ void s3_updatemapping(s3_t *s3)
return;
}
switch (svga->gdcreg[6] & 0xc) /*Banked framebuffer*/
if (svga->crtc[0x31] & 0x08)
{
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
}
else switch (svga->gdcreg[6] & 0xc) /*Banked framebuffer*/
{
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
@@ -1646,9 +1663,9 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (s3->accel.dx >= clip_l && s3->accel.dx <= clip_r &&
s3->accel.dy >= clip_t && s3->accel.dy <= clip_b)
{
READ(s3->accel.src + s3->accel.cx, src_dat);
dest_dat = src_dat;
READ(s3->accel.src + s3->accel.cx, dest_dat);
MIX
WRITE(s3->accel.dest + s3->accel.dx);
}
@@ -1672,8 +1689,6 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (s3->accel.sy < 0)
{
s3->accel.cur_x = s3->accel.cx;
s3->accel.cur_y = s3->accel.cy;
return;
}
}
@@ -2183,19 +2198,9 @@ int s3_phoenix_trio32_available()
void *s3_trio64_init(wchar_t *bios_fn)
{
int card_id = 0;
s3_t *s3 = s3_init(bios_fn, S3_TRIO64);
card_id = device_get_config_int("card_id");
if (card_id)
{
s3->id = 0xc1; /*Vision864P*/
}
else
{
s3->id = 0xe1; /*Trio64*/
}
s3->id = 0xe1; /*Trio64*/
s3->id_ext = s3->id_ext_pci = 0x11;
s3->packed_mmio = 1;
@@ -2390,20 +2395,6 @@ static device_config_t s3_phoenix_trio64_config[] =
}
}
},
{
"card_id", "Card ID", CONFIG_SELECTION, "", 0,
{
{
"S3 Trio64", 0
},
{
"S3 Vision864", 1
},
{
""
}
}
},
{
"", "", -1
}

6
src/VIDEO/vid_svga.c
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@@ -971,7 +971,7 @@ int svga_init(svga_t *svga, void *p, int memsize,
svga->hwcursor_draw = hwcursor_draw;
svga->overlay_draw = overlay_draw;
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, NULL, 0, svga);
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, NULL, MEM_MAPPING_EXTERNAL, svga);
memset(svga->vgapal, 0, sizeof(PALETTE));
@@ -1236,7 +1236,7 @@ uint8_t svga_read(uint32_t addr, void *p)
if (svga->chain4 || svga->fb_only)
{
if (addr >= svga->vram_limit)
return 0xff;
return 0x00;
return svga->vram[svga_mask_addr(addr, svga)];
}
else if (svga->chain2_read)
@@ -1254,7 +1254,7 @@ uint8_t svga_read(uint32_t addr, void *p)
addr<<=2;
if (addr >= svga->vram_limit)
return 0xff;
return 0x00;
addr = svga_mask_addr(addr, svga);

2
src/VIDEO/vid_wy700.c
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@@ -884,7 +884,7 @@ void *wy700_init()
/* Occupy memory between 0xB0000 and 0xBFFFF (moves to 0xA0000 in
* high-resolution modes) */
mem_mapping_add(&wy700->mapping, 0xb0000, 0x10000, wy700_read, NULL, NULL, wy700_write, NULL, NULL, NULL, 0, wy700);
mem_mapping_add(&wy700->mapping, 0xb0000, 0x10000, wy700_read, NULL, NULL, wy700_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, wy700);
/* Respond to both MDA and CGA I/O ports */
io_sethandler(0x03b0, 0x000C, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700);
io_sethandler(0x03d0, 0x0010, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700);