Improvements to VIA AC97 per suggestions
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@@ -111,34 +111,20 @@ ac97_via_read_status(void *priv, uint8_t modem)
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return ret;
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return ret;
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}
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}
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#include <86box/nmi.h>
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static void
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static void
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ac97_via_update_irqs(ac97_via_t *dev, uint8_t iflag_clear)
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ac97_via_update_irqs(ac97_via_t *dev, uint8_t iflag_clear)
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{
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{
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uint8_t do_irq = 0;
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/* Check interrupt flags on all SGDs. */
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/* Check interrupt flags on all SGDs. */
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for (uint8_t i = 0; i < (sizeof(dev->sgd) / sizeof(dev->sgd[0])); i++) {
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for (uint8_t i = 0; i < (sizeof(dev->sgd) / sizeof(dev->sgd[0])); i++)
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if (dev->sgd_regs[i << 4] & (dev->sgd_regs[(i << 4) | 0x02] & 0x03)) {
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do_irq |= (dev->sgd_regs[i << 4] & (dev->sgd_regs[(i << 4) | 0x02] & 0x03));
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ac97_via_log("AC97 VIA: Setting IRQ (sgd %d iflags %02X stuck %d)\n",
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i, dev->sgd_regs[i << 4] & (dev->sgd_regs[(i << 4) | 0x02] & 0x03), dev->irq_stuck);
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if (dev->irq_stuck && !iflag_clear) {
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if (do_irq)
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#ifdef ENABLE_AC97_VIA_LOG
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pci_set_irq(dev->slot, dev->irq_pin);
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ac97_via_lost_irqs++;
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else
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#endif
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pci_clear_irq(dev->slot, dev->irq_pin);
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pci_clear_irq(dev->slot, dev->irq_pin);
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} else {
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pci_set_irq(dev->slot, dev->irq_pin);
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}
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dev->irq_stuck = !dev->irq_stuck;
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return;
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}
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}
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/* No interrupt pending. */
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//ac97_via_log("AC97 VIA: Clearing IRQ\n");
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pci_clear_irq(dev->slot, dev->irq_pin);
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dev->irq_stuck = 0;
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}
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}
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@@ -495,7 +481,7 @@ ac97_via_sgd_process(void *priv)
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if (!sgd->sample_ptr) {
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if (!sgd->sample_ptr) {
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/* Start at first entry if no pointer is present. */
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/* Start at first entry if no pointer is present. */
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if (!sgd->entry_ptr)
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if (!sgd->entry_ptr)
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sgd->entry_ptr = (dev->sgd_regs[sgd->id | 0x7] << 24) | (dev->sgd_regs[sgd->id | 0x6] << 16) | (dev->sgd_regs[sgd->id | 0x5] << 8) | (dev->sgd_regs[sgd->id | 0x4] & 0xfe);
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sgd->entry_ptr = *((uint32_t *) &dev->sgd_regs[sgd->id | 0x4]) & 0xfffffffe;
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/* Read entry. */
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/* Read entry. */
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sgd->sample_ptr = mem_readl_phys(sgd->entry_ptr);
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sgd->sample_ptr = mem_readl_phys(sgd->entry_ptr);
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@@ -517,8 +503,8 @@ ac97_via_sgd_process(void *priv)
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}
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}
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if (sgd->id & 0x10) {
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if (sgd->id & 0x10) {
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/* Write channel: read data from FIFO. */
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/* Write channel: read data from FIFO. */
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mem_writel_phys(sgd->sample_ptr, *((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]));
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mem_writel_phys(sgd->sample_ptr, *((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]));
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} else {
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} else {
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/* Read channel: write data to FIFO. */
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/* Read channel: write data to FIFO. */
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*((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]) = mem_readl_phys(sgd->sample_ptr);
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*((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]) = mem_readl_phys(sgd->sample_ptr);
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