Added SiS 550x, 558x, 559x, (5)600, UMC UM8890, UMC UM8663 Super I/O Chips, UMC UM8673F and Winbond W83769F IDE Contollers, and a number of machines, and fixes to the UM888x 486 chipset.
This commit is contained in:
OBattler
@@ -16,7 +16,7 @@
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add_library(hdd OBJECT hdd.c hdd_image.c hdd_table.c hdc.c hdc_st506_xt.c
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hdc_st506_at.c hdc_xta.c hdc_esdi_at.c hdc_esdi_mca.c hdc_xtide.c
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hdc_ide.c hdc_ide_ali5213.c hdc_ide_opti611.c hdc_ide_cmd640.c hdc_ide_cmd646.c
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hdc_ide_sff8038i.c)
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hdc_ide_sff8038i.c hdc_ide_um8673f.c hdc_ide_w83769f.c)
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add_library(zip OBJECT zip.c)
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@@ -436,9 +436,9 @@ sff_bus_master_set_irq(uint8_t status, void *priv)
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case IRQ_MODE_SIS_551X:
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/* SiS 551x mode. */
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if (irq)
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pci_set_mirq(2, 1, &dev->irq_state);
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pci_set_mirq(dev->mirq, 1, &dev->irq_state);
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else
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pci_clear_mirq(2, 1, &dev->irq_state);
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pci_clear_mirq(dev->mirq, 1, &dev->irq_state);
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break;
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}
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}
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@@ -554,6 +554,12 @@ sff_set_irq_pin(sff8038i_t *dev, int irq_pin)
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dev->irq_pin = irq_pin;
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}
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void
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sff_set_mirq(sff8038i_t *dev, uint8_t mirq)
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{
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dev->mirq = mirq;
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}
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static void
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sff_close(void *priv)
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{
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@@ -586,6 +592,7 @@ sff_init(UNUSED(const device_t *info))
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dev->pci_irq_line = 14;
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dev->irq_level = 0;
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dev->irq_state = 0;
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dev->mirq = 2;
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dev->channel = next_id;
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next_id++;
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212
src/disk/hdc_ide_um8673f.c
Normal file
212
src/disk/hdc_ide_um8673f.c
Normal file
@@ -0,0 +1,212 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the UMC UMF8673F IDE controller.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2024 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/hdc_ide.h>
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#include <86box/hdc.h>
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#include <86box/mem.h>
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#include <86box/nmi.h>
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#include <86box/pic.h>
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#include <86box/pci.h>
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#include <86box/plat_unused.h>
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#include <86box/port_92.h>
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#include <86box/smram.h>
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#include <86box/chipset.h>
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#ifdef ENABLE_UM8673F_LOG
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int um8673f_do_log = ENABLE_UM8673F_LOG;
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static void
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um8673f_log(const char *fmt, ...)
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{
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va_list ap;
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if (um8673f_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define um8673f_log(fmt, ...)
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#endif
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typedef struct um8673f_t {
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uint8_t index;
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uint8_t tries;
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uint8_t unlocked;
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uint8_t regs[256];
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} um8673f_t;
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static void
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um8673f_ide_handler(um8673f_t *dev)
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{
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ide_pri_disable();
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ide_sec_disable();
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if (dev->regs[0xb0] & 0x80)
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ide_pri_enable();
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if (dev->regs[0xb0] & 0x40)
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ide_sec_enable();
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}
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static void
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um8673f_write(uint16_t addr, uint8_t val, void *priv)
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{
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um8673f_t *dev = (um8673f_t *) priv;
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um8673f_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
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switch (addr) {
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case 0x108:
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if (dev->unlocked) {
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if (dev->index == 0x34) {
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dev->unlocked = 0;
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dev->tries = 0;
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} else
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dev->index = val;
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} else if (((dev->tries == 0) && (val == 0x4a)) ||
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((dev->tries == 1) && (val == 0x6c))) {
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dev->tries++;
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if (dev->tries == 2)
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dev->unlocked = 1;
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} else
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dev->tries = 0;
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break;
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case 0x109:
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switch (dev->index) {
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case 0xb0:
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dev->regs[dev->index] = val;
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um8673f_ide_handler(dev);
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break;
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case 0xb1 ... 0xb8:
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dev->regs[dev->index] = val;
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break;
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default:
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break;
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}
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break;
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default:
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break;
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}
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}
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static uint8_t
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um8673f_read(uint16_t addr, void *priv)
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{
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um8673f_t *dev = (um8673f_t *) priv;
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uint8_t ret = 0xff;
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switch (addr) {
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case 0x108:
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if (dev->unlocked)
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ret = dev->index;
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else
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dev->tries = 0;
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break;
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case 0x109:
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if ((dev->index >= 0xb0) && (dev->index <= 0xb8))
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ret = dev->regs[dev->index];
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break;
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default:
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break;
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}
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um8673f_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
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return ret;
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}
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static void
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um8673f_reset(void *priv)
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{
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um8673f_t *dev = (um8673f_t *) priv;
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memset(dev->regs, 0x00, 256);
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ide_pri_disable();
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ide_sec_disable();
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/* IDE registers */
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dev->regs[0xb0] = 0xc0;
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um8673f_ide_handler(dev);
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}
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static void
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um8673f_close(void *priv)
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{
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um8673f_t *dev = (um8673f_t *) priv;
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free(dev);
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}
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static void *
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um8673f_init(UNUSED(const device_t *info))
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{
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um8673f_t *dev = (um8673f_t *) calloc(1, sizeof(um8673f_t));
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io_sethandler(0x0108, 0x0002, um8673f_read, NULL, NULL, um8673f_write, NULL, NULL, dev);
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device_add(info->local ? &ide_pci_2ch_device : &ide_vlb_2ch_device);
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um8673f_reset(dev);
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return dev;
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}
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const device_t ide_um8886af_device = {
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.name = "UMC UM8886F IDE",
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.internal_name = "um8886af_ide",
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.flags = 0,
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.local = 1,
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.init = um8673f_init,
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.close = um8673f_close,
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.reset = um8673f_reset,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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const device_t ide_um8673f_device = {
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.name = "UMC UM8673F",
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.internal_name = "um8673f",
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.flags = 0,
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.local = 0,
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.init = um8673f_init,
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.close = um8673f_close,
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.reset = um8673f_reset,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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460
src/disk/hdc_ide_w83769f.c
Normal file
460
src/disk/hdc_ide_w83769f.c
Normal file
@@ -0,0 +1,460 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
|
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Winbond W83769F controller.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2020 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/cdrom.h>
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#include <86box/scsi_device.h>
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#include <86box/scsi_cdrom.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/pci.h>
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#include <86box/pic.h>
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#include <86box/timer.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/hdc_ide_sff8038i.h>
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#include <86box/zip.h>
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#include <86box/mo.h>
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typedef struct w83769f_t {
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uint8_t vlb_idx;
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uint8_t id;
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uint8_t in_cfg;
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uint8_t channels;
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uint8_t pci;
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uint8_t pci_slot;
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uint8_t pad;
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uint8_t pad0;
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uint8_t regs[256];
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} w83769f_t;
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static int next_id = 0;
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#ifdef ENABLE_W83769F_LOG
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int w83769f_do_log = ENABLE_W83769F_LOG;
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static void
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w83769f_log(const char *fmt, ...)
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{
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va_list ap;
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if (cmd640_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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||||
va_end(ap);
|
||||
}
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||||
}
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#else
|
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# define w83769f_log(fmt, ...)
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#endif
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|
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void
|
||||
w83769f_set_irq_0(uint8_t status, void *priv)
|
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{
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||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
int irq = !!(status & 0x04);
|
||||
|
||||
if (!(dev->regs[0x50] & 0x04) || (status & 0x04))
|
||||
dev->regs[0x50] = (dev->regs[0x50] & ~0x04) | status;
|
||||
|
||||
if (!(dev->channels & 1))
|
||||
return;
|
||||
|
||||
if (irq)
|
||||
picint(1 << 14);
|
||||
else
|
||||
picintc(1 << 14);
|
||||
}
|
||||
|
||||
void
|
||||
w83769f_set_irq_1(uint8_t status, void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
int irq = !!(status & 0x04);
|
||||
|
||||
if (!(dev->regs[0x50] & 0x04) || (status & 0x04))
|
||||
dev->regs[0x50] = (dev->regs[0x50] & ~0x04) | status;
|
||||
|
||||
if (!(dev->channels & 2))
|
||||
return;
|
||||
|
||||
if (irq)
|
||||
picint(1 << 15);
|
||||
else
|
||||
picintc(1 << 15);
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_ide_handlers(w83769f_t *dev)
|
||||
{
|
||||
if (dev->channels & 0x01) {
|
||||
ide_pri_disable();
|
||||
|
||||
if (!dev->pci || (dev->regs[0x04] & 0x01))
|
||||
ide_pri_enable();
|
||||
}
|
||||
|
||||
if (dev->channels & 0x02) {
|
||||
ide_sec_disable();
|
||||
|
||||
if ((!dev->pci || (dev->regs[0x04] & 0x01)) && (dev->regs[0x57] & 0x01))
|
||||
ide_sec_enable();
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_common_write(int addr, uint8_t val, w83769f_t *dev)
|
||||
{
|
||||
switch (addr) {
|
||||
case 0x50:
|
||||
case 0x57:
|
||||
dev->regs[0x57] = val & 0x01;
|
||||
w83769f_ide_handlers(dev);
|
||||
break;
|
||||
case 0x51:
|
||||
dev->regs[addr] = val & 0x7f;
|
||||
break;
|
||||
case 0x52:
|
||||
case 0x54:
|
||||
case 0x56:
|
||||
case 0x58 ... 0x59:
|
||||
dev->regs[addr] = val;
|
||||
break;
|
||||
case 0x53:
|
||||
case 0x55:
|
||||
dev->regs[addr] = val & 0xcf;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_vlb_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x0034:
|
||||
case 0x00b4:
|
||||
dev->vlb_idx = val;
|
||||
break;
|
||||
case 0x0038:
|
||||
case 0x00b8:
|
||||
w83769f_common_write(dev->vlb_idx, val, dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_vlb_writew(uint16_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
w83769f_vlb_write(addr, val & 0xff, priv);
|
||||
w83769f_vlb_write(addr + 1, val >> 8, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_vlb_writel(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
w83769f_vlb_writew(addr, val & 0xffff, priv);
|
||||
w83769f_vlb_writew(addr + 2, val >> 16, priv);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
w83769f_vlb_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x0034:
|
||||
case 0x00b4:
|
||||
ret = dev->vlb_idx;
|
||||
break;
|
||||
case 0x0038:
|
||||
case 0x00b8:
|
||||
ret = dev->regs[dev->vlb_idx];
|
||||
if (dev->vlb_idx == 0x50)
|
||||
dev->regs[0x50] &= ~0x04;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
w83769f_vlb_readw(uint16_t addr, void *priv)
|
||||
{
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
ret = w83769f_vlb_read(addr, priv);
|
||||
ret |= (w83769f_vlb_read(addr + 1, priv) << 8);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
w83769f_vlb_readl(uint16_t addr, void *priv)
|
||||
{
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
ret = w83769f_vlb_readw(addr, priv);
|
||||
ret |= (w83769f_vlb_readw(addr + 2, priv) << 16);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_pci_write(int func, int addr, uint8_t val, void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
|
||||
w83769f_log("w83769f_pci_write(%i, %02X, %02X)\n", func, addr, val);
|
||||
|
||||
if (func == 0x00)
|
||||
switch (addr) {
|
||||
case 0x04:
|
||||
dev->regs[addr] = (dev->regs[addr] & 0xbf) | (val & 0x40);
|
||||
w83769f_ide_handlers(dev);
|
||||
break;
|
||||
case 0x07:
|
||||
dev->regs[addr] &= ~(val & 0x80);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
w83769f_pci_read(int func, int addr, void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0x00)
|
||||
ret = dev->regs[addr];
|
||||
|
||||
w83769f_log("w83769f_pci_read(%i, %02X, %02X)\n", func, addr, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_reset(void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
int i = 0;
|
||||
int min_channel;
|
||||
int max_channel;
|
||||
|
||||
switch (dev->channels) {
|
||||
default:
|
||||
case 0x00:
|
||||
min_channel = max_channel = 0;
|
||||
break;
|
||||
case 0x01:
|
||||
min_channel = 0;
|
||||
max_channel = 1;
|
||||
break;
|
||||
case 0x02:
|
||||
min_channel = 2;
|
||||
max_channel = 3;
|
||||
break;
|
||||
case 0x03:
|
||||
min_channel = 0;
|
||||
max_channel = 3;
|
||||
break;
|
||||
}
|
||||
|
||||
for (i = 0; i < CDROM_NUM; i++) {
|
||||
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel >= min_channel) &&
|
||||
(cdrom[i].ide_channel <= max_channel) && cdrom[i].priv)
|
||||
scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
|
||||
}
|
||||
for (i = 0; i < ZIP_NUM; i++) {
|
||||
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel >= min_channel) &&
|
||||
(zip_drives[i].ide_channel <= max_channel) && zip_drives[i].priv)
|
||||
zip_reset((scsi_common_t *) zip_drives[i].priv);
|
||||
}
|
||||
for (i = 0; i < MO_NUM; i++) {
|
||||
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel >= min_channel) &&
|
||||
(mo_drives[i].ide_channel <= max_channel) && mo_drives[i].priv)
|
||||
mo_reset((scsi_common_t *) mo_drives[i].priv);
|
||||
}
|
||||
|
||||
if (dev->channels & 0x01)
|
||||
w83769f_set_irq_0(0x00, priv);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
w83769f_set_irq_1(0x00, priv);
|
||||
|
||||
memset(dev->regs, 0x00, sizeof(dev->regs));
|
||||
|
||||
dev->regs[0x50] = (dev->id << 3); /* Device ID: 00 = 60h, 01 = 61h, 10 = 62h, 11 = 63h */
|
||||
dev->regs[0x51] = 0x40;
|
||||
dev->regs[0x57] = 0x01; /* Required by the MSI MS-5109 */
|
||||
dev->regs[0x59] = 0x40;
|
||||
|
||||
if (dev->pci) {
|
||||
dev->regs[0x00] = 0xad; /* Winbond */
|
||||
dev->regs[0x01] = 0x10;
|
||||
dev->regs[0x02] = 0x01; /* W83769 */
|
||||
dev->regs[0x03] = 0x00;
|
||||
dev->regs[0x04] = 0x01;
|
||||
dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */
|
||||
dev->regs[0x08] = 0x02; /* 00h for Rev BB, 02h for Rev A3C */
|
||||
dev->regs[0x09] = 0x00; /* Programming interface */
|
||||
dev->regs[0x0a] = 0x01; /* IDE controller */
|
||||
dev->regs[0x0b] = 0x01; /* Mass storage controller */
|
||||
dev->regs[0x3c] = 0x0e; /* IRQ 14 */
|
||||
dev->regs[0x3d] = 0x01; /* INTA */
|
||||
} else
|
||||
dev->regs[0x04] = 0x01; /* To make sure the two channels get enabled. */
|
||||
|
||||
w83769f_ide_handlers(dev);
|
||||
}
|
||||
|
||||
static void
|
||||
w83769f_close(void *priv)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) priv;
|
||||
|
||||
free(dev);
|
||||
|
||||
next_id = 0;
|
||||
}
|
||||
|
||||
static void *
|
||||
w83769f_init(const device_t *info)
|
||||
{
|
||||
w83769f_t *dev = (w83769f_t *) malloc(sizeof(w83769f_t));
|
||||
memset(dev, 0x00, sizeof(w83769f_t));
|
||||
|
||||
dev->id = next_id | 0x60;
|
||||
|
||||
dev->pci = !!(info->flags & DEVICE_PCI);
|
||||
|
||||
dev->channels = ((info->local & 0x60000) >> 17) & 0x03;
|
||||
|
||||
if (info->flags & DEVICE_PCI) {
|
||||
device_add(&ide_pci_2ch_device);
|
||||
|
||||
if (info->local & 0x80000)
|
||||
pci_add_card(PCI_ADD_NORMAL, w83769f_pci_read, w83769f_pci_write, dev, &dev->pci_slot);
|
||||
else
|
||||
pci_add_card(PCI_ADD_IDE, w83769f_pci_read, w83769f_pci_write, dev, &dev->pci_slot);
|
||||
} else if (info->flags & DEVICE_VLB)
|
||||
device_add(&ide_vlb_2ch_device);
|
||||
|
||||
if (dev->channels & 0x01)
|
||||
ide_set_bus_master(0, NULL, w83769f_set_irq_0, dev);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
ide_set_bus_master(1, NULL, w83769f_set_irq_1, dev);
|
||||
|
||||
/* The CMD PCI-0640B IDE controller has no DMA capability,
|
||||
so set our devices IDE devices to force ATA-3 (no DMA). */
|
||||
if (dev->channels & 0x01)
|
||||
ide_board_set_force_ata3(0, 1);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
ide_board_set_force_ata3(1, 1);
|
||||
|
||||
io_sethandler(info->local & 0xffff, 0x0001,
|
||||
w83769f_vlb_read, w83769f_vlb_readw, w83769f_vlb_readl,
|
||||
w83769f_vlb_write, w83769f_vlb_writew, w83769f_vlb_writel,
|
||||
dev);
|
||||
io_sethandler((info->local & 0xffff) + 0x0004, 0x0001,
|
||||
w83769f_vlb_read, w83769f_vlb_readw, w83769f_vlb_readl,
|
||||
w83769f_vlb_write, w83769f_vlb_writew, w83769f_vlb_writel,
|
||||
dev);
|
||||
|
||||
next_id++;
|
||||
|
||||
w83769f_reset(dev);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
const device_t ide_w83769f_vlb_device = {
|
||||
.name = "Winbond W83769F VLB",
|
||||
.internal_name = "ide_w83769f_vlb",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x600b4,
|
||||
.init = w83769f_init,
|
||||
.close = w83769f_close,
|
||||
.reset = w83769f_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_w83769f_vlb_34_device = {
|
||||
.name = "Winbond W83769F VLB (Port 34h)",
|
||||
.internal_name = "ide_w83769f_vlb_34",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x60034,
|
||||
.init = w83769f_init,
|
||||
.close = w83769f_close,
|
||||
.reset = w83769f_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_w83769f_pci_device = {
|
||||
.name = "Winbond W83769F PCI",
|
||||
.internal_name = "ide_w83769f_pci",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = 0x600b4,
|
||||
.init = w83769f_init,
|
||||
.close = w83769f_close,
|
||||
.reset = w83769f_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_w83769f_pci_34_device = {
|
||||
.name = "Winbond W83769F PCI (Port 34h)",
|
||||
.internal_name = "ide_w83769f_pci_34",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = 0x60034,
|
||||
.init = w83769f_init,
|
||||
.close = w83769f_close,
|
||||
.reset = w83769f_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user