286/386 interpreter fixes - the correct opcode arrays are now used and fixed the debug registers.
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@@ -1412,7 +1412,7 @@ x86_int(int num)
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cpu_state.pc = cpu_state.oldpc;
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if (msw & 1)
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is486 ? pmodeint(num, 0) : pmodeint_2386(num, 0);
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cpu_use_exec ? pmodeint(num, 0) : pmodeint_2386(num, 0);
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else {
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addr = (num << 2) + idt.base;
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@@ -1445,7 +1445,7 @@ x86_int(int num)
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oxpc = cpu_state.pc;
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#endif
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cpu_state.pc = readmemw(0, addr);
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is486 ? loadcs(readmemw(0, addr + 2)) : loadcs_2386(readmemw(0, addr + 2));
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cpu_use_exec ? loadcs(readmemw(0, addr + 2)) : loadcs_2386(readmemw(0, addr + 2));
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}
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}
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@@ -1462,7 +1462,7 @@ x86_int_sw(int num)
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cycles -= timing_int;
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if (msw & 1)
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is486 ? pmodeint(num, 1) : pmodeint_2386(num, 1);
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cpu_use_exec ? pmodeint(num, 1) : pmodeint_2386(num, 1);
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else {
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addr = (num << 2) + idt.base;
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@@ -1487,7 +1487,7 @@ x86_int_sw(int num)
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oxpc = cpu_state.pc;
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#endif
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cpu_state.pc = readmemw(0, addr);
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is486 ? loadcs(readmemw(0, addr + 2)) : loadcs_2386(readmemw(0, addr + 2));
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cpu_use_exec ? loadcs(readmemw(0, addr + 2)) : loadcs_2386(readmemw(0, addr + 2));
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cycles -= timing_int_rm;
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}
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}
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@@ -1529,7 +1529,7 @@ x86_int_sw_rm(int num)
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cpu_state.eflags &= ~VIF_FLAG;
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cpu_state.flags &= ~T_FLAG;
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cpu_state.pc = new_pc;
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is486 ? loadcs(new_cs) : loadcs_2386(new_cs);
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cpu_use_exec ? loadcs(new_cs) : loadcs_2386(new_cs);
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#ifndef USE_NEW_DYNAREC
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oxpc = cpu_state.pc;
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#endif
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