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Bring machine flags on par with device flag and clean up device_is_valid() accordingly.

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OBattler
2025-02-14 07:10:55 +01:00
parent 63fbe6ab4f
commit 5b6a965900
6 changed files with 112 additions and 137 deletions
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31
src/device/kbc_at.c
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@@ -810,27 +810,18 @@ write_p2(atkbc_t *dev, uint8_t val)
if (!(val & 0x01)) { /* Pin 0 selected. */
/* Pin 0 selected. */
kbc_at_log("write_p2(): Pulse reset!\n");
if (machines[machine].flags & MACHINE_COREBOOT) {
/* The SeaBIOS hard reset code attempts a KBC reset if ACPI RESET_REG
is not available. However, the KBC reset is normally a soft reset, so
SeaBIOS gets caught in a soft reset loop as it tries to hard reset the
machine. Hack around this by making the KBC reset a hard reset only on
coreboot machines. */
pc_reset_hard();
} else {
softresetx86(); /* Pulse reset! */
cpu_set_edx();
flushmmucache();
if ((kbc_ven == KBC_VEN_ALI) || !strcmp(machine_get_internal_name(), "spc7700plw"))
smbase = 0x00030000;
softresetx86(); /* Pulse reset! */
cpu_set_edx();
flushmmucache();
if ((kbc_ven == KBC_VEN_ALI) || !strcmp(machine_get_internal_name(), "spc7700plw"))
smbase = 0x00030000;
/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
and can find out what they actually did to make it boot from FFFFF0
correctly despite A20 being gated when the CPU is reset, this will
have to do. */
if ((kbc_ven == KBC_VEN_SIEMENS) || !strcmp(machine_get_internal_name(), "acera1g"))
is486 ? loadcs(0xf000) : loadcs_2386(0xf000);
}
/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
and can find out what they actually did to make it boot from FFFFF0
correctly despite A20 being gated when the CPU is reset, this will
have to do. */
if ((kbc_ven == KBC_VEN_SIEMENS) || !strcmp(machine_get_internal_name(), "acera1g"))
is486 ? loadcs(0xf000) : loadcs_2386(0xf000);
}
}