From 6de981363e7409acf3a51a374bd6880f93816feb Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 2 Dec 2022 14:03:30 -0500 Subject: [PATCH 01/14] Use SQXTUN instead of UQXTN in PACKUSWB on arm64 --- src/codegen_new/codegen_backend_arm64_ops.c | 7 +++++++ src/codegen_new/codegen_backend_arm64_ops.h | 1 + src/codegen_new/codegen_backend_arm64_uops.c | 4 ++-- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/codegen_new/codegen_backend_arm64_ops.c b/src/codegen_new/codegen_backend_arm64_ops.c index 915cae93d..21f0df34d 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.c +++ b/src/codegen_new/codegen_backend_arm64_ops.c @@ -180,6 +180,7 @@ # define OPCODE_SQSUB_V8B (0x0e202c00) # define OPCODE_SQSUB_V4H (0x0e602c00) # define OPCODE_SQXTN_V8B_8H (0x0e214800) +# define OPCODE_SQXTUN_V8B_8H (0x7e212800) # define OPCODE_SQXTN_V4H_4S (0x0e614800) # define OPCODE_SHL_VD (0x0f005400) # define OPCODE_SHL_VQ (0x4f005400) @@ -1225,6 +1226,12 @@ host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg) { codegen_addlong(block, OPCODE_SQXTN_V8B_8H | Rd(dst_reg) | Rn(src_reg)); } + +void host_arm64_SQXTUN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg) +{ + codegen_addlong(block, OPCODE_SQXTUN_V8B_8H | Rd(dst_reg) | Rn(src_reg)); +} + void host_arm64_SQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg) { diff --git a/src/codegen_new/codegen_backend_arm64_ops.h b/src/codegen_new/codegen_backend_arm64_ops.h index df751b4aa..084bbb404 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.h +++ b/src/codegen_new/codegen_backend_arm64_ops.h @@ -184,6 +184,7 @@ void host_arm64_SQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int sr void host_arm64_SQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg); +void host_arm64_SQXTUN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg); void host_arm64_SQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg); void host_arm64_SHL_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift); diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index 2bb6281ff..f6038f71f 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -1480,8 +1480,8 @@ codegen_PACKUSWB(codeblock_t *block, uop_t *uop) int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_UQXTN_V8B_8H(block, REG_V_TEMP, src_reg_b); - host_arm64_UQXTN_V8B_8H(block, dest_reg, dest_reg); + host_arm64_SQXTUN_V8B_8H(block, REG_V_TEMP, src_reg_b); + host_arm64_SQXTUN_V8B_8H(block, dest_reg, dest_reg); host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); } else fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); From 1488097c7bd633678d16678fa1bbe403ee2c7fc1 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 2 Dec 2022 14:05:18 -0500 Subject: [PATCH 02/14] Reenable MMX opcodes on ARM new dynarec --- src/codegen_new/codegen_ops.c | 22 ---------------------- 1 file changed, 22 deletions(-) diff --git a/src/codegen_new/codegen_ops.c b/src/codegen_new/codegen_ops.c index bb7d1f3ee..039e0877a 100644 --- a/src/codegen_new/codegen_ops.c +++ b/src/codegen_new/codegen_ops.c @@ -86,13 +86,8 @@ RecompOpFn recomp_opcodes_0f[512] = { /*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 -/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#else /*60*/ ropPUNPCKLBW, ropPUNPCKLWD, ropPUNPCKLDQ, ropPACKSSWB, ropPCMPGTB, ropPCMPGTW, ropPCMPGTD, ropPACKUSWB, ropPUNPCKHBW, ropPUNPCKHWD, ropPUNPCKHDQ, ropPACKSSDW, NULL, NULL, ropMOVD_r_d, ropMOVQ_r_q, /*70*/ NULL, ropPSxxW_imm, ropPSxxD_imm, ropPSxxQ_imm, ropPCMPEQB, ropPCMPEQW, ropPCMPEQD, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVD_d_r, ropMOVQ_q_r, -#endif /*80*/ ropJO_16, ropJNO_16, ropJB_16, ropJNB_16, ropJE_16, ropJNE_16, ropJBE_16, ropJNBE_16, ropJS_16, ropJNS_16, ropJP_16, ropJNP_16, ropJL_16, ropJNL_16, ropJLE_16, ropJNLE_16, /*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, @@ -100,15 +95,9 @@ RecompOpFn recomp_opcodes_0f[512] = { /*b0*/ NULL, NULL, ropLSS_16, NULL, ropLFS_16, ropLGS_16, ropMOVZX_16_8, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_16_8, NULL, /*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 -/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#else /*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN, /*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR, /*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, -#endif /*32-bit data*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -119,13 +108,8 @@ RecompOpFn recomp_opcodes_0f[512] = { /*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 -/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#else /*60*/ ropPUNPCKLBW, ropPUNPCKLWD, ropPUNPCKLDQ, ropPACKSSWB, ropPCMPGTB, ropPCMPGTW, ropPCMPGTD, ropPACKUSWB, ropPUNPCKHBW, ropPUNPCKHWD, ropPUNPCKHDQ, ropPACKSSDW, NULL, NULL, ropMOVD_r_d, ropMOVQ_r_q, /*70*/ NULL, ropPSxxW_imm, ropPSxxD_imm, ropPSxxQ_imm, ropPCMPEQB, ropPCMPEQW, ropPCMPEQD, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVD_d_r, ropMOVQ_q_r, -#endif /*80*/ ropJO_32, ropJNO_32, ropJB_32, ropJNB_32, ropJE_32, ropJNE_32, ropJBE_32, ropJNBE_32, ropJS_32, ropJNS_32, ropJP_32, ropJNP_32, ropJL_32, ropJNL_32, ropJLE_32, ropJNLE_32, /*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, @@ -133,15 +117,9 @@ RecompOpFn recomp_opcodes_0f[512] = { /*b0*/ NULL, NULL, ropLSS_32, NULL, ropLFS_32, ropLGS_32, ropMOVZX_32_8, ropMOVZX_32_16, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_32_8, ropMOVSX_32_16, /*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 -/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -#else /*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN, /*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR, /*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, -#endif // clang-format on }; From ffed72f8233ab952883cd71beab4899e6f901684 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Sep 2025 11:11:26 +0000 Subject: [PATCH 03/14] NDR (AArch64): Fix `ismmx` value assignment --- src/codegen_new/codegen_backend_arm64_ops.c | 7 ++++--- src/codegen_new/codegen_backend_arm64_uops.c | 3 ++- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/codegen_new/codegen_backend_arm64_ops.c b/src/codegen_new/codegen_backend_arm64_ops.c index 21f0df34d..afe00fe4d 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.c +++ b/src/codegen_new/codegen_backend_arm64_ops.c @@ -226,11 +226,11 @@ # define IMM_LOGICAL(imm) ((imm) << 10) -# define BIT_TBxZ(bit) ((((bit) &0x1f) << 19) | (((bit) &0x20) ? (1 << 31) : 0)) +# define BIT_TBxZ(bit) ((((bit) & 0x1f) << 19) | (((bit) & 0x20) ? (1 << 31) : 0)) # define OFFSET14(offset) (((offset >> 2) << 5) & 0x0007ffe0) # define OFFSET19(offset) (((offset >> 2) << 5) & 0x00ffffe0) -# define OFFSET20(offset) (((offset & 3) << 29) | ((((offset) &0x1fffff) >> 2) << 5)) +# define OFFSET20(offset) (((offset & 3) << 29) | ((((offset) & 0x1fffff) >> 2) << 5)) # define OFFSET26(offset) ((offset >> 2) & 0x03ffffff) # define OFFSET12_B(offset) (offset << 10) @@ -1227,7 +1227,8 @@ host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg) codegen_addlong(block, OPCODE_SQXTN_V8B_8H | Rd(dst_reg) | Rn(src_reg)); } -void host_arm64_SQXTUN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg) +void +host_arm64_SQXTUN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg) { codegen_addlong(block, OPCODE_SQXTUN_V8B_8H | Rd(dst_reg) | Rn(src_reg)); } diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index f6038f71f..4c00cbed2 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -801,7 +801,8 @@ codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t) &cpu_state.tag[0] - (uintptr_t) &cpu_state); host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t) &cpu_state.tag[4] - (uintptr_t) &cpu_state); host_arm64_STR_IMM_W(block, REG_WZR, REG_CPUSTATE, (uintptr_t) &cpu_state.TOP - (uintptr_t) &cpu_state); - host_arm64_STRB_IMM(block, REG_WZR, REG_CPUSTATE, (uintptr_t) &cpu_state.ismmx - (uintptr_t) &cpu_state); + host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 1); + host_arm64_STRB_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t) &cpu_state.ismmx - (uintptr_t) &cpu_state); return 0; } From 15a3df6135ef07218c141c2d99526cb072e10d5a Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Sep 2025 16:18:19 +0000 Subject: [PATCH 04/14] Fix PACK* recompiled instructions on ARM64 --- src/codegen_new/codegen_backend_arm64_ops.c | 6 ++++++ src/codegen_new/codegen_backend_arm64_ops.h | 1 + src/codegen_new/codegen_backend_arm64_uops.c | 15 ++++++--------- 3 files changed, 13 insertions(+), 9 deletions(-) diff --git a/src/codegen_new/codegen_backend_arm64_ops.c b/src/codegen_new/codegen_backend_arm64_ops.c index afe00fe4d..7f0518f04 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.c +++ b/src/codegen_new/codegen_backend_arm64_ops.c @@ -208,6 +208,7 @@ # define OPCODE_ZIP1_V8B (0x0e003800) # define OPCODE_ZIP1_V4H (0x0e403800) # define OPCODE_ZIP1_V2S (0x0e803800) +# define OPCODE_ZIP1_V2D (0x4ec03800) # define OPCODE_ZIP2_V8B (0x0e007800) # define OPCODE_ZIP2_V4H (0x0e407800) # define OPCODE_ZIP2_V2S (0x0e807800) @@ -1483,6 +1484,11 @@ host_arm64_ZIP1_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_re codegen_addlong(block, OPCODE_ZIP1_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg)); } void +host_arm64_ZIP1_V2D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg) +{ + codegen_addlong(block, OPCODE_ZIP1_V2D | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg)); +} +void host_arm64_ZIP2_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg) { codegen_addlong(block, OPCODE_ZIP2_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg)); diff --git a/src/codegen_new/codegen_backend_arm64_ops.h b/src/codegen_new/codegen_backend_arm64_ops.h index 084bbb404..152ab6793 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.h +++ b/src/codegen_new/codegen_backend_arm64_ops.h @@ -244,6 +244,7 @@ void host_arm64_USHR_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift void host_arm64_ZIP1_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_ZIP1_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_ZIP1_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); +void host_arm64_ZIP1_V2D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_ZIP2_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_ZIP2_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_ZIP2_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index 4c00cbed2..925e6517b 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -1449,9 +1449,8 @@ codegen_PACKSSWB(codeblock_t *block, uop_t *uop) int src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_SQXTN_V8B_8H(block, REG_V_TEMP, src_reg_b); - host_arm64_SQXTN_V8B_8H(block, dest_reg, dest_reg); - host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); + host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_SQXTN_V8B_8H(block, dest_reg, REG_V_TEMP); } else fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); @@ -1466,9 +1465,8 @@ codegen_PACKSSDW(codeblock_t *block, uop_t *uop) int src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_SQXTN_V4H_4S(block, REG_V_TEMP, src_reg_b); - host_arm64_SQXTN_V4H_4S(block, dest_reg, dest_reg); - host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); + host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_SQXTN_V4H_4S(block, dest_reg, REG_V_TEMP); } else fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); @@ -1481,9 +1479,8 @@ codegen_PACKUSWB(codeblock_t *block, uop_t *uop) int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_SQXTUN_V8B_8H(block, REG_V_TEMP, src_reg_b); - host_arm64_SQXTUN_V8B_8H(block, dest_reg, dest_reg); - host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); + host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_SQXTUN_V8B_8H(block, dest_reg, REG_V_TEMP); } else fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); From 62296072775381145c2e3627d8af057f0733be20 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Sep 2025 23:42:14 +0600 Subject: [PATCH 05/14] Temp MMX debugging logs --- src/codegen_new/codegen.c | 6 ++++++ src/codegen_new/codegen_ops_mmx_arith.c | 3 +++ src/codegen_new/codegen_ops_mmx_cmp.c | 3 +++ src/codegen_new/codegen_ops_mmx_loadstore.c | 6 ++++++ src/codegen_new/codegen_ops_mmx_logic.c | 5 +++++ src/codegen_new/codegen_ops_mmx_pack.c | 2 ++ src/codegen_new/codegen_ops_mmx_shift.c | 4 ++++ 7 files changed, 29 insertions(+) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 875dd72ca..57d8c4dbc 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -30,6 +30,12 @@ static struct { int TOP; } codegen_instructions[MAX_INSTRUCTION_COUNT]; +void +codegen_print_mmx(void) +{ + pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", cpu_state.MM[0], cpu_state.MM[1], cpu_state.MM[2], cpu_state.MM[3], cpu_state.MM[4], cpu_state.MM[5], cpu_state.MM[6], cpu_state.MM[7]); +} + int codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP) { diff --git a/src/codegen_new/codegen_ops_mmx_arith.c b/src/codegen_new/codegen_ops_mmx_arith.c index f01d64273..3ac6eb0d6 100644 --- a/src/codegen_new/codegen_ops_mmx_arith.c +++ b/src/codegen_new/codegen_ops_mmx_arith.c @@ -16,6 +16,8 @@ #include "codegen_ops_mmx_arith.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); + #define ropParith(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -37,6 +39,7 @@ uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_cmp.c b/src/codegen_new/codegen_ops_mmx_cmp.c index cf0cededb..865522f09 100644 --- a/src/codegen_new/codegen_ops_mmx_cmp.c +++ b/src/codegen_new/codegen_ops_mmx_cmp.c @@ -16,6 +16,8 @@ #include "codegen_ops_mmx_cmp.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); + #define ropPcmp(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -37,6 +39,7 @@ uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_loadstore.c b/src/codegen_new/codegen_ops_mmx_loadstore.c index 9d37228ec..c0148781e 100644 --- a/src/codegen_new/codegen_ops_mmx_loadstore.c +++ b/src/codegen_new/codegen_ops_mmx_loadstore.c @@ -16,6 +16,8 @@ #include "codegen_ops_mmx_loadstore.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); + uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) { @@ -36,6 +38,7 @@ ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MOVZX(ir, IREG_MM(dest_reg), IREG_temp0); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -62,6 +65,7 @@ ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -84,6 +88,7 @@ ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_LOAD_REG(ir, IREG_MM(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -107,5 +112,6 @@ ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_MM(src_reg)); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_logic.c b/src/codegen_new/codegen_ops_mmx_logic.c index dd50b486e..36d957c5e 100644 --- a/src/codegen_new/codegen_ops_mmx_logic.c +++ b/src/codegen_new/codegen_ops_mmx_logic.c @@ -16,6 +16,7 @@ #include "codegen_ops_mmx_logic.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) { @@ -36,6 +37,7 @@ ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_AND(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -58,6 +60,7 @@ ropPANDN(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fet uop_ANDN(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -80,6 +83,7 @@ ropPOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetch uop_OR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -102,5 +106,6 @@ ropPXOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_XOR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_pack.c b/src/codegen_new/codegen_ops_mmx_pack.c index c62aa10d0..69ec3ce3a 100644 --- a/src/codegen_new/codegen_ops_mmx_pack.c +++ b/src/codegen_new/codegen_ops_mmx_pack.c @@ -16,6 +16,7 @@ #include "codegen_ops_mmx_pack.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); #define ropPpack(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -37,6 +38,7 @@ uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_shift.c b/src/codegen_new/codegen_ops_mmx_shift.c index b812a9bb2..b1f41d1bb 100644 --- a/src/codegen_new/codegen_ops_mmx_shift.c +++ b/src/codegen_new/codegen_ops_mmx_shift.c @@ -16,6 +16,7 @@ #include "codegen_ops_mmx_shift.h" #include "codegen_ops_helpers.h" +extern void codegen_print_mmx(void); uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, UNUSED(uint32_t op_32), uint32_t op_pc) { @@ -39,6 +40,7 @@ ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } @@ -65,6 +67,7 @@ ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } @@ -91,6 +94,7 @@ ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } From 4735998b8a62631907157c02ded214d9fcc0fd52 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Sep 2025 23:46:00 +0600 Subject: [PATCH 06/14] Warning fixes --- src/codegen_new/codegen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 57d8c4dbc..adc0d30d9 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -33,7 +33,7 @@ static struct { void codegen_print_mmx(void) { - pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", cpu_state.MM[0], cpu_state.MM[1], cpu_state.MM[2], cpu_state.MM[3], cpu_state.MM[4], cpu_state.MM[5], cpu_state.MM[6], cpu_state.MM[7]); + pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q, cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q); } int From 97ab7a8ce8c715213b940fc0f9a675fcbeccc71d Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Sep 2025 23:47:18 +0600 Subject: [PATCH 07/14] More warning fixes --- src/codegen_new/codegen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index adc0d30d9..0b3449500 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -33,7 +33,7 @@ static struct { void codegen_print_mmx(void) { - pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q, cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q); + pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q); } int From d824fc36df1ae05d5a114bdfe46a7b835a7ac2c1 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 12:34:34 +0600 Subject: [PATCH 08/14] Yet more logging --- src/codegen_new/codegen.c | 4 ++-- src/codegen_new/codegen_backend_arm64_uops.c | 8 ++++---- src/codegen_new/codegen_backend_x86-64_uops.c | 12 ++++++------ src/codegen_new/codegen_ir_defs.h | 4 ++-- src/codegen_new/codegen_ops_mmx_arith.c | 3 ++- src/codegen_new/codegen_ops_mmx_cmp.c | 3 ++- src/codegen_new/codegen_ops_mmx_loadstore.c | 6 +++++- src/codegen_new/codegen_ops_mmx_logic.c | 6 +++++- src/codegen_new/codegen_ops_mmx_pack.c | 3 ++- src/codegen_new/codegen_ops_mmx_shift.c | 5 ++++- 10 files changed, 34 insertions(+), 20 deletions(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 0b3449500..8dfb9b386 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -31,9 +31,9 @@ static struct { } codegen_instructions[MAX_INSTRUCTION_COUNT]; void -codegen_print_mmx(void) +codegen_print_mmx(const char* str) { - pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q); + pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX (%s)\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q, str); } int diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index 925e6517b..c09b74fca 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -850,28 +850,28 @@ codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop) static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop) { - host_arm64_mov_imm(block, REG_ARG0, uop->imm_data); + host_arm64_MOVX_IMM(block, REG_ARG0, uop->imm_data); return 0; } static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop) { - host_arm64_mov_imm(block, REG_ARG1, uop->imm_data); + host_arm64_MOVX_IMM(block, REG_ARG1, uop->imm_data); return 0; } static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop) { - host_arm64_mov_imm(block, REG_ARG2, uop->imm_data); + host_arm64_MOVX_IMM(block, REG_ARG2, uop->imm_data); return 0; } static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop) { - host_arm64_mov_imm(block, REG_ARG3, uop->imm_data); + host_arm64_MOVX_IMM(block, REG_ARG3, uop->imm_data); return 0; } diff --git a/src/codegen_new/codegen_backend_x86-64_uops.c b/src/codegen_new/codegen_backend_x86-64_uops.c index 356c8bcde..6b206d5b5 100644 --- a/src/codegen_new/codegen_backend_x86-64_uops.c +++ b/src/codegen_new/codegen_backend_x86-64_uops.c @@ -220,9 +220,9 @@ static int codegen_CALL_INSTRUCTION_FUNC(codeblock_t *block, uop_t *uop) { # if _WIN64 - host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RCX, uop->imm_data); # else - host_x86_MOV32_REG_IMM(block, REG_EDI, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RDI, uop->imm_data); # endif host_x86_CALL(block, uop->p); host_x86_TEST32_REG(block, REG_EAX, REG_EAX); @@ -906,9 +906,9 @@ static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop) { # if _WIN64 - host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RCX, uop->imm_data); # else - host_x86_MOV32_REG_IMM(block, REG_EDI, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RDI, uop->imm_data); # endif return 0; } @@ -916,9 +916,9 @@ static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop) { # if _WIN64 - host_x86_MOV32_REG_IMM(block, REG_EDX, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RDX, uop->imm_data); # else - host_x86_MOV32_REG_IMM(block, REG_ESI, uop->imm_data); + host_x86_MOV64_REG_IMM(block, REG_RSI, uop->imm_data); # endif return 0; } diff --git a/src/codegen_new/codegen_ir_defs.h b/src/codegen_new/codegen_ir_defs.h index 60f7badea..bfc19373b 100644 --- a/src/codegen_new/codegen_ir_defs.h +++ b/src/codegen_new/codegen_ir_defs.h @@ -336,7 +336,7 @@ typedef struct uop_t { ir_reg_t src_reg_a; ir_reg_t src_reg_b; ir_reg_t src_reg_c; - uint32_t imm_data; + uintptr_t imm_data; void *p; ir_host_reg_t dest_reg_a_real; ir_host_reg_t src_reg_a_real, src_reg_b_real, src_reg_c_real; @@ -601,7 +601,7 @@ uop_gen_reg_src3_imm(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_re } static inline void -uop_gen_imm(uint32_t uop_type, ir_data_t *ir, uint32_t imm) +uop_gen_imm(uint32_t uop_type, ir_data_t *ir, uintptr_t imm) { uop_t *uop = uop_alloc(ir, uop_type); diff --git a/src/codegen_new/codegen_ops_mmx_arith.c b/src/codegen_new/codegen_ops_mmx_arith.c index 3ac6eb0d6..4f8a5d91c 100644 --- a/src/codegen_new/codegen_ops_mmx_arith.c +++ b/src/codegen_new/codegen_ops_mmx_arith.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_arith.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); #define ropParith(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ @@ -39,6 +39,7 @@ extern void codegen_print_mmx(void); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_cmp.c b/src/codegen_new/codegen_ops_mmx_cmp.c index 865522f09..d28c9197c 100644 --- a/src/codegen_new/codegen_ops_mmx_cmp.c +++ b/src/codegen_new/codegen_ops_mmx_cmp.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_cmp.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); #define ropPcmp(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ @@ -39,6 +39,7 @@ extern void codegen_print_mmx(void); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_loadstore.c b/src/codegen_new/codegen_ops_mmx_loadstore.c index c0148781e..d7ff5b355 100644 --- a/src/codegen_new/codegen_ops_mmx_loadstore.c +++ b/src/codegen_new/codegen_ops_mmx_loadstore.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_loadstore.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) @@ -38,6 +38,7 @@ ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MOVZX(ir, IREG_MM(dest_reg), IREG_temp0); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -65,6 +66,7 @@ ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -88,6 +90,7 @@ ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_LOAD_REG(ir, IREG_MM(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -112,6 +115,7 @@ ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_MM(src_reg)); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_logic.c b/src/codegen_new/codegen_ops_mmx_logic.c index 36d957c5e..e8e092fad 100644 --- a/src/codegen_new/codegen_ops_mmx_logic.c +++ b/src/codegen_new/codegen_ops_mmx_logic.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_logic.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) { @@ -37,6 +37,7 @@ ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_AND(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -60,6 +61,7 @@ ropPANDN(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fet uop_ANDN(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -83,6 +85,7 @@ ropPOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetch uop_OR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -106,6 +109,7 @@ ropPXOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_XOR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_pack.c b/src/codegen_new/codegen_ops_mmx_pack.c index 69ec3ce3a..5c01c7e92 100644 --- a/src/codegen_new/codegen_ops_mmx_pack.c +++ b/src/codegen_new/codegen_ops_mmx_pack.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_pack.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); #define ropPpack(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -38,6 +38,7 @@ extern void codegen_print_mmx(void); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_shift.c b/src/codegen_new/codegen_ops_mmx_shift.c index b1f41d1bb..42aea4f1c 100644 --- a/src/codegen_new/codegen_ops_mmx_shift.c +++ b/src/codegen_new/codegen_ops_mmx_shift.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_shift.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(void); +extern void codegen_print_mmx(const char* str); uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, UNUSED(uint32_t op_32), uint32_t op_pc) { @@ -40,6 +40,7 @@ ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; @@ -67,6 +68,7 @@ ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; @@ -94,6 +96,7 @@ ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } + uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; From 1d8877fba79e1eec6958e96c646cb0872541a65b Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 09:19:40 +0000 Subject: [PATCH 09/14] Progress on ARM64 MMX opcodes --- src/codegen_new/codegen.c | 4 ++-- src/codegen_new/codegen_backend_arm64_ops.c | 12 +++++++++++- src/codegen_new/codegen_backend_arm64_ops.h | 1 + src/codegen_new/codegen_backend_arm64_uops.c | 13 ++++++++++--- src/codegen_new/codegen_ops_mmx_arith.c | 3 ++- src/codegen_new/codegen_ops_mmx_cmp.c | 3 ++- src/codegen_new/codegen_ops_mmx_loadstore.c | 6 +++++- src/codegen_new/codegen_ops_mmx_logic.c | 3 ++- src/codegen_new/codegen_ops_mmx_pack.c | 3 ++- src/codegen_new/codegen_ops_mmx_shift.c | 5 ++++- 10 files changed, 41 insertions(+), 12 deletions(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 8dfb9b386..48d2afad9 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -31,9 +31,9 @@ static struct { } codegen_instructions[MAX_INSTRUCTION_COUNT]; void -codegen_print_mmx(const char* str) +codegen_print_mmx(const char* str, uint32_t fetchdat) { - pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX (%s)\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q, str); + pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX (%s, fetchdat 0x%08X)\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q, str, fetchdat); } int diff --git a/src/codegen_new/codegen_backend_arm64_ops.c b/src/codegen_new/codegen_backend_arm64_ops.c index 7f0518f04..9d5806edf 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.c +++ b/src/codegen_new/codegen_backend_arm64_ops.c @@ -102,6 +102,10 @@ # define OPCODE_SUB_LSR (0x25a << 21) # define OPCODE_SUBX_LSL (0x658 << 21) +# define OPCODE_INS_B (0x6e010400) +# define OPCODE_INS_H (0x6e020400) +# define OPCODE_INS_S (0x6e040400) +# define OPCODE_INS_D (0x6e080400) # define OPCODE_ADD_V8B (0x0e208400) # define OPCODE_ADD_V4H (0x0e608400) # define OPCODE_ADD_V2S (0x0ea08400) @@ -180,7 +184,7 @@ # define OPCODE_SQSUB_V8B (0x0e202c00) # define OPCODE_SQSUB_V4H (0x0e602c00) # define OPCODE_SQXTN_V8B_8H (0x0e214800) -# define OPCODE_SQXTUN_V8B_8H (0x7e212800) +# define OPCODE_SQXTUN_V8B_8H (0x2e212800) # define OPCODE_SQXTN_V4H_4S (0x0e614800) # define OPCODE_SHL_VD (0x0f005400) # define OPCODE_SHL_VQ (0x4f005400) @@ -718,6 +722,12 @@ host_arm64_DUP_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int element) codegen_addlong(block, OPCODE_DUP_V2S | Rd(dst_reg) | Rn(src_n_reg) | DUP_ELEMENT(element)); } +void +host_arm64_INS_D(codeblock_t *block, int dst_reg, int src_reg, int dst_index, int src_index) +{ + codegen_addlong(block, OPCODE_INS_D | Rd(dst_reg) | Rn(src_reg) | ((dst_index & 1) << 20) | ((src_index & 1) << 14)); +} + void host_arm64_EOR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data) { diff --git a/src/codegen_new/codegen_backend_arm64_ops.h b/src/codegen_new/codegen_backend_arm64_ops.h index 152ab6793..129c2b2a3 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.h +++ b/src/codegen_new/codegen_backend_arm64_ops.h @@ -72,6 +72,7 @@ void host_arm64_CSEL_EQ(codeblock_t *block, int dst_reg, int src_n_reg, int src_ void host_arm64_CSEL_VS(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_DUP_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int element); +void host_arm64_INS_D(codeblock_t *block, int dst_reg, int src_reg, int dst_index, int src_index); void host_arm64_EOR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data); void host_arm64_EOR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift); diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index c09b74fca..c4923387c 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -1449,7 +1449,8 @@ codegen_PACKSSWB(codeblock_t *block, uop_t *uop) int src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_INS_D(block, REG_V_TEMP, dest_reg, 0, 0); + host_arm64_INS_D(block, REG_V_TEMP, src_reg_b, 1, 0); host_arm64_SQXTN_V8B_8H(block, dest_reg, REG_V_TEMP); } else fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); @@ -1465,7 +1466,8 @@ codegen_PACKSSDW(codeblock_t *block, uop_t *uop) int src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_INS_D(block, REG_V_TEMP, dest_reg, 0, 0); + host_arm64_INS_D(block, REG_V_TEMP, src_reg_b, 1, 0); host_arm64_SQXTN_V4H_4S(block, dest_reg, REG_V_TEMP); } else fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); @@ -1479,8 +1481,13 @@ codegen_PACKUSWB(codeblock_t *block, uop_t *uop) int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real); if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real) { - host_arm64_ZIP1_V2D(block, REG_V_TEMP, dest_reg, src_reg_b); + host_arm64_INS_D(block, REG_V_TEMP, dest_reg, 0, 0); + host_arm64_INS_D(block, REG_V_TEMP, src_reg_b, 1, 0); host_arm64_SQXTUN_V8B_8H(block, dest_reg, REG_V_TEMP); + //host_arm64_ADD_V4H(block, dest_reg, dest_reg, src_reg_b); + //host_arm64_SQXTUN_V8B_8H(block, REG_V_TEMP, src_reg_b); + //host_arm64_SQXTUN_V8B_8H(block, dest_reg, dest_reg); + //host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); } else fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); diff --git a/src/codegen_new/codegen_ops_mmx_arith.c b/src/codegen_new/codegen_ops_mmx_arith.c index 4f8a5d91c..4688f3e2b 100644 --- a/src/codegen_new/codegen_ops_mmx_arith.c +++ b/src/codegen_new/codegen_ops_mmx_arith.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_arith.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); #define ropParith(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ @@ -40,6 +40,7 @@ extern void codegen_print_mmx(const char* str); } \ \ uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_cmp.c b/src/codegen_new/codegen_ops_mmx_cmp.c index d28c9197c..09006cae7 100644 --- a/src/codegen_new/codegen_ops_mmx_cmp.c +++ b/src/codegen_new/codegen_ops_mmx_cmp.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_cmp.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); #define ropPcmp(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ @@ -40,6 +40,7 @@ extern void codegen_print_mmx(const char* str); } \ \ uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_loadstore.c b/src/codegen_new/codegen_ops_mmx_loadstore.c index d7ff5b355..267e7312a 100644 --- a/src/codegen_new/codegen_ops_mmx_loadstore.c +++ b/src/codegen_new/codegen_ops_mmx_loadstore.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_loadstore.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) @@ -39,6 +39,7 @@ ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -67,6 +68,7 @@ ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -91,6 +93,7 @@ ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -116,6 +119,7 @@ ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_logic.c b/src/codegen_new/codegen_ops_mmx_logic.c index e8e092fad..24dbd167e 100644 --- a/src/codegen_new/codegen_ops_mmx_logic.c +++ b/src/codegen_new/codegen_ops_mmx_logic.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_logic.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) { @@ -110,6 +110,7 @@ ropPXOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_pack.c b/src/codegen_new/codegen_ops_mmx_pack.c index 5c01c7e92..86cd99e0a 100644 --- a/src/codegen_new/codegen_ops_mmx_pack.c +++ b/src/codegen_new/codegen_ops_mmx_pack.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_pack.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); #define ropPpack(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -39,6 +39,7 @@ extern void codegen_print_mmx(const char* str); } \ \ uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_shift.c b/src/codegen_new/codegen_ops_mmx_shift.c index 42aea4f1c..e6c6da410 100644 --- a/src/codegen_new/codegen_ops_mmx_shift.c +++ b/src/codegen_new/codegen_ops_mmx_shift.c @@ -16,7 +16,7 @@ #include "codegen_ops_mmx_shift.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str); +extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, UNUSED(uint32_t op_32), uint32_t op_pc) { @@ -41,6 +41,7 @@ ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; @@ -69,6 +70,7 @@ ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; @@ -97,6 +99,7 @@ ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t } uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); + uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; From fe28a8bb627326ace5b2a8804c857fa1a53c3077 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 11:47:03 +0000 Subject: [PATCH 10/14] Disable unrolling for now --- src/codegen_new/codegen_ops_helpers.h | 1 + src/codegen_new/codegen_ops_mmx_arith.c | 5 ----- src/codegen_new/codegen_ops_mmx_cmp.c | 5 ----- src/codegen_new/codegen_ops_mmx_loadstore.c | 12 ------------ src/codegen_new/codegen_ops_mmx_logic.c | 9 --------- src/codegen_new/codegen_ops_mmx_pack.c | 4 ---- src/codegen_new/codegen_ops_mmx_shift.c | 10 ---------- src/codegen_new/codegen_reg.c | 2 +- 8 files changed, 2 insertions(+), 46 deletions(-) diff --git a/src/codegen_new/codegen_ops_helpers.h b/src/codegen_new/codegen_ops_helpers.h index 92b721099..0128e15ae 100644 --- a/src/codegen_new/codegen_ops_helpers.h +++ b/src/codegen_new/codegen_ops_helpers.h @@ -114,6 +114,7 @@ int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, static inline int codegen_can_unroll(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr) { + return 0; if (block->flags & CODEBLOCK_BYTE_MASK) return 0; diff --git a/src/codegen_new/codegen_ops_mmx_arith.c b/src/codegen_new/codegen_ops_mmx_arith.c index 4688f3e2b..f01d64273 100644 --- a/src/codegen_new/codegen_ops_mmx_arith.c +++ b/src/codegen_new/codegen_ops_mmx_arith.c @@ -16,8 +16,6 @@ #include "codegen_ops_mmx_arith.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); - #define ropParith(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -39,9 +37,6 @@ extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ - uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_cmp.c b/src/codegen_new/codegen_ops_mmx_cmp.c index 09006cae7..cf0cededb 100644 --- a/src/codegen_new/codegen_ops_mmx_cmp.c +++ b/src/codegen_new/codegen_ops_mmx_cmp.c @@ -16,8 +16,6 @@ #include "codegen_ops_mmx_cmp.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); - #define ropPcmp(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -39,9 +37,6 @@ extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ - uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_loadstore.c b/src/codegen_new/codegen_ops_mmx_loadstore.c index 267e7312a..e46af7e44 100644 --- a/src/codegen_new/codegen_ops_mmx_loadstore.c +++ b/src/codegen_new/codegen_ops_mmx_loadstore.c @@ -38,9 +38,6 @@ ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MOVZX(ir, IREG_MM(dest_reg), IREG_temp0); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -67,9 +64,6 @@ ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -92,9 +86,6 @@ ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_LOAD_REG(ir, IREG_MM(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } @@ -118,8 +109,5 @@ ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_MM(src_reg)); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_logic.c b/src/codegen_new/codegen_ops_mmx_logic.c index 24dbd167e..dec8d8c04 100644 --- a/src/codegen_new/codegen_ops_mmx_logic.c +++ b/src/codegen_new/codegen_ops_mmx_logic.c @@ -37,8 +37,6 @@ ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_AND(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -61,8 +59,6 @@ ropPANDN(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fet uop_ANDN(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -85,8 +81,6 @@ ropPOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetch uop_OR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } uint32_t @@ -109,8 +103,5 @@ ropPXOR(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetc uop_XOR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); return op_pc + 1; } diff --git a/src/codegen_new/codegen_ops_mmx_pack.c b/src/codegen_new/codegen_ops_mmx_pack.c index 86cd99e0a..c62aa10d0 100644 --- a/src/codegen_new/codegen_ops_mmx_pack.c +++ b/src/codegen_new/codegen_ops_mmx_pack.c @@ -16,7 +16,6 @@ #include "codegen_ops_mmx_pack.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); #define ropPpack(func) \ uint32_t rop##func(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), \ uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \ @@ -38,9 +37,6 @@ extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uop_##func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \ } \ \ - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); \ - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); \ - uop_CALL_FUNC(ir, codegen_print_mmx); \ return op_pc + 1; \ } diff --git a/src/codegen_new/codegen_ops_mmx_shift.c b/src/codegen_new/codegen_ops_mmx_shift.c index e6c6da410..b812a9bb2 100644 --- a/src/codegen_new/codegen_ops_mmx_shift.c +++ b/src/codegen_new/codegen_ops_mmx_shift.c @@ -16,7 +16,6 @@ #include "codegen_ops_mmx_shift.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, UNUSED(uint32_t op_32), uint32_t op_pc) { @@ -40,9 +39,6 @@ ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } @@ -69,9 +65,6 @@ ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } @@ -98,9 +91,6 @@ ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t return 0; } - uop_LOAD_FUNC_ARG_IMM(ir, 0, (uintptr_t)__func__); - uop_LOAD_FUNC_ARG_IMM(ir, 1, fetchdat); - uop_CALL_FUNC(ir, codegen_print_mmx); codegen_mark_code_present(block, cs + op_pc + 1, 1); return op_pc + 2; } diff --git a/src/codegen_new/codegen_reg.c b/src/codegen_new/codegen_reg.c index f91377df8..b678bd6ac 100644 --- a/src/codegen_new/codegen_reg.c +++ b/src/codegen_new/codegen_reg.c @@ -201,7 +201,7 @@ static const uint8_t native_requested_sizes[9][8] = [REG_DOUBLE][IREG_SIZE_Q >> IREG_SIZE_SHIFT] = 1, [REG_FPU_ST_DOUBLE][IREG_SIZE_Q >> IREG_SIZE_SHIFT] = 1, - [REG_POINTER][(sizeof(void *) == 4) ? (IREG_SIZE_L >> IREG_SIZE_SHIFT) : (IREG_SIZE_Q >> IREG_SIZE_SHIFT)] = 1 + [REG_POINTER][IREG_SIZE_Q >> IREG_SIZE_SHIFT] = 1 }; void From 0a22140c709736bd22826598790ec45c649cd04f Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 15:56:00 +0000 Subject: [PATCH 11/14] Try for some fixes --- src/codegen_new/codegen.c | 15 +++------------ src/codegen_new/codegen_ir.c | 1 + src/codegen_new/codegen_ops_helpers.h | 1 - 3 files changed, 4 insertions(+), 13 deletions(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 48d2afad9..bffa6b513 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -30,12 +30,6 @@ static struct { int TOP; } codegen_instructions[MAX_INSTRUCTION_COUNT]; -void -codegen_print_mmx(const char* str, uint32_t fetchdat) -{ - pclog("MMX results: %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX, %016llX (%s, fetchdat 0x%08X)\n", (unsigned long long)cpu_state.MM[0].q, (unsigned long long)cpu_state.MM[1].q, (unsigned long long)cpu_state.MM[2].q, (unsigned long long)cpu_state.MM[3].q, (unsigned long long)cpu_state.MM[4].q, (unsigned long long)cpu_state.MM[5].q, (unsigned long long)cpu_state.MM[6].q, (unsigned long long)cpu_state.MM[7].q, str, fetchdat); -} - int codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP) { @@ -746,12 +740,9 @@ codegen_skip: else uop_MOV_IMM(ir, IREG_pc, op_pc + pc_off); uop_MOV_IMM(ir, IREG_oldpc, old_pc); - if (op_32 != last_op_32) - uop_MOV_IMM(ir, IREG_op32, op_32); - if (op_ea_seg != last_op_ea_seg) - uop_MOV_PTR(ir, IREG_ea_seg, (void *) op_ea_seg); - if (op_ssegs != last_op_ssegs) - uop_MOV_IMM(ir, IREG_ssegs, op_ssegs); + uop_MOV_IMM(ir, IREG_op32, op_32); + uop_MOV_PTR(ir, IREG_ea_seg, (void *) op_ea_seg); + uop_MOV_IMM(ir, IREG_ssegs, op_ssegs); uop_CALL_INSTRUCTION_FUNC(ir, op, fetchdat); codegen_flags_changed = 0; codegen_mark_code_present(block, cs + cpu_state.pc, 8); diff --git a/src/codegen_new/codegen_ir.c b/src/codegen_new/codegen_ir.c index d14fa0f23..dfd136289 100644 --- a/src/codegen_new/codegen_ir.c +++ b/src/codegen_new/codegen_ir.c @@ -53,6 +53,7 @@ duplicate_uop(ir_data_t *ir, uop_t *uop, int offset) new_uop->imm_data = uop->imm_data; new_uop->p = uop->p; new_uop->pc = uop->pc; + new_uop->is_a16 = uop->is_a16; if (uop->jump_dest_uop != -1) { new_uop->jump_dest_uop = uop->jump_dest_uop + offset; diff --git a/src/codegen_new/codegen_ops_helpers.h b/src/codegen_new/codegen_ops_helpers.h index 0128e15ae..92b721099 100644 --- a/src/codegen_new/codegen_ops_helpers.h +++ b/src/codegen_new/codegen_ops_helpers.h @@ -114,7 +114,6 @@ int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, static inline int codegen_can_unroll(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr) { - return 0; if (block->flags & CODEBLOCK_BYTE_MASK) return 0; From 7ac4b8de3a97b9dd7cdbbcf4bd7b613d5f5846f1 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 17:39:22 +0000 Subject: [PATCH 12/14] Revert some changes --- src/codegen_new/codegen.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index bffa6b513..875dd72ca 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -740,9 +740,12 @@ codegen_skip: else uop_MOV_IMM(ir, IREG_pc, op_pc + pc_off); uop_MOV_IMM(ir, IREG_oldpc, old_pc); - uop_MOV_IMM(ir, IREG_op32, op_32); - uop_MOV_PTR(ir, IREG_ea_seg, (void *) op_ea_seg); - uop_MOV_IMM(ir, IREG_ssegs, op_ssegs); + if (op_32 != last_op_32) + uop_MOV_IMM(ir, IREG_op32, op_32); + if (op_ea_seg != last_op_ea_seg) + uop_MOV_PTR(ir, IREG_ea_seg, (void *) op_ea_seg); + if (op_ssegs != last_op_ssegs) + uop_MOV_IMM(ir, IREG_ssegs, op_ssegs); uop_CALL_INSTRUCTION_FUNC(ir, op, fetchdat); codegen_flags_changed = 0; codegen_mark_code_present(block, cs + cpu_state.pc, 8); From fed75595da92648752baf2af5bc70a74c75c8dc8 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 19:09:06 +0000 Subject: [PATCH 13/14] Disable unrolling optimizations on ARM64 --- src/codegen_new/codegen_ops_helpers.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/codegen_new/codegen_ops_helpers.h b/src/codegen_new/codegen_ops_helpers.h index 92b721099..61711d1ed 100644 --- a/src/codegen_new/codegen_ops_helpers.h +++ b/src/codegen_new/codegen_ops_helpers.h @@ -114,6 +114,10 @@ int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, static inline int codegen_can_unroll(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr) { + /* TODO: Re-enable this again after fixing mysterious crashes on ARM64. */ +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 + return 0; +#endif if (block->flags & CODEBLOCK_BYTE_MASK) return 0; From cc7ca6c65226ae7dd07e6d009d34699107ca1e79 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 15 Sep 2025 19:13:51 +0000 Subject: [PATCH 14/14] Cleanups --- src/codegen_new/codegen_backend_arm64_uops.c | 4 ---- src/codegen_new/codegen_ops.c | 8 ++++++++ src/codegen_new/codegen_ops_helpers.h | 2 +- src/codegen_new/codegen_ops_mmx_loadstore.c | 2 -- src/codegen_new/codegen_ops_mmx_logic.c | 1 - 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index c4923387c..d06685cb2 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -1484,10 +1484,6 @@ codegen_PACKUSWB(codeblock_t *block, uop_t *uop) host_arm64_INS_D(block, REG_V_TEMP, dest_reg, 0, 0); host_arm64_INS_D(block, REG_V_TEMP, src_reg_b, 1, 0); host_arm64_SQXTUN_V8B_8H(block, dest_reg, REG_V_TEMP); - //host_arm64_ADD_V4H(block, dest_reg, dest_reg, src_reg_b); - //host_arm64_SQXTUN_V8B_8H(block, REG_V_TEMP, src_reg_b); - //host_arm64_SQXTUN_V8B_8H(block, dest_reg, dest_reg); - //host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP); } else fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real); diff --git a/src/codegen_new/codegen_ops.c b/src/codegen_new/codegen_ops.c index 039e0877a..68861ff52 100644 --- a/src/codegen_new/codegen_ops.c +++ b/src/codegen_new/codegen_ops.c @@ -97,7 +97,11 @@ RecompOpFn recomp_opcodes_0f[512] = { /*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN, /*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR, +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, +#else /*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, +#endif /*32-bit data*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -119,7 +123,11 @@ RecompOpFn recomp_opcodes_0f[512] = { /*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN, /*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR, +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, +#else /*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL, +#endif // clang-format on }; diff --git a/src/codegen_new/codegen_ops_helpers.h b/src/codegen_new/codegen_ops_helpers.h index 61711d1ed..05928bd2f 100644 --- a/src/codegen_new/codegen_ops_helpers.h +++ b/src/codegen_new/codegen_ops_helpers.h @@ -114,7 +114,7 @@ int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, static inline int codegen_can_unroll(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr) { - /* TODO: Re-enable this again after fixing mysterious crashes on ARM64. */ + /* TODO: Re-enable this again after fixing mysterious crashes on ARM64 with MMX instructions used. */ #if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 return 0; #endif diff --git a/src/codegen_new/codegen_ops_mmx_loadstore.c b/src/codegen_new/codegen_ops_mmx_loadstore.c index e46af7e44..9d37228ec 100644 --- a/src/codegen_new/codegen_ops_mmx_loadstore.c +++ b/src/codegen_new/codegen_ops_mmx_loadstore.c @@ -16,8 +16,6 @@ #include "codegen_ops_mmx_loadstore.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); - uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) { diff --git a/src/codegen_new/codegen_ops_mmx_logic.c b/src/codegen_new/codegen_ops_mmx_logic.c index dec8d8c04..dd50b486e 100644 --- a/src/codegen_new/codegen_ops_mmx_logic.c +++ b/src/codegen_new/codegen_ops_mmx_logic.c @@ -16,7 +16,6 @@ #include "codegen_ops_mmx_logic.h" #include "codegen_ops_helpers.h" -extern void codegen_print_mmx(const char* str, uint32_t fetchdat); uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, UNUSED(uint8_t opcode), uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) {