8514/A compatible changes of the day (March 6th, 2025)
1. Follow the Mach32 manual more closely regarding vblank support. 2. The subsystem status now takes account of the other bits more accurately. 3. The Mach32 PCI, when used with the ATI 68860 ramdac, has its own bpp's when in accelerator mode, separate from the VGA compatible side, so fix this accordingly. 4. Reset the vram when a mapping change occurs, should clear the messups in the ATI Mach8/32 accel video mode tests.
This commit is contained in:
@@ -715,27 +715,13 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len)
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break;
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case 0x42e8:
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if (val & 0x01)
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dev->subsys_stat &= ~0x01;
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if (val & 0x02)
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dev->subsys_stat &= ~0x02;
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if (val & 0x04)
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dev->subsys_stat &= ~0x04;
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if (val & 0x08)
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dev->subsys_stat &= ~0x08;
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ibm8514_log("VBLANK stat=%02x, val=%02x.\n", dev->subsys_stat, val);
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dev->subsys_cntl = (dev->subsys_cntl & 0xff00) | val;
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dev->subsys_stat &= ~val;
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break;
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case 0x42e9:
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dev->subsys_cntl = val;
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if (val & 0x01)
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dev->subsys_stat |= 0x01;
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if (val & 0x02)
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dev->subsys_stat |= 0x02;
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if (val & 0x04)
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dev->subsys_stat |= 0x04;
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if (val & 0x08)
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dev->subsys_stat |= 0x08;
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if ((val & 0xc0) == 0xc0) {
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dev->subsys_cntl = (dev->subsys_cntl & 0xff) | (val << 8);
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if ((val & 0xc0) == 0x80) {
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dev->fifo_idx = 0;
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dev->force_busy = 0;
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dev->force_busy2 = 0;
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@@ -882,10 +868,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
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switch (port) {
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case 0x2e8:
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if (dev->vc == dev->v_syncstart)
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if (dev->vc == dev->dispend)
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temp |= 0x02;
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ibm8514_log("0x2E8 read: Display Status=%02x.\n", temp);
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ibm8514_log("Read: Display Status1=%02x.\n", temp);
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break;
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case 0x6e8:
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@@ -910,21 +896,25 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
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case 0x42e8:
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case 0x42e9:
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if (dev->vc == dev->v_syncstart)
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dev->subsys_stat |= 0x01;
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if ((dev->subsys_cntl & 0x01) && !(dev->subsys_stat & 0x01) && (dev->vc == dev->dispend))
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temp |= 0x01;
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if (cmd == 6) {
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if ((dev->accel.dx >= clip_l) &&
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if ((dev->subsys_cntl & 0x02) &&
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!(dev->subsys_stat & 0x02) &&
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(dev->accel.dx >= clip_l) &&
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(dev->accel.dx <= clip_r_ibm) &&
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(dev->accel.dy >= clip_t) &&
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(dev->accel.dy <= clip_b_ibm))
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dev->subsys_stat |= 0x02;
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temp |= 0x02;
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} else {
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if ((dev->accel.cx >= clip_l) &&
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if ((dev->subsys_cntl & 0x02) &&
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!(dev->subsys_stat & 0x02) &&
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(dev->accel.cx >= clip_l) &&
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(dev->accel.cx <= clip_r_ibm) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b_ibm))
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dev->subsys_stat |= 0x02;
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temp |= 0x02;
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}
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if (!dev->fifo_idx) {
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@@ -932,9 +922,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
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temp |= 0x08;
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}
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if (port & 1)
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if (port & 1) {
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temp = dev->vram_512k_8514 ? 0x00 : 0x80;
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else {
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temp |= (dev->subsys_cntl >> 8);
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} else {
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temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
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temp |= 0x20;
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}
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@@ -1155,6 +1146,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -1250,6 +1242,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -1385,6 +1378,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
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mix_dat = mix_mask; /* Mix data = forced to foreground register. */
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} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
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@@ -1543,6 +1537,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (ibm8514_cpu_dest(svga)) {
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READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
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} else
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@@ -1634,6 +1629,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
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mix_dat = mix_mask; /* Mix data = forced to foreground register. */
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} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
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@@ -1832,6 +1828,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -1989,6 +1986,7 @@ skip_vector_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
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mix_dat = mix_mask; /* Mix data = forced to foreground register. */
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} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
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@@ -2150,6 +2148,7 @@ skip_nibble_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2232,6 +2231,7 @@ skip_nibble_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2313,6 +2313,7 @@ skip_nibble_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2424,6 +2425,7 @@ skip_nibble_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2546,6 +2548,7 @@ skip_nibble_rect_write:
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2650,9 +2653,10 @@ skip_nibble_rect_write:
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dev->accel.cx = CLAMP(dev->accel.cx, clip_l, clip_r);
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if ((dev->accel.cx >= clip_l) &&
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(dev->accel.cx < clip_r) &&
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(dev->accel.cx <= clip_r) &&
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(dev->accel.cy >= clip_t) &&
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(dev->accel.cy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -2811,6 +2815,7 @@ skip_nibble_rect_write:
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(dev->accel.dx <= clip_r) &&
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(dev->accel.dy >= clip_t) &&
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(dev->accel.dy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (pixcntl == 3) {
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if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
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READ(dev->accel.src + dev->accel.cx, mix_dat);
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@@ -2978,6 +2983,7 @@ skip_nibble_bitblt_write:
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(dev->accel.dx <= clip_r) &&
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(dev->accel.dy >= clip_t) &&
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(dev->accel.dy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -3075,6 +3081,7 @@ skip_nibble_bitblt_write:
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(dev->accel.dx <= clip_r) &&
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(dev->accel.dy >= clip_t) &&
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(dev->accel.dy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
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case 0:
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src_dat = bkgd_color;
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@@ -3174,6 +3181,7 @@ skip_nibble_bitblt_write:
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(dx <= (((uint64_t)clip_r) * 3)) &&
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(dev->accel.dy >= (clip_t << 1)) &&
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(dev->accel.dy <= (clip_b << 1))) {
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dev->subsys_stat |= 0x02;
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READ(dev->accel.src + cx, src_dat);
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READ(dev->accel.dest + dx, dest_dat);
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@@ -3196,6 +3204,7 @@ skip_nibble_bitblt_write:
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(dev->accel.dx <= clip_r) &&
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(dev->accel.dy >= clip_t) &&
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(dev->accel.dy <= clip_b)) {
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dev->subsys_stat |= 0x02;
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if (pixcntl == 3) {
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if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
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READ(dev->accel.src + dev->accel.cx, mix_dat);
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@@ -3704,6 +3713,8 @@ ibm8514_poll(void *priv)
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dev->vc &= 0xfff;
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if (dev->vc == dev->dispend) {
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dev->subsys_stat |= 0x01;
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ibm8514_log("VBLANK irq.\n");
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dev->dispon = 0;
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for (x = 0; x < ((dev->vram_mask + 1) >> 12); x++) {
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