Clang-formatting in src/cpu
This commit is contained in:
@@ -46,10 +46,10 @@ opSYSEXIT(uint32_t fetchdat)
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static int
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sf_fx_save_stor_common(uint32_t fetchdat, int bits)
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{
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uint8_t fxinst = 0;
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uint32_t tag_byte;
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unsigned index;
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floatx80 reg;
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uint8_t fxinst = 0;
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uint32_t tag_byte;
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unsigned index;
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floatx80 reg;
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if (CPUID < 0x650)
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return ILLEGAL(fetchdat);
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@@ -129,33 +129,33 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
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/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
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writememw(easeg, cpu_state.eaaddr + 6, fpu_state.foo);
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/*
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* x87 FPU IP Offset (32/64 bits)
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* The contents of this field differ depending on the current
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* addressing mode (16/32/64 bit) when the FXSAVE instruction was executed:
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* + 64-bit mode - 64-bit IP offset
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* + 32-bit mode - 32-bit IP offset
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* + 16-bit mode - low 16 bits are IP offset; high 16 bits are reserved.
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* x87 CS FPU IP Selector
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* + 16 bit, in 16/32 bit mode only
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*/
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/*
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* x87 FPU IP Offset (32/64 bits)
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* The contents of this field differ depending on the current
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* addressing mode (16/32/64 bit) when the FXSAVE instruction was executed:
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* + 64-bit mode - 64-bit IP offset
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* + 32-bit mode - 32-bit IP offset
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* + 16-bit mode - low 16 bits are IP offset; high 16 bits are reserved.
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* x87 CS FPU IP Selector
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* + 16 bit, in 16/32 bit mode only
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*/
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writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip);
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writememl(easeg, cpu_state.eaaddr + 12, fpu_state.fcs);
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/*
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* x87 FPU Instruction Operand (Data) Pointer Offset (32/64 bits)
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* The contents of this field differ depending on the current
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* addressing mode (16/32 bit) when the FXSAVE instruction was executed:
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* + 64-bit mode - 64-bit offset
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* + 32-bit mode - 32-bit offset
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* + 16-bit mode - low 16 bits are offset; high 16 bits are reserved.
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* x87 DS FPU Instruction Operand (Data) Pointer Selector
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* + 16 bit, in 16/32 bit mode only
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*/
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/*
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* x87 FPU Instruction Operand (Data) Pointer Offset (32/64 bits)
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* The contents of this field differ depending on the current
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* addressing mode (16/32 bit) when the FXSAVE instruction was executed:
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* + 64-bit mode - 64-bit offset
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* + 32-bit mode - 32-bit offset
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* + 16-bit mode - low 16 bits are offset; high 16 bits are reserved.
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* x87 DS FPU Instruction Operand (Data) Pointer Selector
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* + 16 bit, in 16/32 bit mode only
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*/
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writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp);
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writememl(easeg, cpu_state.eaaddr + 20, fpu_state.fds);
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/* store i387 register file */
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/* store i387 register file */
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for (index = 0; index < 8; index++) {
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const floatx80 fp = FPU_read_regi(index);
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@@ -172,72 +172,72 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
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static int
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fx_save_stor_common(uint32_t fetchdat, int bits)
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{
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uint8_t fxinst = 0;
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uint16_t twd = x87_gettag();
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uint32_t old_eaaddr = 0;
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uint8_t ftwb = 0;
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uint16_t rec_ftw = 0;
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uint16_t fpus = 0;
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int i;
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int mmx_tags = 0;
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uint16_t exp = 0x0000;
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uint64_t mant = 0x0000000000000000ULL;
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uint64_t fraction;
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uint8_t jm;
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uint8_t valid;
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/* Exp_all_1 Exp_all_0 Frac_all_0 J M FTW_Valid | Ent
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----------------------------------------------+------ */
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uint8_t ftw_table_idx;
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uint8_t ftw_table[48] = { 0x03, /* 0 0 0 0 0 0 | 0x00 */
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0x02, /* 0 0 0 0 0 1 | 0x01 */
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0x03, /* 0 0 0 0 0 0 | 0x02 */
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0x02, /* 0 0 0 0 1 1 | 0x03 */
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0x03, /* 0 0 0 1 0 0 | 0x04 */
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0x00, /* 0 0 0 1 0 1 | 0x05 */
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0x03, /* 0 0 0 1 1 0 | 0x06 */
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0x00, /* 0 0 0 1 1 1 | 0x07 */
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0x03, /* 0 0 1 0 0 0 | 0x08 */
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0x02, /* 0 0 1 0 0 1 | 0x09 */
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0x03, /* 0 0 1 0 1 0 | 0x0a - Impossible */
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0x03, /* 0 0 1 0 1 1 | 0x0b - Impossible */
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0x03, /* 0 0 1 1 0 0 | 0x0c */
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0x02, /* 0 0 1 1 0 1 | 0x0d */
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0x03, /* 0 0 1 1 1 0 | 0x0e - Impossible */
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0x03, /* 0 0 1 1 1 1 | 0x0f - Impossible */
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0x03, /* 0 1 0 0 0 0 | 0x10 */
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0x02, /* 0 1 0 0 0 1 | 0x11 */
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0x03, /* 0 1 0 0 1 0 | 0x12 */
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0x02, /* 0 1 0 0 1 1 | 0x13 */
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0x03, /* 0 1 0 1 0 0 | 0x14 */
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0x02, /* 0 1 0 1 0 1 | 0x15 */
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0x03, /* 0 1 0 1 1 0 | 0x16 */
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0x02, /* 0 1 0 1 1 1 | 0x17 */
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0x03, /* 0 1 1 0 0 0 | 0x18 */
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0x01, /* 0 1 1 0 0 1 | 0x19 */
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0x03, /* 0 1 1 0 1 0 | 0x1a - Impossible */
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0x03, /* 0 1 1 0 1 1 | 0x1b - Impossible */
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0x03, /* 0 1 1 1 0 0 | 0x1c */
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0x01, /* 0 1 1 1 0 1 | 0x1d */
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0x03, /* 0 1 1 1 1 0 | 0x1e - Impossible */
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0x03, /* 0 1 1 1 1 1 | 0x1f - Impossible */
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0x03, /* 1 0 0 0 0 0 | 0x20 */
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0x02, /* 1 0 0 0 0 1 | 0x21 */
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0x03, /* 1 0 0 0 1 0 | 0x22 */
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0x02, /* 1 0 0 0 1 1 | 0x23 */
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0x03, /* 1 0 0 1 0 0 | 0x24 */
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0x02, /* 1 0 0 1 0 1 | 0x25 */
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0x03, /* 1 0 0 1 1 0 | 0x26 */
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0x02, /* 1 0 0 1 1 1 | 0x27 */
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0x03, /* 1 0 1 0 0 0 | 0x28 */
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0x02, /* 1 0 1 0 0 1 | 0x29 */
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0x03, /* 1 0 1 0 1 0 | 0x2a - Impossible */
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0x03, /* 1 0 1 0 1 1 | 0x2b - Impossible */
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0x03, /* 1 0 1 1 0 0 | 0x2c */
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0x02, /* 1 0 1 1 0 1 | 0x2d */
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0x03, /* 1 0 1 1 1 0 | 0x2e - Impossible */
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0x03 }; /* 1 0 1 1 1 1 | 0x2f - Impossible */
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/* M is the most significant bit of the franction, so it is impossible
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for M to o be 1 when the fraction is all 0's. */
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uint8_t fxinst = 0;
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uint16_t twd = x87_gettag();
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uint32_t old_eaaddr = 0;
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uint8_t ftwb = 0;
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uint16_t rec_ftw = 0;
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uint16_t fpus = 0;
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int i;
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int mmx_tags = 0;
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uint16_t exp = 0x0000;
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uint64_t mant = 0x0000000000000000ULL;
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uint64_t fraction;
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uint8_t jm;
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uint8_t valid;
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/* Exp_all_1 Exp_all_0 Frac_all_0 J M FTW_Valid | Ent
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----------------------------------------------+------ */
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uint8_t ftw_table_idx;
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uint8_t ftw_table[48] = { 0x03, /* 0 0 0 0 0 0 | 0x00 */
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0x02, /* 0 0 0 0 0 1 | 0x01 */
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0x03, /* 0 0 0 0 0 0 | 0x02 */
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0x02, /* 0 0 0 0 1 1 | 0x03 */
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0x03, /* 0 0 0 1 0 0 | 0x04 */
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0x00, /* 0 0 0 1 0 1 | 0x05 */
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0x03, /* 0 0 0 1 1 0 | 0x06 */
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0x00, /* 0 0 0 1 1 1 | 0x07 */
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0x03, /* 0 0 1 0 0 0 | 0x08 */
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0x02, /* 0 0 1 0 0 1 | 0x09 */
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0x03, /* 0 0 1 0 1 0 | 0x0a - Impossible */
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0x03, /* 0 0 1 0 1 1 | 0x0b - Impossible */
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0x03, /* 0 0 1 1 0 0 | 0x0c */
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0x02, /* 0 0 1 1 0 1 | 0x0d */
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0x03, /* 0 0 1 1 1 0 | 0x0e - Impossible */
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0x03, /* 0 0 1 1 1 1 | 0x0f - Impossible */
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0x03, /* 0 1 0 0 0 0 | 0x10 */
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0x02, /* 0 1 0 0 0 1 | 0x11 */
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0x03, /* 0 1 0 0 1 0 | 0x12 */
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0x02, /* 0 1 0 0 1 1 | 0x13 */
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0x03, /* 0 1 0 1 0 0 | 0x14 */
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0x02, /* 0 1 0 1 0 1 | 0x15 */
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0x03, /* 0 1 0 1 1 0 | 0x16 */
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0x02, /* 0 1 0 1 1 1 | 0x17 */
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0x03, /* 0 1 1 0 0 0 | 0x18 */
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0x01, /* 0 1 1 0 0 1 | 0x19 */
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0x03, /* 0 1 1 0 1 0 | 0x1a - Impossible */
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0x03, /* 0 1 1 0 1 1 | 0x1b - Impossible */
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0x03, /* 0 1 1 1 0 0 | 0x1c */
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0x01, /* 0 1 1 1 0 1 | 0x1d */
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0x03, /* 0 1 1 1 1 0 | 0x1e - Impossible */
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0x03, /* 0 1 1 1 1 1 | 0x1f - Impossible */
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0x03, /* 1 0 0 0 0 0 | 0x20 */
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0x02, /* 1 0 0 0 0 1 | 0x21 */
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0x03, /* 1 0 0 0 1 0 | 0x22 */
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0x02, /* 1 0 0 0 1 1 | 0x23 */
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0x03, /* 1 0 0 1 0 0 | 0x24 */
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0x02, /* 1 0 0 1 0 1 | 0x25 */
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0x03, /* 1 0 0 1 1 0 | 0x26 */
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0x02, /* 1 0 0 1 1 1 | 0x27 */
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0x03, /* 1 0 1 0 0 0 | 0x28 */
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0x02, /* 1 0 1 0 0 1 | 0x29 */
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0x03, /* 1 0 1 0 1 0 | 0x2a - Impossible */
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0x03, /* 1 0 1 0 1 1 | 0x2b - Impossible */
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0x03, /* 1 0 1 1 0 0 | 0x2c */
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0x02, /* 1 0 1 1 0 1 | 0x2d */
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0x03, /* 1 0 1 1 1 0 | 0x2e - Impossible */
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0x03 }; /* 1 0 1 1 1 1 | 0x2f - Impossible */
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/* M is the most significant bit of the franction, so it is impossible
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for M to o be 1 when the fraction is all 0's. */
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if (CPUID < 0x650)
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return ILLEGAL(fetchdat);
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@@ -287,11 +287,11 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
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for (i = 0; i <= 7; i++) {
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cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
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mant = readmemq(easeg, cpu_state.eaaddr);
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fraction = mant & 0x7fffffffffffffffULL;
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exp = readmemw(easeg, cpu_state.eaaddr + 8);
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jm = (mant >> 62) & 0x03;
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valid = !(ftwb & (1 << i));
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mant = readmemq(easeg, cpu_state.eaaddr);
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fraction = mant & 0x7fffffffffffffffULL;
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exp = readmemw(easeg, cpu_state.eaaddr + 8);
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jm = (mant >> 62) & 0x03;
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valid = !(ftwb & (1 << i));
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ftw_table_idx = (!!(exp == 0x1111)) << 5;
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ftw_table_idx |= (!!(exp == 0x0000)) << 4;
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@@ -381,7 +381,7 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
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static int
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opFXSAVESTOR_a16(uint32_t fetchdat)
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{
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if (fpu_softfloat)
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if (fpu_softfloat)
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return sf_fx_save_stor_common(fetchdat, 16);
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return fx_save_stor_common(fetchdat, 16);
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