Clang-formatting in src/cpu
This commit is contained in:
Jasmine Iwanek
167
src/cpu/x87.h
167
src/cpu/x87.h
@@ -16,9 +16,9 @@ x87_set_mmx(void)
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fpu_state.tag = 0;
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fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
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} else {
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cpu_state.TOP = 0;
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p = (uint64_t *) cpu_state.tag;
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*p = 0x0101010101010101ULL;
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cpu_state.TOP = 0;
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p = (uint64_t *) cpu_state.tag;
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*p = 0x0101010101010101ULL;
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}
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cpu_state.ismmx = 1;
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}
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@@ -31,8 +31,8 @@ x87_emms(void)
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fpu_state.tag = 0xffff;
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fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
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} else {
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p = (uint64_t *) cpu_state.tag;
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*p = 0;
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p = (uint64_t *) cpu_state.tag;
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*p = 0;
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}
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cpu_state.ismmx = 0;
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}
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@@ -60,81 +60,87 @@ void x87_settag(uint16_t new_tag);
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void codegen_set_rounding_mode(int mode);
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/* Status Word */
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#define FPU_SW_Backward (0x8000) /* backward compatibility */
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#define FPU_SW_C3 (0x4000) /* condition bit 3 */
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#define FPU_SW_Top (0x3800) /* top of stack */
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#define FPU_SW_C2 (0x0400) /* condition bit 2 */
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#define FPU_SW_C1 (0x0200) /* condition bit 1 */
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#define FPU_SW_C0 (0x0100) /* condition bit 0 */
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#define FPU_SW_Summary (0x0080) /* exception summary */
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#define FPU_SW_Stack_Fault (0x0040) /* stack fault */
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#define FPU_SW_Precision (0x0020) /* loss of precision */
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#define FPU_SW_Underflow (0x0010) /* underflow */
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#define FPU_SW_Overflow (0x0008) /* overflow */
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#define FPU_SW_Zero_Div (0x0004) /* divide by zero */
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#define FPU_SW_Denormal_Op (0x0002) /* denormalized operand */
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#define FPU_SW_Invalid (0x0001) /* invalid operation */
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#define FPU_SW_Backward (0x8000) /* backward compatibility */
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#define FPU_SW_C3 (0x4000) /* condition bit 3 */
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#define FPU_SW_Top (0x3800) /* top of stack */
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#define FPU_SW_C2 (0x0400) /* condition bit 2 */
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#define FPU_SW_C1 (0x0200) /* condition bit 1 */
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#define FPU_SW_C0 (0x0100) /* condition bit 0 */
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#define FPU_SW_Summary (0x0080) /* exception summary */
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#define FPU_SW_Stack_Fault (0x0040) /* stack fault */
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#define FPU_SW_Precision (0x0020) /* loss of precision */
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#define FPU_SW_Underflow (0x0010) /* underflow */
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#define FPU_SW_Overflow (0x0008) /* overflow */
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#define FPU_SW_Zero_Div (0x0004) /* divide by zero */
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#define FPU_SW_Denormal_Op (0x0002) /* denormalized operand */
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#define FPU_SW_Invalid (0x0001) /* invalid operation */
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#define C0 (1 << 8)
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#define C1 (1 << 9)
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#define C2 (1 << 10)
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#define C3 (1 << 14)
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#define C0 (1 << 8)
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#define C1 (1 << 9)
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#define C2 (1 << 10)
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#define C3 (1 << 14)
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#define FPU_SW_CC (C0 | C1 | C2 | C3)
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#define FPU_SW_CC (C0 | C1 | C2 | C3)
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#define FPU_SW_Exceptions_Mask (0x027f) /* status word exceptions bit mask */
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#define FPU_SW_Exceptions_Mask (0x027f) /* status word exceptions bit mask */
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/* Exception flags: */
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#define FPU_EX_Precision (0x0020) /* loss of precision */
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#define FPU_EX_Underflow (0x0010) /* underflow */
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#define FPU_EX_Overflow (0x0008) /* overflow */
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#define FPU_EX_Zero_Div (0x0004) /* divide by zero */
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#define FPU_EX_Denormal (0x0002) /* denormalized operand */
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#define FPU_EX_Invalid (0x0001) /* invalid operation */
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#define FPU_EX_Precision (0x0020) /* loss of precision */
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#define FPU_EX_Underflow (0x0010) /* underflow */
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#define FPU_EX_Overflow (0x0008) /* overflow */
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#define FPU_EX_Zero_Div (0x0004) /* divide by zero */
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#define FPU_EX_Denormal (0x0002) /* denormalized operand */
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#define FPU_EX_Invalid (0x0001) /* invalid operation */
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/* Special exceptions: */
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#define FPU_EX_Stack_Overflow (0x0041| C1) /* stack overflow */
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#define FPU_EX_Stack_Underflow (0x0041) /* stack underflow */
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#define FPU_EX_Stack_Overflow (0x0041 | C1) /* stack overflow */
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#define FPU_EX_Stack_Underflow (0x0041) /* stack underflow */
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/* precision control */
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#define FPU_EX_Precision_Lost_Up (EX_Precision | C1)
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#define FPU_EX_Precision_Lost_Dn (EX_Precision)
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#define FPU_EX_Precision_Lost_Up (EX_Precision | C1)
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#define FPU_EX_Precision_Lost_Dn (EX_Precision)
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#define setcc(cc) \
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fpu_state.swd = (fpu_state.swd & ~(FPU_SW_CC)) | ((cc) & FPU_SW_CC)
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#define setcc(cc) \
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fpu_state.swd = (fpu_state.swd & ~(FPU_SW_CC)) | ((cc) &FPU_SW_CC)
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#define clear_C1() { fpu_state.swd &= ~C1; }
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#define clear_C2() { fpu_state.swd &= ~C2; }
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#define clear_C1() \
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{ \
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fpu_state.swd &= ~C1; \
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}
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#define clear_C2() \
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{ \
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fpu_state.swd &= ~C2; \
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}
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/* ************ */
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/* Control Word */
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/* ************ */
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#define FPU_CW_Inf (0x1000) /* infinity control, legacy */
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#define FPU_CW_Inf (0x1000) /* infinity control, legacy */
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#define FPU_CW_RC (0x0C00) /* rounding control */
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#define FPU_CW_PC (0x0300) /* precision control */
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#define FPU_CW_RC (0x0C00) /* rounding control */
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#define FPU_CW_PC (0x0300) /* precision control */
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#define FPU_RC_RND (0x0000) /* rounding control */
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#define FPU_RC_DOWN (0x0400)
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#define FPU_RC_UP (0x0800)
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#define FPU_RC_CHOP (0x0C00)
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#define FPU_RC_RND (0x0000) /* rounding control */
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#define FPU_RC_DOWN (0x0400)
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#define FPU_RC_UP (0x0800)
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#define FPU_RC_CHOP (0x0C00)
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#define FPU_CW_Precision (0x0020) /* loss of precision mask */
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#define FPU_CW_Underflow (0x0010) /* underflow mask */
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#define FPU_CW_Overflow (0x0008) /* overflow mask */
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#define FPU_CW_Zero_Div (0x0004) /* divide by zero mask */
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#define FPU_CW_Denormal (0x0002) /* denormalized operand mask */
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#define FPU_CW_Invalid (0x0001) /* invalid operation mask */
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#define FPU_CW_Precision (0x0020) /* loss of precision mask */
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#define FPU_CW_Underflow (0x0010) /* underflow mask */
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#define FPU_CW_Overflow (0x0008) /* overflow mask */
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#define FPU_CW_Zero_Div (0x0004) /* divide by zero mask */
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#define FPU_CW_Denormal (0x0002) /* denormalized operand mask */
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#define FPU_CW_Invalid (0x0001) /* invalid operation mask */
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#define FPU_CW_Exceptions_Mask (0x003f) /* all masks */
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#define FPU_CW_Exceptions_Mask (0x003f) /* all masks */
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/* Precision control bits affect only the following:
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ADD, SUB(R), MUL, DIV(R), and SQRT */
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#define FPU_PR_32_BITS (0x000)
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#define FPU_PR_RESERVED_BITS (0x100)
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#define FPU_PR_64_BITS (0x200)
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#define FPU_PR_80_BITS (0x300)
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#define FPU_PR_32_BITS (0x000)
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#define FPU_PR_RESERVED_BITS (0x100)
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#define FPU_PR_64_BITS (0x200)
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#define FPU_PR_80_BITS (0x300)
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#include "softfloat/softfloatx80.h"
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@@ -145,16 +151,16 @@ is_IA_masked(void)
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}
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struct float_status_t i387cw_to_softfloat_status_word(uint16_t control_word);
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uint16_t FPU_exception(uint32_t fetchdat, uint16_t exceptions, int store);
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int FPU_status_word_flags_fpu_compare(int float_relation);
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void FPU_write_eflags_fpu_compare(int float_relation);
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void FPU_stack_overflow(uint32_t fetchdat);
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void FPU_stack_underflow(uint32_t fetchdat, int stnr, int pop_stack);
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int FPU_handle_NaN32(floatx80 a, float32 b, floatx80 *r, struct float_status_t *status);
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int FPU_handle_NaN64(floatx80 a, float64 b, floatx80 *r, struct float_status_t *status);
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int FPU_tagof(const floatx80 reg);
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uint8_t pack_FPU_TW(uint16_t twd);
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uint16_t unpack_FPU_TW(uint16_t tag_byte);
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uint16_t FPU_exception(uint32_t fetchdat, uint16_t exceptions, int store);
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int FPU_status_word_flags_fpu_compare(int float_relation);
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void FPU_write_eflags_fpu_compare(int float_relation);
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void FPU_stack_overflow(uint32_t fetchdat);
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void FPU_stack_underflow(uint32_t fetchdat, int stnr, int pop_stack);
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int FPU_handle_NaN32(floatx80 a, float32 b, floatx80 *r, struct float_status_t *status);
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int FPU_handle_NaN64(floatx80 a, float64 b, floatx80 *r, struct float_status_t *status);
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int FPU_tagof(const floatx80 reg);
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uint8_t pack_FPU_TW(uint16_t twd);
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uint16_t unpack_FPU_TW(uint16_t tag_byte);
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static __inline uint16_t
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i387_get_control_word(void)
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@@ -181,7 +187,7 @@ static __inline void
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FPU_settagi_valid(int stnr)
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{
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int regnr = (stnr + fpu_state.tos) & 7;
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fpu_state.tag &= ~(3 << (regnr * 2)); // FPU_Tag_Valid == '00
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fpu_state.tag &= ~(3 << (regnr * 2)); // FPU_Tag_Valid == '00
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}
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static __inline void
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@@ -228,16 +234,15 @@ FPU_save_regi_tag(floatx80 reg, int tag, int stnr)
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FPU_settagi(tag, stnr);
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}
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#define FPU_check_pending_exceptions() \
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do { \
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if (fpu_state.swd & FPU_SW_Summary) { \
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if (cr0 & 0x20) { \
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x86_int(16); \
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return 1; \
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} else { \
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picint(1 << 13); \
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return 1; \
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} \
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} \
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} while (0)
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#define FPU_check_pending_exceptions() \
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do { \
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if (fpu_state.swd & FPU_SW_Summary) { \
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if (cr0 & 0x20) { \
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x86_int(16); \
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return 1; \
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} else { \
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picint(1 << 13); \
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return 1; \
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} \
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} \
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} while (0)
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