Only flush write MMU cache on WP flag toggle as read and execute MMU cache is not affected by the flag.
This commit is contained in:
@@ -184,7 +184,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
fetch_ea_16(fetchdat);
|
||||
switch (cpu_reg) {
|
||||
case 0:
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
|
||||
flushmmucache();
|
||||
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
|
||||
if (is_p6 || cpu_use_dynarec)
|
||||
@@ -193,7 +193,8 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
flushmmucache_nopc();
|
||||
cpu_flush_pending = 1;
|
||||
}
|
||||
}
|
||||
} else if ((cpu_state.regs[cpu_rm].l ^ cr0) & WP_FLAG)
|
||||
flushmmucache_write();
|
||||
/* Make sure CPL = 0 when switching from real mode to protected mode. */
|
||||
if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
|
||||
cpu_state.seg_cs.access &= 0x9f;
|
||||
@@ -249,7 +250,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
|
||||
fetch_ea_32(fetchdat);
|
||||
switch (cpu_reg) {
|
||||
case 0:
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
|
||||
flushmmucache();
|
||||
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
|
||||
if (is_p6 || cpu_use_dynarec)
|
||||
@@ -258,7 +259,8 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
|
||||
flushmmucache_nopc();
|
||||
cpu_flush_pending = 1;
|
||||
}
|
||||
}
|
||||
} else if ((cpu_state.regs[cpu_rm].l ^ cr0) & WP_FLAG)
|
||||
flushmmucache_write();
|
||||
/* Make sure CPL = 0 when switching from real mode to protected mode. */
|
||||
if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
|
||||
cpu_state.seg_cs.access &= 0x9f;
|
||||
|
||||
@@ -180,12 +180,13 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
fetch_ea_16(fetchdat);
|
||||
switch (cpu_reg) {
|
||||
case 0:
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
|
||||
flushmmucache();
|
||||
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
|
||||
flushmmucache_nopc();
|
||||
cpu_flush_pending = 1;
|
||||
}
|
||||
} else if ((cpu_state.regs[cpu_rm].l ^ cr0) & WP_FLAG)
|
||||
flushmmucache_write();
|
||||
/* Make sure CPL = 0 when switching from real mode to protected mode. */
|
||||
if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
|
||||
cpu_state.seg_cs.access &= 0x9f;
|
||||
@@ -241,12 +242,13 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
|
||||
fetch_ea_32(fetchdat);
|
||||
switch (cpu_reg) {
|
||||
case 0:
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
|
||||
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
|
||||
flushmmucache();
|
||||
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
|
||||
flushmmucache_nopc();
|
||||
cpu_flush_pending = 1;
|
||||
}
|
||||
} else if ((cpu_state.regs[cpu_rm].l ^ cr0) & WP_FLAG)
|
||||
flushmmucache_write();
|
||||
/* Make sure CPL = 0 when switching from real mode to protected mode. */
|
||||
if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
|
||||
cpu_state.seg_cs.access &= 0x9f;
|
||||
|
||||
Reference in New Issue
Block a user