Yet more clang-formatting
This commit is contained in:
@@ -60,43 +60,42 @@
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#include <86box/bswap.h>
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/* Maximum number of times we report a link down to the guest (failure to send frame) */
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#define ELNK_MAX_LINKDOWN_REPORTED 3
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#define ELNK_MAX_LINKDOWN_REPORTED 3
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/* Maximum number of times we postpone restoring a link that is temporarily down. */
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#define ELNK_MAX_LINKRST_POSTPONED 3
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#define ELNK_MAX_LINKRST_POSTPONED 3
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/* Maximum frame size we handle */
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#define MAX_FRAME 1536
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#define MAX_FRAME 1536
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/* Size of the packet buffer. */
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#define ELNK_BUF_SIZE 2048
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#define ELNK_BUF_SIZE 2048
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/* The packet buffer address mask. */
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#define ELNK_BUF_ADR_MASK (ELNK_BUF_SIZE - 1)
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#define ELNK_BUF_ADR_MASK (ELNK_BUF_SIZE - 1)
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/* The GP buffer pointer address within the buffer. */
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#define ELNK_GP(dev) (dev->uGPBufPtr & ELNK_BUF_ADR_MASK)
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#define ELNK_GP(dev) (dev->uGPBufPtr & ELNK_BUF_ADR_MASK)
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/* The GP buffer pointer mask.
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* NB: The GP buffer pointer is internally a 12-bit counter. When addressing into the
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* packet buffer, bit 11 is ignored. Required to pass 3C501 diagnostics.
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*/
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#define ELNK_GP_MASK 0xfff
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#define ELNK_GP_MASK 0xfff
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/*********************************************************************************************************************************
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* Structures and Typedefs *
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*********************************************************************************************************************************/
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* Structures and Typedefs *
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*********************************************************************************************************************************/
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/**
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* EtherLink Transmit Command Register.
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*/
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typedef struct ELNK_XMIT_CMD {
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uint8_t det_ufl : 1; /* Detect underflow. */
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uint8_t det_coll : 1; /* Detect collision. */
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uint8_t det_16col : 1; /* Detect collision 16. */
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uint8_t det_succ : 1; /* Detect successful xmit. */
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uint8_t unused : 4;
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uint8_t det_ufl : 1; /* Detect underflow. */
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uint8_t det_coll : 1; /* Detect collision. */
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uint8_t det_16col : 1; /* Detect collision 16. */
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uint8_t det_succ : 1; /* Detect successful xmit. */
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uint8_t unused : 4;
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} EL_XMT_CMD;
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/**
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@@ -107,151 +106,151 @@ typedef struct ELNK_XMIT_CMD {
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* (something the 3C501 does not have a concept of).
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*/
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typedef struct ELNK_XMIT_STAT {
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uint8_t uflow : 1; /* Underflow on transmit. */
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uint8_t coll : 1; /* Collision on transmit. */
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uint8_t coll16 : 1; /* 16 collisions on transmit. */
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uint8_t ready : 1; /* Ready for a new frame. */
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uint8_t undef : 4;
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uint8_t uflow : 1; /* Underflow on transmit. */
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uint8_t coll : 1; /* Collision on transmit. */
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uint8_t coll16 : 1; /* 16 collisions on transmit. */
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uint8_t ready : 1; /* Ready for a new frame. */
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uint8_t undef : 4;
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} EL_XMT_STAT;
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/** Address match (adr_match) modes. */
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typedef enum {
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EL_ADRM_DISABLED = 0, /* Receiver disabled. */
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EL_ADRM_PROMISC = 1, /* Receive all addresses. */
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EL_ADRM_BCAST = 2, /* Receive station + broadcast. */
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EL_ADRM_MCAST = 3 /* Receive station + multicast. */
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EL_ADRM_DISABLED = 0, /* Receiver disabled. */
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EL_ADRM_PROMISC = 1, /* Receive all addresses. */
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EL_ADRM_BCAST = 2, /* Receive station + broadcast. */
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EL_ADRM_MCAST = 3 /* Receive station + multicast. */
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} EL_ADDR_MATCH;
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/**
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* EtherLink Receive Command Register.
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*/
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typedef struct ELNK_RECV_CMD {
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uint8_t det_ofl : 1; /* Detect overflow errors. */
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uint8_t det_fcs : 1; /* Detect FCS errors. */
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uint8_t det_drbl : 1; /* Detect dribble error. */
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uint8_t det_runt : 1; /* Detect short frames. */
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uint8_t det_eof : 1; /* Detect EOF (frames without overflow). */
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uint8_t acpt_good : 1; /* Accept good frames. */
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uint8_t adr_match : 2; /* Address match mode. */
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uint8_t det_ofl : 1; /* Detect overflow errors. */
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uint8_t det_fcs : 1; /* Detect FCS errors. */
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uint8_t det_drbl : 1; /* Detect dribble error. */
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uint8_t det_runt : 1; /* Detect short frames. */
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uint8_t det_eof : 1; /* Detect EOF (frames without overflow). */
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uint8_t acpt_good : 1; /* Accept good frames. */
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uint8_t adr_match : 2; /* Address match mode. */
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} EL_RCV_CMD;
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/**
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* EtherLink Receive Status Register.
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*/
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typedef struct ELNK_RECV_STAT {
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uint8_t oflow : 1; /* Overflow on receive. */
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uint8_t fcs : 1; /* FCS error. */
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uint8_t dribble : 1; /* Dribble error. */
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uint8_t runt : 1; /* Short frame. */
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uint8_t no_ovf : 1; /* Received packet w/o overflow. */
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uint8_t good : 1; /* Received good packet. */
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uint8_t undef : 1;
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uint8_t stale : 1; /* Stale receive status. */
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uint8_t oflow : 1; /* Overflow on receive. */
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uint8_t fcs : 1; /* FCS error. */
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uint8_t dribble : 1; /* Dribble error. */
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uint8_t runt : 1; /* Short frame. */
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uint8_t no_ovf : 1; /* Received packet w/o overflow. */
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uint8_t good : 1; /* Received good packet. */
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uint8_t undef : 1;
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uint8_t stale : 1; /* Stale receive status. */
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} EL_RCV_STAT;
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/** Buffer control (buf_ctl) modes. */
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typedef enum {
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EL_BCTL_SYSTEM = 0, /* Host has buffer access. */
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EL_BCTL_XMT_RCV = 1, /* Transmit, then receive. */
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EL_BCTL_RECEIVE = 2, /* Receive. */
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EL_BCTL_LOOPBACK = 3 /* Loopback. */
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EL_BCTL_SYSTEM = 0, /* Host has buffer access. */
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EL_BCTL_XMT_RCV = 1, /* Transmit, then receive. */
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EL_BCTL_RECEIVE = 2, /* Receive. */
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EL_BCTL_LOOPBACK = 3 /* Loopback. */
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} EL_BUFFER_CONTROL;
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/**
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* EtherLink Auxiliary Status Register.
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*/
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typedef struct ELNK_AUX_CMD {
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uint8_t ire : 1; /* Interrupt Request Enable. */
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uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
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uint8_t buf_ctl : 2; /* Packet buffer control. */
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uint8_t unused : 1;
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uint8_t dma_req : 1; /* DMA request. */
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uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
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uint8_t reset : 1; /* Card in reset while set. */
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uint8_t ire : 1; /* Interrupt Request Enable. */
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uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
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uint8_t buf_ctl : 2; /* Packet buffer control. */
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uint8_t unused : 1;
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uint8_t dma_req : 1; /* DMA request. */
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uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
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uint8_t reset : 1; /* Card in reset while set. */
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} EL_AUX_CMD;
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/**
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* EtherLink Auxiliary Status Register.
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*/
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typedef struct ELNK_AUX_STAT {
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uint8_t recv_bsy : 1; /* Receive busy. */
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uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
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uint8_t buf_ctl : 2; /* Packet buffer control. */
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uint8_t dma_done : 1; /* DMA done. */
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uint8_t dma_req : 1; /* DMA request. */
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uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
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uint8_t xmit_bsy : 1; /* Transmit busy. */
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uint8_t recv_bsy : 1; /* Receive busy. */
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uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
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uint8_t buf_ctl : 2; /* Packet buffer control. */
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uint8_t dma_done : 1; /* DMA done. */
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uint8_t dma_req : 1; /* DMA request. */
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uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
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uint8_t xmit_bsy : 1; /* Transmit busy. */
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} EL_AUX_STAT;
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/**
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* Internal interrupt status.
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*/
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typedef struct ELNK_INTR_STAT {
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uint8_t recv_intr : 1; /* Receive interrupt status. */
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uint8_t xmit_intr : 1; /* Transmit interrupt status. */
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uint8_t dma_intr : 1; /* DMA interrupt status. */
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uint8_t unused : 5;
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uint8_t recv_intr : 1; /* Receive interrupt status. */
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uint8_t xmit_intr : 1; /* Transmit interrupt status. */
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uint8_t dma_intr : 1; /* DMA interrupt status. */
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uint8_t unused : 5;
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} EL_INTR_STAT;
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typedef struct {
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uint32_t base_address;
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int base_irq;
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uint32_t bios_addr;
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uint8_t maclocal[6]; /* configured MAC (local) address. */
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bool fISR; /* Internal interrupt flag. */
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int fDMA; /* Internal DMA active flag. */
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int fInReset; /* Internal in-reset flag. */
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uint8_t aPROM[8]; /* The PROM contents. Only 8 bytes addressable, R/O. */
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uint8_t aStationAddr[6]; /* The station address programmed by the guest, W/O. */
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uint16_t uGPBufPtr; /* General Purpose (GP) Buffer Pointer, R/W. */
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uint16_t uRCVBufPtr; /* Receive (RCV) Buffer Pointer, R/W. */
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uint32_t base_address;
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int base_irq;
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uint32_t bios_addr;
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uint8_t maclocal[6]; /* configured MAC (local) address. */
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bool fISR; /* Internal interrupt flag. */
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int fDMA; /* Internal DMA active flag. */
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int fInReset; /* Internal in-reset flag. */
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uint8_t aPROM[8]; /* The PROM contents. Only 8 bytes addressable, R/O. */
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uint8_t aStationAddr[6]; /* The station address programmed by the guest, W/O. */
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uint16_t uGPBufPtr; /* General Purpose (GP) Buffer Pointer, R/W. */
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uint16_t uRCVBufPtr; /* Receive (RCV) Buffer Pointer, R/W. */
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/** Transmit Command Register, W/O. */
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union {
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uint8_t XmitCmdReg;
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EL_XMT_CMD XmitCmd;
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uint8_t XmitCmdReg;
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EL_XMT_CMD XmitCmd;
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};
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/** Transmit Status Register, R/O. */
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union {
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uint8_t XmitStatReg;
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EL_XMT_STAT XmitStat;
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uint8_t XmitStatReg;
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EL_XMT_STAT XmitStat;
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};
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/** Receive Command Register, W/O. */
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union {
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uint8_t RcvCmdReg;
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EL_RCV_CMD RcvCmd;
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uint8_t RcvCmdReg;
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EL_RCV_CMD RcvCmd;
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};
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/** Receive Status Register, R/O. */
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union {
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uint8_t RcvStatReg;
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EL_RCV_STAT RcvStat;
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uint8_t RcvStatReg;
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EL_RCV_STAT RcvStat;
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};
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/** Auxiliary Command Register, W/O. */
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union {
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uint8_t AuxCmdReg;
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EL_AUX_CMD AuxCmd;
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uint8_t AuxCmdReg;
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EL_AUX_CMD AuxCmd;
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};
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/** Auxiliary Status Register, R/O. */
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union {
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uint8_t AuxStatReg;
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EL_AUX_STAT AuxStat;
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uint8_t AuxStatReg;
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EL_AUX_STAT AuxStat;
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};
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int fLinkUp; /* If set the link is currently up. */
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int fLinkTempDown; /* If set the link is temporarily down because of a saved state load. */
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uint16_t cLinkDownReported; /* Number of times we've reported the link down. */
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uint16_t cLinkRestorePostponed; /* Number of times we've postponed the link restore. */
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int fLinkUp; /* If set the link is currently up. */
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int fLinkTempDown; /* If set the link is temporarily down because of a saved state load. */
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uint16_t cLinkDownReported; /* Number of times we've reported the link down. */
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uint16_t cLinkRestorePostponed; /* Number of times we've postponed the link restore. */
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/* Internal interrupt state. */
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union {
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uint8_t IntrStateReg;
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EL_INTR_STAT IntrState;
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uint8_t IntrStateReg;
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EL_INTR_STAT IntrState;
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};
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uint32_t cMsLinkUpDelay; /* MS to wait before we enable the link. */
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int dma_channel;
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uint8_t abLoopBuf[ELNK_BUF_SIZE]; /* The loopback transmit buffer (avoid stack allocations). */
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uint8_t abRuntBuf[64]; /* The runt pad buffer (only really needs 60 bytes). */
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uint8_t abPacketBuf[ELNK_BUF_SIZE]; /* The packet buffer. */
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int dma_pos;
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pc_timer_t timer_restore;
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netcard_t *netcard;
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uint32_t cMsLinkUpDelay; /* MS to wait before we enable the link. */
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int dma_channel;
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uint8_t abLoopBuf[ELNK_BUF_SIZE]; /* The loopback transmit buffer (avoid stack allocations). */
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uint8_t abRuntBuf[64]; /* The runt pad buffer (only really needs 60 bytes). */
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uint8_t abPacketBuf[ELNK_BUF_SIZE]; /* The packet buffer. */
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int dma_pos;
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pc_timer_t timer_restore;
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netcard_t *netcard;
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} threec501_t;
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#ifdef ENABLE_3COM501_LOG
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@@ -280,7 +279,7 @@ static void elnkR3HardReset(threec501_t *dev);
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#endif
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#define ETHER_ADDR_LEN ETH_ALEN
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#define ETH_ALEN 6
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#define ETH_ALEN 6
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#pragma pack(1)
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struct ether_header /** @todo Use RTNETETHERHDR? */
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{
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@@ -325,8 +324,8 @@ static void
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elnkTempLinkDown(threec501_t *dev)
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{
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if (dev->fLinkUp) {
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dev->fLinkTempDown = 1;
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dev->cLinkDownReported = 0;
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dev->fLinkTempDown = 1;
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dev->cLinkDownReported = 0;
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dev->cLinkRestorePostponed = 0;
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timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC);
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}
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@@ -341,7 +340,7 @@ elnkR3Reset(void *priv)
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threec501_t *dev = (threec501_t *) priv;
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if (dev->fLinkTempDown) {
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dev->cLinkDownReported = 0x1000;
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dev->cLinkDownReported = 0x1000;
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dev->cLinkRestorePostponed = 0x1000;
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timer_disable(&dev->timer_restore);
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}
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@@ -367,15 +366,14 @@ elnkR3HardReset(threec501_t *dev)
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elnkSoftReset(dev);
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}
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/**
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* Check if incoming frame matches the station address.
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*/
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static __inline int
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padr_match(threec501_t *dev, const uint8_t *buf)
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{
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struct ether_header *hdr = (struct ether_header *)buf;
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int result;
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struct ether_header *hdr = (struct ether_header *) buf;
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int result;
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/* Checks own + broadcast as well as own + multicast. */
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result = (dev->RcvCmd.adr_match >= EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, dev->aStationAddr, 6);
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@@ -389,21 +387,20 @@ padr_match(threec501_t *dev, const uint8_t *buf)
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static __inline int
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padr_bcast(threec501_t *dev, const uint8_t *buf)
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{
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static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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struct ether_header *hdr = (struct ether_header *)buf;
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int result = (dev->RcvCmd.adr_match == EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, aBCAST, 6);
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static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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struct ether_header *hdr = (struct ether_header *) buf;
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int result = (dev->RcvCmd.adr_match == EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, aBCAST, 6);
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return result;
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}
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/**
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* Check if incoming frame is an accepted multicast frame.
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*/
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static __inline int
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padr_mcast(threec501_t *dev, const uint8_t *buf)
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{
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struct ether_header *hdr = (struct ether_header *)buf;
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int result = (dev->RcvCmd.adr_match == EL_ADRM_MCAST) && ETHER_IS_MULTICAST(hdr->ether_dhost);
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struct ether_header *hdr = (struct ether_header *) buf;
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int result = (dev->RcvCmd.adr_match == EL_ADRM_MCAST) && ETHER_IS_MULTICAST(hdr->ether_dhost);
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return result;
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}
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@@ -475,9 +472,9 @@ elnkSoftReset(threec501_t *dev)
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static int
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elnkReceiveLocked(void *priv, uint8_t *src, int size)
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{
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threec501_t *dev = (threec501_t *) priv;
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int is_padr = 0, is_bcast = 0, is_mcast = 0;
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bool fLoopback = dev->RcvCmd.adr_match == EL_BCTL_LOOPBACK;
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threec501_t *dev = (threec501_t *) priv;
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int is_padr = 0, is_bcast = 0, is_mcast = 0;
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bool fLoopback = dev->RcvCmd.adr_match == EL_BCTL_LOOPBACK;
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union {
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uint8_t RcvStatNewReg;
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@@ -513,8 +510,8 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
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* filter are always ignored.
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*/
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/// @todo cbToRecv must be 6 or more (complete address)
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if ((dev->RcvCmd.adr_match == EL_ADRM_PROMISC) /* promiscuous enabled */
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|| (is_padr = padr_match(dev, src))
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if ((dev->RcvCmd.adr_match == EL_ADRM_PROMISC) /* promiscuous enabled */
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|| (is_padr = padr_match(dev, src))
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|| (is_bcast = padr_bcast(dev, src))
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|| (is_mcast = padr_mcast(dev, src))) {
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uint8_t *dst = dev->abPacketBuf + dev->uRCVBufPtr;
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@@ -524,9 +521,9 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
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#endif
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/* Receive status is evaluated from scratch. The stale bit must remain set until we know better. */
|
||||
rcvstatnew.RcvStatNewReg = 0;
|
||||
rcvstatnew.RcvStatNewReg = 0;
|
||||
rcvstatnew.RcvStatNew.stale = 1;
|
||||
dev->RcvStatReg = 0x80;
|
||||
dev->RcvStatReg = 0x80;
|
||||
|
||||
/* Detect errors: Runts, overflow, and FCS errors.
|
||||
* NB: Dribble errors can not happen because we can only receive an
|
||||
@@ -549,7 +546,7 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
|
||||
memset(dev->abRuntBuf, 0, sizeof(dev->abRuntBuf));
|
||||
memcpy(dev->abRuntBuf, src, size);
|
||||
size = 60;
|
||||
src = dev->abRuntBuf;
|
||||
src = dev->abRuntBuf;
|
||||
} else {
|
||||
#ifdef ENABLE_3COM501_LOG
|
||||
threec501_log("3Com501 runt, size=%d\n", size);
|
||||
@@ -582,7 +579,7 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
|
||||
if (rcvstatnew.RcvStatNew.no_ovf && !rcvstatnew.RcvStatNew.fcs && !rcvstatnew.RcvStatNew.runt)
|
||||
rcvstatnew.RcvStatNew.good = 1;
|
||||
|
||||
uint16_t cbCopy = (uint16_t)MIN(ELNK_BUF_SIZE - dev->uRCVBufPtr, size);
|
||||
uint16_t cbCopy = (uint16_t) MIN(ELNK_BUF_SIZE - dev->uRCVBufPtr, size);
|
||||
|
||||
/* All packets that passed the address filter are copied to the buffer. */
|
||||
|
||||
@@ -604,15 +601,15 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
|
||||
* NB: The precise receive logic is not very well described in the EtherLink
|
||||
* documentation. It was refined using the 3C501.EXE diagnostic utility.
|
||||
*/
|
||||
if ( (rcvstatnew.RcvStatNew.good && dev->RcvCmd.acpt_good)
|
||||
|| (rcvstatnew.RcvStatNew.no_ovf && dev->RcvCmd.det_eof)
|
||||
|| (rcvstatnew.RcvStatNew.runt && dev->RcvCmd.det_runt)
|
||||
if ((rcvstatnew.RcvStatNew.good && dev->RcvCmd.acpt_good)
|
||||
|| (rcvstatnew.RcvStatNew.no_ovf && dev->RcvCmd.det_eof)
|
||||
|| (rcvstatnew.RcvStatNew.runt && dev->RcvCmd.det_runt)
|
||||
|| (rcvstatnew.RcvStatNew.dribble && dev->RcvCmd.det_drbl)
|
||||
|| (rcvstatnew.RcvStatNew.fcs && dev->RcvCmd.det_fcs)
|
||||
|| (rcvstatnew.RcvStatNew.oflow && dev->RcvCmd.det_ofl)) {
|
||||
dev->AuxStat.recv_bsy = 0;
|
||||
dev->IntrState.recv_intr = 1;
|
||||
rcvstatnew.RcvStatNew.stale = 0; /* Prevents further receive until set again. */
|
||||
|| (rcvstatnew.RcvStatNew.fcs && dev->RcvCmd.det_fcs)
|
||||
|| (rcvstatnew.RcvStatNew.oflow && dev->RcvCmd.det_ofl)) {
|
||||
dev->AuxStat.recv_bsy = 0;
|
||||
dev->IntrState.recv_intr = 1;
|
||||
rcvstatnew.RcvStatNew.stale = 0; /* Prevents further receive until set again. */
|
||||
}
|
||||
|
||||
/* Finally update the receive status. */
|
||||
@@ -715,7 +712,7 @@ elnkAsyncTransmit(threec501_t *dev)
|
||||
|
||||
/* NB: The buffer control does *not* change to Receive and stays the way it was. */
|
||||
if (!fLoopback) {
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
}
|
||||
} while (0); /* No loop, because there isn't ever more than one packet to transmit. */
|
||||
|
||||
@@ -725,14 +722,14 @@ elnkAsyncTransmit(threec501_t *dev)
|
||||
static void
|
||||
elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
{
|
||||
bool fTransmit = false;
|
||||
bool fReceive = false;
|
||||
bool fDMAR;
|
||||
int mode;
|
||||
bool fTransmit = false;
|
||||
bool fReceive = false;
|
||||
bool fDMAR;
|
||||
int mode;
|
||||
|
||||
union {
|
||||
uint8_t reg;
|
||||
EL_AUX_CMD val;
|
||||
uint8_t reg;
|
||||
EL_AUX_CMD val;
|
||||
} auxcmd;
|
||||
|
||||
auxcmd.reg = data;
|
||||
@@ -759,7 +756,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
#endif
|
||||
elnkSoftReset(dev);
|
||||
}
|
||||
dev->AuxCmd.reset = auxcmd.val.reset; /* Update the reset bit, if nothing else. */
|
||||
dev->AuxCmd.reset = auxcmd.val.reset; /* Update the reset bit, if nothing else. */
|
||||
}
|
||||
|
||||
/* If the card is in reset, stop right here. */
|
||||
@@ -788,14 +785,14 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
}
|
||||
} else {
|
||||
while (dev->dma_pos < (ELNK_BUF_SIZE - ELNK_GP(dev))) {
|
||||
int dma_data = dma_channel_read(dev->dma_channel);
|
||||
int dma_data = dma_channel_read(dev->dma_channel);
|
||||
dev->abPacketBuf[ELNK_GP(dev) + dev->dma_pos] = dma_data & 0xff;
|
||||
dev->dma_pos++;
|
||||
}
|
||||
}
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr + dev->dma_pos) & ELNK_GP_MASK;
|
||||
dma_set_drq(dev->dma_channel, 0);
|
||||
dev->dma_pos = 0;
|
||||
dev->dma_pos = 0;
|
||||
dev->IntrState.dma_intr = 1;
|
||||
dev->AuxStat.dma_done = 1;
|
||||
elnkUpdateIrq(dev);
|
||||
@@ -808,7 +805,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
/* Interrupt enable changes. */
|
||||
if ((dev->AuxCmd.ire != auxcmd.val.ire) || (dev->AuxCmd.ride != auxcmd.val.ride)) {
|
||||
dev->AuxStat.ride = dev->AuxCmd.ride = auxcmd.val.ride;
|
||||
dev->AuxCmd.ire = auxcmd.val.ire; /* NB: IRE is not visible in the aux status register. */
|
||||
dev->AuxCmd.ire = auxcmd.val.ire; /* NB: IRE is not visible in the aux status register. */
|
||||
}
|
||||
|
||||
/* DMA Request changes. */
|
||||
@@ -824,15 +821,15 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
/* Packet buffer control changes. */
|
||||
if (dev->AuxCmd.buf_ctl != auxcmd.val.buf_ctl) {
|
||||
#ifdef ENABLE_3COM501_LOG
|
||||
static const char *apszBuffCntrl[4] = { "System", "Xmit then Recv", "Receive", "Loopback" };
|
||||
static const char *apszBuffCntrl[4] = { "System", "Xmit then Recv", "Receive", "Loopback" };
|
||||
threec501_log("3Com501: Packet buffer control `%s' -> `%s'\n", apszBuffCntrl[dev->AuxCmd.buf_ctl], apszBuffCntrl[auxcmd.val.buf_ctl]);
|
||||
#endif
|
||||
if (auxcmd.val.buf_ctl == EL_BCTL_XMT_RCV) {
|
||||
/* Transmit, then receive. */
|
||||
fTransmit = true;
|
||||
fTransmit = true;
|
||||
dev->AuxStat.recv_bsy = 0;
|
||||
} else if (auxcmd.val.buf_ctl == EL_BCTL_SYSTEM) {
|
||||
dev->AuxStat.xmit_bsy = 1; /* Transmit Busy is set here and cleared once actual transmit completes. */
|
||||
dev->AuxStat.xmit_bsy = 1; /* Transmit Busy is set here and cleared once actual transmit completes. */
|
||||
dev->AuxStat.recv_bsy = 0;
|
||||
} else if (auxcmd.val.buf_ctl == EL_BCTL_RECEIVE) {
|
||||
/* Special case: If going from xmit-then-receive mode to receive mode, and we received
|
||||
@@ -845,8 +842,8 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
/* For loopback, we go through the regular transmit and receive path. That may be an
|
||||
* overkill but the receive path is too complex for a special loopback-only case.
|
||||
*/
|
||||
fTransmit = true;
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
fTransmit = true;
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
}
|
||||
dev->AuxStat.buf_ctl = dev->AuxCmd.buf_ctl = auxcmd.val.buf_ctl;
|
||||
}
|
||||
@@ -863,7 +860,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
|
||||
if (fTransmit)
|
||||
elnkAsyncTransmit(dev);
|
||||
else if (fReceive) {
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
|
||||
}
|
||||
}
|
||||
|
||||
@@ -874,52 +871,52 @@ threec501_read(uint16_t addr, void *priv)
|
||||
uint8_t retval = 0xff;
|
||||
|
||||
switch (addr & 0x0f) {
|
||||
case 0x00: /* Receive status register aliases. The SEEQ 8001 */
|
||||
case 0x02: /* EDLC clearly only decodes one bit for reads. */
|
||||
case 0x00: /* Receive status register aliases. The SEEQ 8001 */
|
||||
case 0x02: /* EDLC clearly only decodes one bit for reads. */
|
||||
case 0x04:
|
||||
case 0x06: /* Receive status register. */
|
||||
retval = dev->RcvStatReg;
|
||||
dev->RcvStat.stale = 1; /* Allows further reception. */
|
||||
case 0x06: /* Receive status register. */
|
||||
retval = dev->RcvStatReg;
|
||||
dev->RcvStat.stale = 1; /* Allows further reception. */
|
||||
dev->IntrState.recv_intr = 0; /* Reading clears receive interrupt. */
|
||||
elnkUpdateIrq(dev);
|
||||
break;
|
||||
|
||||
case 0x01: /* Transmit status register aliases. */
|
||||
case 0x01: /* Transmit status register aliases. */
|
||||
case 0x03:
|
||||
case 0x05:
|
||||
case 0x07: /* Transmit status register. */
|
||||
retval = dev->XmitStatReg;
|
||||
case 0x07: /* Transmit status register. */
|
||||
retval = dev->XmitStatReg;
|
||||
dev->IntrState.xmit_intr = 0; /* Reading clears transmit interrupt. */
|
||||
elnkUpdateIrq(dev);
|
||||
break;
|
||||
|
||||
case 0x08: /* GP Buffer pointer LSB. */
|
||||
case 0x08: /* GP Buffer pointer LSB. */
|
||||
retval = (dev->uGPBufPtr & 0xff);
|
||||
break;
|
||||
case 0x09: /* GP Buffer pointer MSB. */
|
||||
case 0x09: /* GP Buffer pointer MSB. */
|
||||
retval = (dev->uGPBufPtr >> 8);
|
||||
break;
|
||||
|
||||
case 0x0a: /* RCV Buffer pointer LSB. */
|
||||
case 0x0a: /* RCV Buffer pointer LSB. */
|
||||
retval = (dev->uRCVBufPtr & 0xff);
|
||||
break;
|
||||
case 0x0b: /* RCV Buffer pointer MSB. */
|
||||
case 0x0b: /* RCV Buffer pointer MSB. */
|
||||
retval = (dev->uRCVBufPtr >> 8);
|
||||
break;
|
||||
|
||||
case 0x0c: /* Ethernet address PROM window. */
|
||||
case 0x0d: /* Alias. */
|
||||
case 0x0c: /* Ethernet address PROM window. */
|
||||
case 0x0d: /* Alias. */
|
||||
/* Reads use low 3 bits of GP buffer pointer, no auto-increment. */
|
||||
retval = dev->aPROM[dev->uGPBufPtr & 7];
|
||||
break;
|
||||
|
||||
case 0x0e: /* Auxiliary status register. */
|
||||
case 0x0e: /* Auxiliary status register. */
|
||||
retval = dev->AuxStatReg;
|
||||
break;
|
||||
|
||||
case 0x0f: /* Buffer window. */
|
||||
case 0x0f: /* Buffer window. */
|
||||
/* Reads use low 11 bits of GP buffer pointer, auto-increment. */
|
||||
retval = dev->abPacketBuf[ELNK_GP(dev)];
|
||||
retval = dev->abPacketBuf[ELNK_GP(dev)];
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
|
||||
break;
|
||||
}
|
||||
@@ -973,40 +970,40 @@ threec501_write(uint16_t addr, uint8_t value, void *priv)
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 0x08: /* GP Buffer pointer LSB. */
|
||||
case 0x08: /* GP Buffer pointer LSB. */
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr & 0xff00) | value;
|
||||
break;
|
||||
case 0x09: /* GP Buffer pointer MSB. */
|
||||
case 0x09: /* GP Buffer pointer MSB. */
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr & 0x00ff) | (value << 8);
|
||||
break;
|
||||
|
||||
case 0x0a: /* RCV Buffer pointer clear. */
|
||||
case 0x0a: /* RCV Buffer pointer clear. */
|
||||
dev->uRCVBufPtr = 0;
|
||||
#ifdef ENABLE_3COM501_LOG
|
||||
threec501_log("3Com501: RCV Buffer Pointer cleared (%02X)\n", value);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 0x0b: /* RCV buffer pointer MSB. */
|
||||
case 0x0c: /* Ethernet address PROM window. */
|
||||
case 0x0d: /* Undocumented. */
|
||||
case 0x0b: /* RCV buffer pointer MSB. */
|
||||
case 0x0c: /* Ethernet address PROM window. */
|
||||
case 0x0d: /* Undocumented. */
|
||||
#ifdef ENABLE_3COM501_LOG
|
||||
threec501_log("3Com501: Writing read-only register %02X!\n", reg);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 0x0e: /* Auxiliary Command (CSR). */
|
||||
case 0x0e: /* Auxiliary Command (CSR). */
|
||||
elnkCsrWrite(dev, value);
|
||||
break;
|
||||
|
||||
case 0x0f: /* Buffer window. */
|
||||
case 0x0f: /* Buffer window. */
|
||||
/* Writes use low 11 bits of GP buffer pointer, auto-increment. */
|
||||
if (dev->AuxCmd.buf_ctl != EL_BCTL_SYSTEM) {
|
||||
/// @todo Does this still increment GPBufPtr?
|
||||
break;
|
||||
}
|
||||
dev->abPacketBuf[ELNK_GP(dev)] = value;
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
|
||||
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -1042,12 +1039,12 @@ elnkSetLinkState(void *priv, uint32_t link_state)
|
||||
if (dev->fLinkUp != link_up) {
|
||||
dev->fLinkUp = link_up;
|
||||
if (link_up) {
|
||||
dev->fLinkTempDown = 1;
|
||||
dev->cLinkDownReported = 0;
|
||||
dev->fLinkTempDown = 1;
|
||||
dev->cLinkDownReported = 0;
|
||||
dev->cLinkRestorePostponed = 0;
|
||||
timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC);
|
||||
} else {
|
||||
dev->cLinkDownReported = 0;
|
||||
dev->cLinkDownReported = 0;
|
||||
dev->cLinkRestorePostponed = 0;
|
||||
}
|
||||
}
|
||||
@@ -1060,8 +1057,7 @@ elnkR3TimerRestore(void *priv)
|
||||
{
|
||||
threec501_t *dev = (threec501_t *) priv;
|
||||
|
||||
if ((dev->cLinkDownReported <= ELNK_MAX_LINKDOWN_REPORTED) &&
|
||||
(dev->cLinkRestorePostponed <= ELNK_MAX_LINKRST_POSTPONED)) {
|
||||
if ((dev->cLinkDownReported <= ELNK_MAX_LINKDOWN_REPORTED) && (dev->cLinkRestorePostponed <= ELNK_MAX_LINKRST_POSTPONED)) {
|
||||
timer_advance_u64(&dev->timer_restore, 1500000 * TIMER_USEC);
|
||||
dev->cLinkRestorePostponed++;
|
||||
} else {
|
||||
@@ -1117,7 +1113,7 @@ threec501_nic_init(const device_t *info)
|
||||
|
||||
/* Initialize the PROM */
|
||||
memcpy(dev->aPROM, dev->maclocal, sizeof(dev->maclocal));
|
||||
dev->aPROM[6] = dev->aPROM[7] = 0; /* The two padding bytes. */
|
||||
dev->aPROM[6] = dev->aPROM[7] = 0; /* The two padding bytes. */
|
||||
|
||||
#ifdef ENABLE_3COM501_LOG
|
||||
threec501_log("I/O=%04x, IRQ=%d, DMA=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
|
||||
@@ -1210,15 +1206,15 @@ static const device_config_t threec501_config[] = {
|
||||
};
|
||||
|
||||
const device_t threec501_device = {
|
||||
.name = "3Com EtherLink (3c500/3c501)",
|
||||
.name = "3Com EtherLink (3c500/3c501)",
|
||||
.internal_name = "3c501",
|
||||
.flags = DEVICE_ISA,
|
||||
.local = 0,
|
||||
.init = threec501_nic_init,
|
||||
.close = threec501_nic_close,
|
||||
.reset = elnkR3Reset,
|
||||
.flags = DEVICE_ISA,
|
||||
.local = 0,
|
||||
.init = threec501_nic_init,
|
||||
.close = threec501_nic_close,
|
||||
.reset = elnkR3Reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = threec501_config
|
||||
.force_redraw = NULL,
|
||||
.config = threec501_config
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user