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Yet more clang-formatting

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This commit is contained in:
Jasmine Iwanek
2023-02-28 23:24:58 -05:00
parent c29958af6a
commit 610401de7a
45 changed files with 1245 additions and 1230 deletions
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157
src/pci_dummy.c
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@@ -32,7 +32,7 @@ static uint8_t
pci_dummy_read(uint16_t Port, void *p)
{
pci_dummy_t *dev = (pci_dummy_t *) p;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
switch (Port & 0x20) {
case 0x00:
@@ -120,51 +120,57 @@ static uint8_t
pci_dummy_pci_read(int func, int addr, void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
if (func == 0x00) switch (addr) {
case 0x00: case 0x2c:
ret = 0x1a;
break;
case 0x01: case 0x2d:
ret = 0x07;
break;
if (func == 0x00)
switch (addr) {
case 0x00:
case 0x2c:
ret = 0x1a;
break;
case 0x01:
case 0x2d:
ret = 0x07;
break;
case 0x02: case 0x2e:
ret = 0x0b;
break;
case 0x03: case 0x2f:
ret = 0xab;
break;
case 0x02:
case 0x2e:
ret = 0x0b;
break;
case 0x03:
case 0x2f:
ret = 0xab;
break;
case 0x04: /* PCI_COMMAND_LO */
case 0x05: /* PCI_COMMAND_HI */
case 0x06: /* PCI_STATUS_LO */
case 0x07: /* PCI_STATUS_HI */
case 0x0a: case 0x0b:
case 0x3c: /* PCI_ILR */
ret = dev->pci_regs[addr];
break;
case 0x04: /* PCI_COMMAND_LO */
case 0x05: /* PCI_COMMAND_HI */
case 0x06: /* PCI_STATUS_LO */
case 0x07: /* PCI_STATUS_HI */
case 0x0a:
case 0x0b:
case 0x3c: /* PCI_ILR */
ret = dev->pci_regs[addr];
break;
case 0x08: /* Techncially, revision, but we return the card (slot) here. */
ret = dev->card;
break;
case 0x08: /* Techncially, revision, but we return the card (slot) here. */
ret = dev->card;
break;
case 0x10: /* PCI_BAR 7:5 */
ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01;
break;
case 0x11: /* PCI_BAR 15:8 */
ret = dev->pci_bar[0].addr_regs[1];
break;
case 0x10: /* PCI_BAR 7:5 */
ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01;
break;
case 0x11: /* PCI_BAR 15:8 */
ret = dev->pci_bar[0].addr_regs[1];
break;
case 0x3d: /* PCI_IPR */
ret = PCI_INTA;
break;
case 0x3d: /* PCI_IPR */
ret = PCI_INTA;
break;
default:
ret = 0x00;
break;
}
default:
ret = 0x00;
break;
}
// pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret);
@@ -175,50 +181,51 @@ static void
pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t valxor;
uint8_t valxor;
// pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val);
if (func == 0x00) switch (addr) {
case 0x04: /* PCI_COMMAND_LO */
valxor = (val & 0x03) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO) {
if (func == 0x00)
switch (addr) {
case 0x04: /* PCI_COMMAND_LO */
valxor = (val & 0x03) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO) {
pci_dummy_io_remove(dev);
if ((dev->pci_bar[0].addr != 0) && (val & PCI_COMMAND_IO))
pci_dummy_io_set(dev);
}
dev->pci_regs[addr] = val & 0x03;
break;
case 0x10: /* PCI_BAR */
val &= 0xe0; /* 0xe0 acc to RTL DS */
/*FALLTHROUGH*/
case 0x11: /* PCI_BAR */
/* Remove old I/O. */
pci_dummy_io_remove(dev);
if ((dev->pci_bar[0].addr != 0) && (val & PCI_COMMAND_IO))
pci_dummy_io_set(dev);
}
dev->pci_regs[addr] = val & 0x03;
break;
case 0x10: /* PCI_BAR */
val &= 0xe0; /* 0xe0 acc to RTL DS */
/*FALLTHROUGH*/
/* Set new I/O as per PCI request. */
dev->pci_bar[0].addr_regs[addr & 3] = val;
case 0x11: /* PCI_BAR */
/* Remove old I/O. */
pci_dummy_io_remove(dev);
/* Then let's calculate the new I/O base. */
dev->pci_bar[0].addr &= 0xffe0;
/* Set new I/O as per PCI request. */
dev->pci_bar[0].addr_regs[addr & 3] = val;
/* Log the new base. */
// pclog("AB0B:071A: PCI: new I/O base is %04X\n", dev->pci_bar[0].addr);
/* Then let's calculate the new I/O base. */
dev->pci_bar[0].addr &= 0xffe0;
/* We're done, so get out of the here. */
if (dev->pci_regs[4] & PCI_COMMAND_IO) {
if ((dev->pci_bar[0].addr) != 0)
pci_dummy_io_set(dev);
}
break;
/* Log the new base. */
// pclog("AB0B:071A: PCI: new I/O base is %04X\n", dev->pci_bar[0].addr);
/* We're done, so get out of the here. */
if (dev->pci_regs[4] & PCI_COMMAND_IO) {
if ((dev->pci_bar[0].addr) != 0)
pci_dummy_io_set(dev);
}
break;
case 0x3c: /* PCI_ILR */
pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val);
dev->pci_regs[addr] = val;
return;
}
case 0x3c: /* PCI_ILR */
pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val);
dev->pci_regs[addr] = val;
return;
}
}
static void
@@ -275,7 +282,7 @@ pci_dummy_init(int min_slot, int max_slot, int nb_slot, int sb_slot)
for (i = min_slot; i <= max_slot; i++) {
if ((i != nb_slot) && (i != sb_slot)) {
pci_register_slot(i, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(i, PCI_CARD_NORMAL, 1, 3, 2, 4);
device_add_inst(&pci_dummy_device, j);
j++;
}