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Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only)

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This commit is contained in:
RichardG867
2021-06-03 16:02:04 -03:00
parent 5cd255a0e0
commit 62afe31757
8 changed files with 4 additions and 153 deletions
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55
src/cpu/cpu.c
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@@ -1278,7 +1278,6 @@ cpu_set(void)
break;
case CPU_CYRIX3S:
case CPU_EDEN: /* This until proper timings get discovered */
#ifdef USE_DYNAREC
x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
#else
@@ -2015,58 +2014,6 @@ cpu_CPUID(void)
break;
}
break;
case CPU_EDEN:
switch (EAX) {
case 0:
EAX = 1;
if (msr.fcr2 & (1 << 14)) {
EBX = msr.fcr3 >> 32;
ECX = msr.fcr3 & 0xffffffff;
EDX = msr.fcr2 >> 32;
} else {
EBX = 0x746e6543; /* CentaurHauls */
ECX = 0x736c7561;
EDX = 0x48727561;
}
break;
case 1:
EAX = CPUID;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MMX | CPUID_MTRR;
if (cpu_has_feature(CPU_FEATURE_CX8))
EDX |= CPUID_CMPXCHG8B;
break;
case 0x80000000:
EAX = 0x80000006;
break;
case 0x80000001:
EAX = CPUID;
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MMX | CPUID_MTRR | CPUID_3DNOW;
if (cpu_has_feature(CPU_FEATURE_CX8))
EDX |= CPUID_CMPXCHG8B;
break;
case 0x80000002: /* Processor name string */
case 0x80000003:
case 0x80000004:
EAX = 0x20414956; /* VIA Samuel 2 */
EBX = 0x756d6153;
ECX = 0x32206c65;
EDX = 0x00000000;
break;
case 0x80000005: /* Cache information */
EBX = 0x08800880; /* TLBs */
ECX = 0x40040120; /* L1 data cache */
EDX = 0x40020120; /* L1 instruction cache */
break;
case 0x80000006:
ECX = 0x40040120; /* L2 data cache */
break;
default:
EAX = EBX = ECX = EDX = 0;
break;
}
break;
}
}
@@ -2157,7 +2104,6 @@ cpu_RDMSR(void)
break;
case CPU_CYRIX3S:
case CPU_EDEN:
EAX = EDX = 0;
switch (ECX) {
case 0x10:
@@ -2609,7 +2555,6 @@ cpu_WRMSR(void)
break;
case CPU_CYRIX3S:
case CPU_EDEN:
switch (ECX) {
case 0x10:
tsc = EAX | ((uint64_t)EDX << 32);

7
src/cpu/cpu.h
View File

@@ -76,7 +76,6 @@ enum {
CPU_K6_2P,
CPU_K6_3P,
CPU_CYRIX3S,
CPU_EDEN,
CPU_PENTIUMPRO, /* 686 class CPUs */
CPU_PENTIUM2,
CPU_PENTIUM2D
@@ -247,7 +246,7 @@ typedef struct {
uint64_t ia32_pmc[8]; /* 0x000000c1 - 0x000000c8 */
uint64_t mtrr_cap; /* 0x000000fe */
/* IDT WinChip and WinChip 2 MSR's that are also on the VIA Cyrix III and Eden */
/* IDT WinChip and WinChip 2 MSR's that are also on the VIA Cyrix III */
uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */
uint64_t fcr2, fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */
@@ -266,7 +265,7 @@ typedef struct {
uint64_t ecx1e0; /* 0x000001e0 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also
on the VIA Cyrix III and Eden */
on the VIA Cyrix III */
uint64_t mtrr_physbase[8]; /* 0x00000200 - 0x0000020f */
uint64_t mtrr_physmask[8]; /* 0x00000200 - 0x0000020f (ECX & 1) */
uint64_t mtrr_fix64k_8000; /* 0x00000250 */
@@ -278,7 +277,7 @@ typedef struct {
uint64_t pat; /* 0x00000277 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also
on the VIA Cyrix III and Eden */
on the VIA Cyrix III */
uint64_t mtrr_deftype; /* 0x000002ff */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */

11
src/cpu/cpu_table.c
View File

@@ -1036,17 +1036,6 @@ const cpu_family_t cpu_families[] = {
{"733", CPU_CYRIX3S, fpus_internal, 733333333, 5.5, 2050, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 66, 66, 18, 18, 88},
{"", 0}
}
}, {
.package = CPU_PKG_EBGA368,
.manufacturer = "VIA",
.name = "Eden Model 7",
.internal_name = "c3_eden",
.cpus = (const CPU[]) {
{"66", CPU_EDEN, fpus_internal, 66666666, 1.0, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 6, 6, 3, 3, 8}, /* out of spec */
{"100", CPU_EDEN, fpus_internal, 100000000, 1.0, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 9, 9, 4, 4, 12}, /* out of spec */
{"400", CPU_EDEN, fpus_internal, 400000000, 6.0, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 36, 36, 17, 17, 48},
{"600", CPU_EDEN, fpus_internal, 600000000, 6.0, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 54, 54, 18, 18, 72},
}
}, {
.package = 0,
}