Rewritten parts of the 86F handler to minimize false CRC errors and misidentification of sectors;
Replaced IMG handler with one that now proxies to the 86F handler; Applies the remaining Mainline PCem speedup commit; Fixed the National Semiconductors PC87306 Super I/O Chip's serial port IRQ assignment; DMF images are now loaded with the correct sector interleave, improving read/write speed; XDF images are now loaded in a way that emulates the real order of the sectors on the track, improving read/write speed; Added 16-bit physical memory read/write routines (mem_phys_readw, mem_phys_writew) and modified the 16-bit DMA code to use them instead of two 8-bit reads/writes.
This commit is contained in:
18
src/mem.c
18
src/mem.c
@@ -1552,6 +1552,16 @@ uint8_t mem_readb_phys(uint32_t addr)
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return 0xff;
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}
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uint16_t mem_readw_phys(uint32_t addr)
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{
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mem_logical_addr = 0xffffffff;
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if (_mem_read_w[addr >> 14])
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return _mem_read_w[addr >> 14](addr, _mem_priv_r[addr >> 14]);
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return 0xff;
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}
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void mem_writeb_phys(uint32_t addr, uint8_t val)
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{
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mem_logical_addr = 0xffffffff;
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@@ -1560,6 +1570,14 @@ void mem_writeb_phys(uint32_t addr, uint8_t val)
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_mem_write_b[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
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}
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void mem_writew_phys(uint32_t addr, uint16_t val)
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{
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mem_logical_addr = 0xffffffff;
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if (_mem_write_w[addr >> 14])
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_mem_write_w[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
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}
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uint8_t mem_read_ram(uint32_t addr, void *priv)
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{
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// if (addr >= 0xc0000 && addr < 0x0c8000) pclog("Read RAMb %08X\n", addr);
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