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Added initial Apollo Pro emulation

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- Added the Apollo Pro Northbridge
- Added a PC Partner board (APRO + 586B Southbridge) **COMPATIBLE WITH VIA C3!**
This commit is contained in:
tiseno100
2020-03-26 18:29:20 +02:00
committed by GitHub
parent 80356a9b85
commit 6571e1153c
7 changed files with 366 additions and 18 deletions
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25
src/machine/m_at_socket8.c
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@@ -30,6 +30,7 @@
#include "hdc_ide.h"
#include "keyboard.h"
#include "intel_flash.h"
#include "via_vt82c586b.h"
#include "intel_sio.h"
#include "piix.h"
#include "sio.h"
@@ -237,13 +238,13 @@ machine_at_borapro_init(const machine_t *model)
return ret;
}
#if defined(DEV_BRANCH) && defined(USE_I686)
int
machine_at_p6bxt_init(const machine_t *model)
machine_at_apas3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear(L"roms/machines/p6bxt/bxt53s.BIN",
ret = bios_load_linear(L"roms/machines/apas3/V0218SAG.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
@@ -253,23 +254,21 @@ machine_at_p6bxt_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 3, 2, 1); /* Slot 5: Probably the integrated sound chip. */
pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add(&w83977tf_device);
device_add(&via_apro_device);
device_add(&via_vt82c586b_device);
device_add(&fdc37c669_device);
device_add(&keyboard_ps2_pci_device);
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
#endif
int
machine_at_63a_init(const machine_t *model)
@@ -304,4 +303,4 @@ machine_at_63a_init(const machine_t *model)
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
return ret;
}
}

2
src/machine/machine.h
View File

@@ -300,6 +300,7 @@ extern int machine_at_586t2_init(const machine_t *);
extern int machine_at_807ds_init(const machine_t *);
extern int machine_at_mvp3_init(const machine_t *);
extern int machine_at_apas3_init(const machine_t *);
#ifdef EMU_DEVICE_H
extern const device_t *at_pb640_get_device(void);
@@ -316,6 +317,7 @@ extern int machine_at_6abx3_init(const machine_t *);
extern int machine_at_p2bls_init(const machine_t *);
extern int machine_at_borapro_init(const machine_t *);
extern int machine_at_63a_init(const machine_t *);
extern int machine_at_vim863s_init(const machine_t *);
/* m_at_t3100e.c */
extern int machine_at_t3100e_init(const machine_t *);

7
src/machine/machine_table.c
View File

@@ -244,14 +244,15 @@ const machine_t machines[] = {
{ "[Slot 1 BX] ASUS P2B-LS", "p2bls", {{"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_p2bls_init, NULL },
#endif
#if defined(DEV_BRANCH) && defined(USE_I686)
{ "[Slot 1 ZX] Packard Bell Bora Pro", "borapro", {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_borapro_init, NULL },
{ "[Slot 1 ZX] Packard Bell Bora Pro", "borapro", {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_borapro_init, NULL },
{ "[Socket 370 BX] ECS P6BXT-A+", "p6bxt", {{"Intel", cpus_Celeron}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_p6bxt_init, NULL },
{ "[Socket 370 ZX] Soltek SL-63A1", "63a", {{"Intel", cpus_Celeron}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_63a_init, NULL },
{ "[Socket 370 APRO] PC Partner APAS3", "apas3", {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_apas3_init, NULL },
#else
{ "[Slot 1 ZX] Packard Bell Bora Pro", "borapro", {{"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_borapro_init, NULL },
{ "[Slot 1 ZX] Packard Bell Bora Pro", "borapro", {{"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_borapro_init, NULL },
{ "[Socket 370 ZX] Soltek SL-63A1", "63a", {{"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_63a_init, NULL },
{ "[Socket 370 APRO] PC Partner APAS3", "apas3", {{"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_apas3_init, NULL },
#endif
{ NULL, NULL, {{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}}, 0, 0, 0, 0, 0, NULL, NULL }