From 6856a77e2d1db3a4e34fc484fa0855d301b04d9e Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 25 Jan 2018 19:35:23 +0100 Subject: [PATCH] Re-added the Cardex Tseng ET4000/W32p (which works better than the Diamond Stealth32), and moved the Diamond Stealth32 to the Dev branch; Re-added the ATi Mach64GX ISA, this time with a working BIOS; Fixed some CGA/EGA/(S)VGA timing mess-ups. --- src/video/vid_ati_mach64.c | 21 +++++- src/video/vid_cga.c | 18 ++--- src/video/vid_ega.c | 18 ++--- src/video/vid_et4000w32.c | 136 +++++++++++++++++++++++++++++-------- src/video/vid_et4000w32.h | 5 ++ src/video/vid_svga.c | 40 ++++++----- src/video/vid_table.c | 14 +++- src/video/video.h | 7 +- src/win/Makefile.mingw | 10 ++- 9 files changed, 196 insertions(+), 73 deletions(-) diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 4e94a295c..3dc03a084 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -8,7 +8,7 @@ * * ATi Mach64 graphics card emulation. * - * Version: @(#)vid_ati_mach64.c 1.0.10 2018/01/21 + * Version: @(#)vid_ati_mach64.c 1.0.11 2018/01/25 * * Authors: Sarah Walker, * Miran Grca, @@ -41,7 +41,7 @@ #endif #define BIOS_ROM_PATH L"roms/video/mach64/bios.bin" -#define BIOS_ISA_ROM_PATH L"roms/video/mach64/mach64.bin" +#define BIOS_ISA_ROM_PATH L"roms/video/mach64/M64-1994.VBI" #define BIOS_VLB_ROM_PATH L"roms/video/mach64/mach64_vlb_vram.bin" #define BIOS_ROMVT2_PATH L"roms/video/mach64/atimach64vt2pci.bin" @@ -3389,7 +3389,7 @@ static void *mach64gx_init(device_t *info) mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/ if (info->flags & DEVICE_PCI) mach64->config_stat0 |= 0; /*PCI, 256Kx16 DRAM*/ - else if (info->flags & DEVICE_VLB) + else if ((info->flags & DEVICE_VLB) || (info->flags & DEVICE_ISA)) mach64->config_stat0 |= 1; /*VLB, 256Kx16 DRAM*/ ati_eeprom_load(&mach64->eeprom, L"mach64.nvr", 1); @@ -3398,6 +3398,8 @@ static void *mach64gx_init(device_t *info) rom_init(&mach64->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); else if (info->flags & DEVICE_VLB) rom_init(&mach64->bios_rom, BIOS_VLB_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + else if (info->flags & DEVICE_ISA) + rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); return mach64; } @@ -3559,6 +3561,19 @@ static device_config_t mach64vt2_config[] = } }; +device_t mach64gx_isa_device = +{ + "ATI Mach64GX ISA", + DEVICE_ISA, + 0, + mach64gx_init, mach64_close, NULL, + mach64gx_isa_available, + mach64_speed_changed, + mach64_force_redraw, + mach64_add_status_info, + mach64gx_config +}; + device_t mach64gx_vlb_device = { "ATI Mach64GX VLB", diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index c256b7b44..69d1350e9 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -8,13 +8,13 @@ * * Emulation of the old and new IBM CGA graphics cards. * - * Version: @(#)vid_cga.c 1.0.12 2017/12/31 + * Version: @(#)vid_cga.c 1.0.13 2018/01/25 * * Authors: Sarah Walker, * Miran Grca, * - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016,2017 Miran Grca. + * Copyright 2008-2018 Sarah Walker. + * Copyright 2016-2018 Miran Grca. */ #include #include @@ -140,17 +140,17 @@ void cga_recalctimings(cga_t *cga) /* pclog("Recalc - %i %i %i\n", cga->crtc[0], cga->crtc[1], cga->cgamode & 1); */ if (cga->cgamode & 1) { - disptime = cga->crtc[0] + 1; - _dispontime = cga->crtc[1]; + disptime = (double) (cga->crtc[0] + 1); + _dispontime = (double) cga->crtc[1]; } else { - disptime = (cga->crtc[0] + 1) << 1; - _dispontime = cga->crtc[1] << 1; + disptime = (double) ((cga->crtc[0] + 1) << 1); + _dispontime = (double) (cga->crtc[1] << 1); } _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST; - _dispofftime *= CGACONST; + _dispontime = _dispontime * CGACONST; + _dispofftime = _dispofftime * CGACONST; cga->dispontime = (int64_t)(_dispontime * (1LL << TIMER_SHIFT)); cga->dispofftime = (int64_t)(_dispofftime * (1LL << TIMER_SHIFT)); } diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index a8dfcd446..480e74905 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -377,22 +377,23 @@ void ega_recalctimings(ega_t *ega) if (ega->vidclock) crtcconst = (ega->seqregs[1] & 1) ? MDACONST : (MDACONST * (9.0 / 8.0)); else crtcconst = (ega->seqregs[1] & 1) ? CGACONST : (CGACONST * (9.0 / 8.0)); - disptime = ega->crtc[0] + 2; - _dispontime = ega->crtc[1] + 1; - if (ega->seqregs[1] & 8) { - disptime*=2; - _dispontime*=2; + disptime = (double) ((ega->crtc[0] + 2) << 1); + _dispontime = (double) ((ega->crtc[1] + 1) << 1); + overscan_y <<= 1; - } + } else { + disptime = (double) (ega->crtc[0] + 2); + _dispontime = (double) (ega->crtc[1] + 1); + } if (overscan_y < 16) { overscan_y = 16; } _dispofftime = disptime - _dispontime; - _dispontime *= crtcconst; - _dispofftime *= crtcconst; + _dispontime = _dispontime * crtcconst; + _dispofftime = _dispofftime * crtcconst; ega->dispontime = (int64_t)(_dispontime * (1LL << TIMER_SHIFT)); ega->dispofftime = (int64_t)(_dispofftime * (1LL << TIMER_SHIFT)); @@ -980,6 +981,7 @@ void ega_init(ega_t *ega, int monitor_type, int is_mono) update_overscan = 0; ega->crtc[0] = 63; + ega->crtc[6] = 255; #ifdef JEGA ega->is_jega = 0; diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index fe8702993..1278778d3 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -10,13 +10,13 @@ * * Known bugs: Accelerator doesn't work in planar modes * - * Version: @(#)vid_et4000w32.c 1.0.4 2017/11/04 + * Version: @(#)vid_et4000w32.c 1.0.5 2018/01/25 * * Authors: Sarah Walker, * Miran Grca, * - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016,2017 Miran Grca. + * Copyright 2008-2018 Sarah Walker. + * Copyright 2016-2018 Miran Grca. */ #include #include @@ -33,11 +33,16 @@ #include "../plat.h" #include "video.h" #include "vid_svga.h" +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #include "vid_icd2061.h" +#endif #include "vid_stg_ramdac.h" -#define BIOS_ROM_PATH L"roms/video/et4000w32/et4000w32.bin" +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) +#define BIOS_ROM_PATH_DIAMOND L"roms/video/et4000w32/et4000w32.bin" +#endif +#define BIOS_ROM_PATH_CARDEX L"roms/video/et4000w32/cardex.vbi" #define FIFO_SIZE 65536 @@ -51,6 +56,14 @@ #define FIFO_TYPE 0xff000000 #define FIFO_ADDR 0x00ffffff +enum +{ + ET4000W32_CARDEX = 0, +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) + ET4000W32_DIAMOND +#endif +}; + enum { FIFO_INVALID = (0x00 << 24), @@ -73,7 +86,9 @@ typedef struct et4000w32p_t svga_t svga; stg_ramdac_t ramdac; +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) icd2061_t icd2061; +#endif int index; int pci; @@ -129,6 +144,7 @@ typedef struct et4000w32p_t int blitter_busy; uint64_t blitter_time; uint64_t status_time; + int type; } et4000w32p_t; void et4000w32p_recalcmapping(et4000w32p_t *et4000); @@ -150,9 +166,12 @@ void et4000w32p_out(uint16_t addr, uint8_t val, void *p) switch (addr) { +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) case 0x3c2: - icd2061_write(&et4000->icd2061, (val >> 2) & 3); + if (et4000->type = ET4000W32_DIAMOND) + icd2061_write(&et4000->icd2061, (val >> 2) & 3); break; +#endif case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: stg_ramdac_out(addr, val, &et4000->ramdac, svga); @@ -289,12 +308,23 @@ void et4000w32p_recalctimings(svga_t *svga) if (svga->crtc[0x3F] & 0x01) svga->htotal += 256; if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1; - switch ((svga->miscout >> 2) & 3) - { - case 0: case 1: break; - case 2: case 3: svga->clock = cpuclock / icd2061_getfreq(&et4000->icd2061, 2); break; - } - +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) + if (et4000->type == ET4000W32_DIAMOND) + { + switch ((svga->miscout >> 2) & 3) + { + case 0: case 1: break; + case 2: case 3: svga->clock = cpuclock / icd2061_getfreq(&et4000->icd2061, 2); break; + } + } + else + { +#endif + svga->clock = cpuclock / stg_getclock((svga->miscout >> 2) & 3, &et4000->ramdac); +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) + } +#endif + switch (svga->bpp) { case 15: case 16: @@ -683,7 +713,7 @@ static int et4000w32_max_x[8]={0,0,4,8,16,32,64,0x70000000}; static int et4000w32_wrap_x[8]={0,0,3,7,15,31,63,0xFFFFFFFF}; static int et4000w32_wrap_y[8]={1,2,4,8,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF}; -int bltout=0; +/* int bltout=0; */ void et4000w32_blit_start(et4000w32p_t *et4000) { if (!(et4000->acl.queued.xy_dir & 0x20)) @@ -809,10 +839,10 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 { while (count--) { - if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); + /* if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); */ pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff]; source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff]; - if (bltout) pclog("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff); + /* if (bltout) pclog("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff); */ if (cpu_input == 2) { source = sdat & 0xff; @@ -820,11 +850,11 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 } dest = svga->vram[et4000->acl.dest_addr & 0x1fffff]; out = 0; - if (bltout) pclog("%06X ", et4000->acl.dest_addr); + /* if (bltout) pclog("%06X ", et4000->acl.dest_addr); */ if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff] & (1 << (et4000->acl.mix_addr & 7)); - if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); + /* if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); */ } else { @@ -841,7 +871,7 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 if (pattern & (1 << c)) d |= 4; if (rop & (1 << d)) out |= (1 << c); } - if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); + /* if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); */ if (!(et4000->acl.internal.ctrl_routing & 0x40)) { svga->vram[et4000->acl.dest_addr & 0x1fffff] = out; @@ -924,11 +954,11 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 { while (count--) { - if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); + /* if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); */ pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff]; source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff]; - if (bltout) pclog("%i %06X %06X %02X %02X ", et4000->acl.pattern_y, (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff, pattern, source); + /* if (bltout) pclog("%i %06X %06X %02X %02X ", et4000->acl.pattern_y, (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff, pattern, source); */ if (cpu_input == 2) { @@ -937,11 +967,11 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 } dest = svga->vram[et4000->acl.dest_addr & 0x1fffff]; out = 0; - if (bltout) pclog("%06X %02X %i %08X %08X ", dest, et4000->acl.dest_addr, mix & 1, mix, et4000->acl.mix_addr); + /* if (bltout) pclog("%06X %02X %i %08X %08X ", dest, et4000->acl.dest_addr, mix & 1, mix, et4000->acl.mix_addr); */ if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff] & (1 << (et4000->acl.mix_addr & 7)); - if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); + /* if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); */ } else { @@ -958,7 +988,7 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 if (pattern & (1 << c)) d |= 4; if (rop & (1 << d)) out |= (1 << c); } - if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); + /* if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); */ if (!(et4000->acl.internal.ctrl_routing & 0x40)) { svga->vram[et4000->acl.dest_addr & 0x1fffff] = out; @@ -1148,12 +1178,12 @@ void et4000w32p_pci_write(int func, int addr, uint8_t val, void *p) { addr = 0xC0000; } - pclog("ET4000 bios_rom enabled at %08x\n", addr); + /* pclog("ET4000 bios_rom enabled at %08x\n", addr); */ mem_mapping_set_addr(&et4000->bios_rom.mapping, addr, 0x8000); } else { - pclog("ET4000 bios_rom disabled\n"); + /* pclog("ET4000 bios_rom disabled\n"); */ mem_mapping_disable(&et4000->bios_rom.mapping); } return; @@ -1176,7 +1206,20 @@ void *et4000w32p_init(device_t *info) et4000w32p_hwcursor_draw, NULL); - rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + et4000->type = info->local; + + switch(et4000->type) { + case ET4000W32_CARDEX: + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_CARDEX, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + break; +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) + case ET4000W32_DIAMOND: + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_DIAMOND, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + break; +#endif + } et4000->pci = !!(info->flags & DEVICE_PCI); if (info->flags & DEVICE_PCI) mem_mapping_disable(&et4000->bios_rom.mapping); @@ -1211,9 +1254,16 @@ void *et4000w32p_init(device_t *info) return et4000; } +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) int et4000w32p_available(void) { - return rom_present(BIOS_ROM_PATH); + return rom_present(BIOS_ROM_PATH_DIAMOND); +} +#endif + +int et4000w32p_cardex_available(void) +{ + return rom_present(BIOS_ROM_PATH_CARDEX); } void et4000w32p_close(void *p) @@ -1280,10 +1330,35 @@ static device_config_t et4000w32p_config[] = } }; +device_t et4000w32p_cardex_vlb_device = +{ + "Tseng Labs ET4000/w32p VLB (Cardex)", + DEVICE_VLB, ET4000W32_CARDEX, + et4000w32p_init, et4000w32p_close, NULL, + et4000w32p_cardex_available, + et4000w32p_speed_changed, + et4000w32p_force_redraw, + et4000w32p_add_status_info, + et4000w32p_config +}; + +device_t et4000w32p_cardex_pci_device = +{ + "Tseng Labs ET4000/w32p PCI (Cardex)", + DEVICE_PCI, ET4000W32_CARDEX, + et4000w32p_init, et4000w32p_close, NULL, + et4000w32p_cardex_available, + et4000w32p_speed_changed, + et4000w32p_force_redraw, + et4000w32p_add_status_info, + et4000w32p_config +}; + +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) device_t et4000w32p_vlb_device = { - "Tseng Labs ET4000/w32p VLB", - DEVICE_VLB, 0, + "Tseng Labs ET4000/w32p VLB (Diamond)", + DEVICE_VLB, ET4000W32_DIAMOND, et4000w32p_init, et4000w32p_close, NULL, et4000w32p_available, et4000w32p_speed_changed, @@ -1294,8 +1369,8 @@ device_t et4000w32p_vlb_device = device_t et4000w32p_pci_device = { - "Tseng Labs ET4000/w32p PCI", - DEVICE_PCI, 0, + "Tseng Labs ET4000/w32p PCI (Diamond)", + DEVICE_PCI, ET4000W32_DIAMOND, et4000w32p_init, et4000w32p_close, NULL, et4000w32p_available, et4000w32p_speed_changed, @@ -1303,3 +1378,4 @@ device_t et4000w32p_pci_device = et4000w32p_add_status_info, et4000w32p_config }; +#endif diff --git a/src/video/vid_et4000w32.h b/src/video/vid_et4000w32.h index 4f62b98cb..7abe28038 100644 --- a/src/video/vid_et4000w32.h +++ b/src/video/vid_et4000w32.h @@ -1,2 +1,7 @@ +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) extern device_t et4000w32p_vlb_device; extern device_t et4000w32p_pci_device; +#endif + +extern device_t et4000w32p_cardex_vlb_device; +extern device_t et4000w32p_cardex_pci_device; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 683ac1da3..ef78a673a 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -19,6 +19,7 @@ * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 Miran Grca. */ +#include #include #include #include @@ -605,13 +606,16 @@ void svga_recalctimings(svga_t *svga) crtcconst = (svga->seqregs[1] & 1) ? (svga->clock * 8.0) : (svga->clock * 9.0); - disptime = svga->htotal; - _dispontime = svga->hdisp_time; - - if (svga->seqregs[1] & 8) { disptime *= 2; _dispontime *= 2; } + if (svga->seqregs[1] & 8) { + disptime = (double) (svga->htotal << 1); + _dispontime = (double) (svga->hdisp_time << 1); + } else { + disptime = (double) svga->htotal; + _dispontime = (double) svga->hdisp_time; + } _dispofftime = disptime - _dispontime; - _dispontime *= crtcconst; - _dispofftime *= crtcconst; + _dispontime = _dispontime * crtcconst; + _dispofftime = _dispofftime * crtcconst; svga->dispontime = (int64_t)(_dispontime * (1 << TIMER_SHIFT)); svga->dispofftime = (int64_t)(_dispofftime * (1 << TIMER_SHIFT)); @@ -900,7 +904,7 @@ int svga_init(svga_t *svga, void *p, int memsize, overscan_x = 16; overscan_y = 32; - svga->crtc[0] = 63; + svga->crtc[0] = svga->crtc[1] = 63; svga->crtc[6] = 255; svga->dispontime = 1000 * (1 << TIMER_SHIFT); svga->dispofftime = 1000 * (1 << TIMER_SHIFT); @@ -955,7 +959,7 @@ void svga_write(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_b; cycles_lost += video_timing_b; - if (svga_output) pclog("Writeega %06X ",addr); + /* if (svga_output) pclog("Writeega %06X ",addr); */ addr &= svga->banked_mask; addr += svga->write_bank; @@ -1009,7 +1013,7 @@ void svga_write(uint32_t addr, uint8_t val, void *p) addr &= svga->vram_mask; - if (svga_output) pclog("%08X (%i, %i) %02X %i %i %i %02X\n", addr, addr & 1023, addr >> 10, val, writemask2, svga->writemode, svga->chain4, svga->gdcreg[8]); + /* if (svga_output) pclog("%08X (%i, %i) %02X %i %i %i %02X\n", addr, addr & 1023, addr >> 10, val, writemask2, svga->writemode, svga->chain4, svga->gdcreg[8]); */ svga->changedvram[addr >> 12] = changeframecount; switch (svga->writemode) @@ -1252,7 +1256,7 @@ void svga_write_linear(uint32_t addr, uint8_t val, void *p) egawrites++; - if (svga_output) pclog("Write LFB %08X %02X ", addr, val); + /* if (svga_output) pclog("Write LFB %08X %02X ", addr, val); */ if (!(svga->gdcreg[6] & 1)) svga->fullchange = 2; addr -= svga->linear_base; @@ -1290,7 +1294,7 @@ void svga_write_linear(uint32_t addr, uint8_t val, void *p) addr &= svga->decode_mask; if (addr >= svga->vram_max) return; - if (svga_output) pclog("%08X\n", addr); + /* if (svga_output) pclog("%08X\n", addr); */ addr &= svga->vram_mask; svga->changedvram[addr >> 12]=changeframecount; @@ -1617,14 +1621,14 @@ void svga_writew(uint32_t addr, uint16_t val, void *p) cycles -= video_timing_w; cycles_lost += video_timing_w; - if (svga_output) pclog("svga_writew: %05X ", addr); + /* if (svga_output) pclog("svga_writew: %05X ", addr); */ addr = (addr & svga->banked_mask) + svga->write_bank; if ((!svga->extvram) && (addr >= 0x10000)) return; addr &= svga->decode_mask; if (addr >= svga->vram_max) return; addr &= svga->vram_mask; - if (svga_output) pclog("%08X (%i, %i) %04X\n", addr, addr & 1023, addr >> 10, val); + /* if (svga_output) pclog("%08X (%i, %i) %04X\n", addr, addr & 1023, addr >> 10, val); */ svga->changedvram[addr >> 12] = changeframecount; *(uint16_t *)&svga->vram[addr] = val; } @@ -1647,15 +1651,15 @@ void svga_writel(uint32_t addr, uint32_t val, void *p) cycles -= video_timing_l; cycles_lost += video_timing_l; - if (svga_output) pclog("svga_writel: %05X ", addr); + /* if (svga_output) pclog("svga_writel: %05X ", addr); */ addr = (addr & svga->banked_mask) + svga->write_bank; if ((!svga->extvram) && (addr >= 0x10000)) return; addr &= svga->decode_mask; if (addr >= svga->vram_max) return; addr &= svga->vram_mask; - if (svga_output) pclog("%08X (%i, %i) %08X\n", addr, addr & 1023, addr >> 10, val); - + /* if (svga_output) pclog("%08X (%i, %i) %08X\n", addr, addr & 1023, addr >> 10, val); */ + svga->changedvram[addr >> 12] = changeframecount; *(uint32_t *)&svga->vram[addr] = val; } @@ -1721,7 +1725,7 @@ void svga_writew_linear(uint32_t addr, uint16_t val, void *p) cycles -= video_timing_w; cycles_lost += video_timing_w; - if (svga_output) pclog("Write LFBw %08X %04X\n", addr, val); + /* if (svga_output) pclog("Write LFBw %08X %04X\n", addr, val); */ addr -= svga->linear_base; addr &= svga->decode_mask; if (addr >= svga->vram_max) @@ -1749,7 +1753,7 @@ void svga_writel_linear(uint32_t addr, uint32_t val, void *p) cycles -= video_timing_l; cycles_lost += video_timing_l; - if (svga_output) pclog("Write LFBl %08X %08X\n", addr, val); + /* if (svga_output) pclog("Write LFBl %08X %08X\n", addr, val); */ addr -= svga->linear_base; addr &= svga->decode_mask; if (addr >= svga->vram_max) diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 8543bb9cf..7646b5903 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -8,7 +8,7 @@ * * Define all known video cards. * - * Version: @(#)vid_table.c 1.0.10 2018/01/21 + * Version: @(#)vid_table.c 1.0.11 2018/01/25 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -82,6 +82,8 @@ video_cards[] = { NULL, GFX_NONE }, { "Internal", "internal", NULL, GFX_INTERNAL }, + {"[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", + &mach64gx_isa_device, GFX_MACH64GX_VLB }, { "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER }, { "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", @@ -125,9 +127,12 @@ video_cards[] = { { "[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000 }, {"[ISA] VGA", "vga", &vga_device, GFX_VGA }, {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700 }, - {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64x_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI }, + {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI }, {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2 }, + {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI }, +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) {"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI }, +#endif {"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci", &s3_virge_pci_device, GFX_VIRGE_PCI }, {"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci", &s3_virge_988_pci_device, GFX_VIRGEVX_PCI }, {"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device, GFX_STEALTH64_PCI }, @@ -144,13 +149,16 @@ video_cards[] = { {"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI }, {"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci", &s3_virge_375_4_pci_device, GFX_VIRGEDX4_PCI }, {"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI }, - {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64x_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB }, + {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB }, + {"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device, GFX_ET4000W32_CARDEX_VLB }, #if defined(DEV_BRANCH) && defined(USE_CIRRUS) {"[VLB] Cirrus Logic CL-GD5429", "cl_gd5429", &gd5429_device, GFX_CL_GD5429 }, {"[VLB] Cirrus Logic CL-GD5430", "cl_gd5430_vlb", &dia5430_device, GFX_CL_GD5430 }, {"[VLB] Cirrus Logic CL-GD5446", "cl_gd5446", &gd5446_device, GFX_CL_GD5446 }, #endif +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) {"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB }, +#endif {"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb", &s3_virge_vlb_device, GFX_VIRGE_VLB }, {"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb", &s3_virge_988_vlb_device, GFX_VIRGEVX_VLB }, {"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device, GFX_STEALTH64_VLB }, diff --git a/src/video/video.h b/src/video/video.h index 7ad358bd8..ccca85d04 100644 --- a/src/video/video.h +++ b/src/video/video.h @@ -8,7 +8,7 @@ * * Definitions for the video controller module. * - * Version: @(#)video.h 1.0.8 2018/01/21 + * Version: @(#)video.h 1.0.9 2018/01/25 * * Authors: Sarah Walker, * Miran Grca, @@ -45,8 +45,12 @@ enum { GFX_VGA, /* IBM VGA */ GFX_TVGA, /* Using Trident TVGA8900D BIOS */ GFX_ET4000, /* Tseng ET4000 */ + GFX_ET4000W32_CARDEX_VLB, /* Tseng ET4000/W32p (Cardex) VLB */ + GFX_ET4000W32_CARDEX_PCI, /* Tseng ET4000/W32p (Cardex) PCI */ +#if defined(DEV_BRANCH) && defined(USE_STEALTH32) GFX_ET4000W32_VLB, /* Tseng ET4000/W32p (Diamond Stealth 32) VLB */ GFX_ET4000W32_PCI, /* Tseng ET4000/W32p (Diamond Stealth 32) PCI */ +#endif GFX_BAHAMAS64_VLB, /* S3 Vision864 (Paradise Bahamas 64) VLB */ GFX_BAHAMAS64_PCI, /* S3 Vision864 (Paradise Bahamas 64) PCI */ GFX_N9_9FX_VLB, /* S3 764/Trio64 (Number Nine 9FX) VLB */ @@ -57,6 +61,7 @@ enum { GFX_VGACHARGER, /* ATI VGA Charger (28800-5) */ GFX_VGAWONDERXL, /* Compaq ATI VGA Wonder XL (28800-5) */ GFX_VGAWONDERXL24, /* Compaq ATI VGA Wonder XL24 (28800-6) */ + GFX_MACH64GX_ISA, /* ATI Graphics Pro Turbo (Mach64) ISA */ GFX_MACH64GX_VLB, /* ATI Graphics Pro Turbo (Mach64) VLB */ GFX_MACH64GX_PCI, /* ATI Graphics Pro Turbo (Mach64) PCI */ GFX_MACH64VT2, /* ATI Mach64 VT2 */ diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 9e5e73873..34174b444 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.92 2018/01/16 +# Version: @(#)Makefile.mingw 1.0.93 2018/01/25 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -92,6 +92,9 @@ endif ifndef PAS16 PAS16 := n endif +ifndef STEALTH32 +STEALTH32 := n +endif ifndef DYNAREC DYNAREC := y endif @@ -116,6 +119,7 @@ NE1000 := y NV_RIVA := y PAS16 := y PORTABLE3 := y +STEALTH32 := y VNC := y endif @@ -337,6 +341,10 @@ ifeq ($(PORTABLE3), y) OPTS += -DUSE_PORTABLE3 endif +ifeq ($(STEALTH32), y) +OPTS += -DUSE_STEALTH32 +endif + endif