Fixed ISO loading;
Fixed ESDI and XT MFM hard disk initialization; The IDE SET_FEATURES command is now actually recognized by the command register write handler.
This commit is contained in:
OBattler
657
src/ide.c
657
src/ide.c
@@ -905,7 +905,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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switch (addr)
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{
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case 0x1F0: /* Data */
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case 0x1F0: /* Data */
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writeidew(ide_board, val | (val << 8));
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return;
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@@ -924,7 +924,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide_other->cylprecomp = val;
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return;
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case 0x1F2: /* Sector count */
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case 0x1F2: /* Sector count */
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if (ide_drive_is_cdrom(ide))
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{
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ide_log("Sector count write: %i\n", val);
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@@ -940,14 +940,14 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide_other->secount = val;
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return;
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case 0x1F3: /* Sector */
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case 0x1F3: /* Sector */
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ide->sector = val;
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ide->lba_addr = (ide->lba_addr & 0xFFFFF00) | val;
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ide_other->sector = val;
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ide_other->lba_addr = (ide_other->lba_addr & 0xFFFFF00) | val;
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return;
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case 0x1F4: /* Cylinder low */
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case 0x1F4: /* Cylinder low */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length &= 0xFF00;
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@@ -965,7 +965,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide_other->lba_addr = (ide_other->lba_addr&0xFFF00FF) | (val << 8);
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return;
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case 0x1F5: /* Cylinder high */
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case 0x1F5: /* Cylinder high */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length &= 0xFF;
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@@ -983,7 +983,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide_other->lba_addr = (ide_other->lba_addr & 0xF00FFFF) | (val << 16);
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return;
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case 0x1F6: /* Drive/Head */
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case 0x1F6: /* Drive/Head */
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if (cur_ide[ide_board] != ((val>>4)&1)+(ide_board<<1))
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{
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cur_ide[ide_board]=((val>>4)&1)+(ide_board<<1);
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@@ -1036,254 +1036,255 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide_irq_update(ide);
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return;
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case 0x1F7: /* Command register */
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case 0x1F7: /* Command register */
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if (ide->type == IDE_NONE)
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{
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return;
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}
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ide_irq_lower(ide);
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ide->command=val;
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ide_irq_lower(ide);
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ide->command=val;
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ide->error=0;
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].error = 0;
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}
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switch (val)
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{
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case WIN_SRST: /* ATAPI Device Reset */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = READY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
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}
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idecallback[ide_board]=100*IDE_TIME;
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timer_update_outstanding();
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return;
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ide->error=0;
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].error = 0;
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}
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switch (val)
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{
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case WIN_SRST: /* ATAPI Device Reset */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = READY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
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}
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idecallback[ide_board]=100*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_RESTORE:
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case WIN_SEEK:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT;
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}
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else
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{
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ide->atastat = READY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
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}
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idecallback[ide_board]=100*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_RESTORE:
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case WIN_SEEK:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT;
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}
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else
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{
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ide->atastat = READY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
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}
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idecallback[ide_board]=100*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_READ_MULTIPLE:
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/* Fatal removed in accordance with the official ATAPI reference:
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If the Read Multiple command is attempted before the Set Multiple Mode
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command has been executed or when Read Multiple commands are
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disabled, the Read Multiple operation is rejected with an Aborted Com-
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mand error. */
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ide->blockcount = 0;
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case WIN_READ:
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case WIN_READ_NORETRY:
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case WIN_READ_DMA:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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case WIN_READ_MULTIPLE:
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/* Fatal removed in accordance with the official ATAPI reference:
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If the Read Multiple command is attempted before the Set Multiple Mode
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command has been executed or when Read Multiple commands are
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disabled, the Read Multiple operation is rejected with an Aborted Com-
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mand error. */
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ide->blockcount = 0;
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case WIN_READ:
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case WIN_READ_NORETRY:
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case WIN_READ_DMA:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
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}
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idecallback[ide_board]=200*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_WRITE_MULTIPLE:
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if (!ide->blocksize && !ide_drive_is_cdrom(ide))
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{
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fatal("Write_MULTIPLE - blocksize = 0\n");
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}
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ide->blockcount = 0;
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case WIN_WRITE:
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case WIN_WRITE_NORETRY:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = DRQ_STAT | DSC_STAT | READY_STAT;
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cdrom[atapi_cdrom_drives[ide->channel]].pos = 0;
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}
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else
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{
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ide->atastat = DRQ_STAT | DSC_STAT | READY_STAT;
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ide->pos=0;
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}
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return;
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case WIN_WRITE_DMA:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
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}
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idecallback[ide_board]=200*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_VERIFY:
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case WIN_VERIFY_ONCE:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
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}
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idecallback[ide_board]=200*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_FORMAT:
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if (ide_drive_is_cdrom(ide))
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{
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goto ide_bad_command;
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}
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else
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{
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ide->atastat = DRQ_STAT;
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ide->pos=0;
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}
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return;
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case WIN_SPECIFY: /* Initialize Drive Parameters */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 30*IDE_TIME;
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}
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idecallback[ide_board]=30*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */
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case WIN_PIDENTIFY: /* Identify Packet Device */
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case WIN_SET_MULTIPLE_MODE: /* Set Multiple Mode */
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case WIN_SET_FEATURES: /* Set Features */
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case WIN_NOP:
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case WIN_STANDBYNOW1:
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case WIN_IDLENOW1:
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case WIN_SETIDLE1: /* Idle */
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case WIN_CHECKPOWERMODE1:
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case WIN_SLEEP1:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 30*IDE_TIME;
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}
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idecallback[ide_board]=30*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_IDENTIFY: /* Identify Device */
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case WIN_READ_NATIVE_MAX:
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
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}
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else
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{
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ide->atastat = BUSY_STAT;
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}
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
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}
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idecallback[ide_board]=200*IDE_TIME;
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timer_update_outstanding();
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return;
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case WIN_PACKETCMD: /* ATAPI Packet */
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/* Skip the command callback wait, and process immediately. */
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].packet_status = CDROM_PHASE_IDLE;
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cdrom[atapi_cdrom_drives[ide->channel]].pos=0;
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cdrom[atapi_cdrom_drives[ide->channel]].phase = 1;
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cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | DRQ_STAT | (cdrom[cur_ide[ide_board]].status & ERR_STAT);
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}
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else
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{
|
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ide->atastat = BUSY_STAT;
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timer_process();
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
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}
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idecallback[ide_board]=200*IDE_TIME;
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idecallback[ide_board]=1;
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timer_update_outstanding();
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return;
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case WIN_WRITE_MULTIPLE:
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if (!ide->blocksize && !ide_drive_is_cdrom(ide))
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{
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fatal("Write_MULTIPLE - blocksize = 0\n");
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}
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ide->blockcount = 0;
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case WIN_WRITE:
|
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case WIN_WRITE_NORETRY:
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if (ide_drive_is_cdrom(ide))
|
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{
|
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cdrom[atapi_cdrom_drives[ide->channel]].status = DRQ_STAT | DSC_STAT | READY_STAT;
|
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cdrom[atapi_cdrom_drives[ide->channel]].pos = 0;
|
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}
|
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else
|
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{
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ide->atastat = DRQ_STAT | DSC_STAT | READY_STAT;
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ide->pos=0;
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}
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return;
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ide->pos=0;
|
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}
|
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return;
|
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|
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case WIN_WRITE_DMA:
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if (ide_drive_is_cdrom(ide))
|
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{
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
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}
|
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else
|
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{
|
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ide->atastat = BUSY_STAT;
|
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}
|
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timer_process();
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if (ide_drive_is_cdrom(ide))
|
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{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
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}
|
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idecallback[ide_board]=200*IDE_TIME;
|
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timer_update_outstanding();
|
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return;
|
||||
|
||||
case WIN_VERIFY:
|
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case WIN_VERIFY_ONCE:
|
||||
if (ide_drive_is_cdrom(ide))
|
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{
|
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cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
||||
}
|
||||
else
|
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{
|
||||
ide->atastat = BUSY_STAT;
|
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}
|
||||
timer_process();
|
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if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
||||
}
|
||||
idecallback[ide_board]=200*IDE_TIME;
|
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timer_update_outstanding();
|
||||
return;
|
||||
|
||||
case WIN_FORMAT:
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
goto ide_bad_command;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = DRQ_STAT;
|
||||
ide->pos=0;
|
||||
}
|
||||
return;
|
||||
|
||||
case WIN_SPECIFY: /* Initialize Drive Parameters */
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = BUSY_STAT;
|
||||
}
|
||||
timer_process();
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].callback = 30*IDE_TIME;
|
||||
}
|
||||
idecallback[ide_board]=30*IDE_TIME;
|
||||
timer_update_outstanding();
|
||||
return;
|
||||
|
||||
case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */
|
||||
case WIN_PIDENTIFY: /* Identify Packet Device */
|
||||
case WIN_SET_MULTIPLE_MODE: /*Set Multiple Mode*/
|
||||
case WIN_NOP:
|
||||
case WIN_STANDBYNOW1:
|
||||
case WIN_IDLENOW1:
|
||||
case WIN_SETIDLE1: /* Idle */
|
||||
case WIN_CHECKPOWERMODE1:
|
||||
case WIN_SLEEP1:
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = BUSY_STAT;
|
||||
}
|
||||
timer_process();
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].callback = 30*IDE_TIME;
|
||||
}
|
||||
idecallback[ide_board]=30*IDE_TIME;
|
||||
timer_update_outstanding();
|
||||
return;
|
||||
|
||||
case WIN_IDENTIFY: /* Identify Device */
|
||||
case WIN_READ_NATIVE_MAX:
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = BUSY_STAT;
|
||||
}
|
||||
timer_process();
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
||||
}
|
||||
idecallback[ide_board]=200*IDE_TIME;
|
||||
timer_update_outstanding();
|
||||
return;
|
||||
|
||||
case WIN_PACKETCMD: /* ATAPI Packet */
|
||||
/* Skip the command callback wait, and process immediately. */
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].packet_status = CDROM_PHASE_IDLE;
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].pos=0;
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].phase = 1;
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | DRQ_STAT | (cdrom[cur_ide[ide_board]].status & ERR_STAT);
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = BUSY_STAT;
|
||||
timer_process();
|
||||
idecallback[ide_board]=1;
|
||||
timer_update_outstanding();
|
||||
ide->pos=0;
|
||||
}
|
||||
return;
|
||||
|
||||
case 0xF0:
|
||||
default:
|
||||
case 0xF0:
|
||||
default:
|
||||
ide_bad_command:
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | ERR_STAT | DSC_STAT;
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].error = ABRT_ERR;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = READY_STAT | ERR_STAT | DSC_STAT;
|
||||
ide->error = ABRT_ERR;
|
||||
}
|
||||
ide_irq_raise(ide);
|
||||
return;
|
||||
if (ide_drive_is_cdrom(ide))
|
||||
{
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | ERR_STAT | DSC_STAT;
|
||||
cdrom[atapi_cdrom_drives[ide->channel]].error = ABRT_ERR;
|
||||
}
|
||||
else
|
||||
{
|
||||
ide->atastat = READY_STAT | ERR_STAT | DSC_STAT;
|
||||
ide->error = ABRT_ERR;
|
||||
}
|
||||
ide_irq_raise(ide);
|
||||
return;
|
||||
}
|
||||
return;
|
||||
|
||||
@@ -1424,7 +1425,7 @@ uint8_t readide(int ide_board, uint16_t addr)
|
||||
|
||||
/* For ATAPI: Bits 7-4 = sense key, bit 3 = MCR (media change requested),
|
||||
Bit 2 = ABRT (aborted command), Bit 1 = EOM (end of media),
|
||||
and Bit 0 = ILI (illegal length indication). */
|
||||
and Bit 0 = ILI (illegal length indication). */
|
||||
case 0x1F1: /* Error */
|
||||
if (ide->type == IDE_NONE)
|
||||
{
|
||||
@@ -2125,161 +2126,159 @@ void ide_callback_qua()
|
||||
|
||||
void ide_write_pri(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
writeide(0, addr, val);
|
||||
writeide(0, addr, val);
|
||||
}
|
||||
void ide_write_pri_w(uint16_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
writeidew(0, val);
|
||||
writeidew(0, val);
|
||||
}
|
||||
void ide_write_pri_l(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
writeidel(0, val);
|
||||
writeidel(0, val);
|
||||
}
|
||||
uint8_t ide_read_pri(uint16_t addr, void *priv)
|
||||
{
|
||||
return readide(0, addr);
|
||||
return readide(0, addr);
|
||||
}
|
||||
uint16_t ide_read_pri_w(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidew(0);
|
||||
return readidew(0);
|
||||
}
|
||||
uint32_t ide_read_pri_l(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidel(0);
|
||||
return readidel(0);
|
||||
}
|
||||
|
||||
void ide_write_sec(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
writeide(1, addr, val);
|
||||
writeide(1, addr, val);
|
||||
}
|
||||
void ide_write_sec_w(uint16_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
writeidew(1, val);
|
||||
writeidew(1, val);
|
||||
}
|
||||
void ide_write_sec_l(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
writeidel(1, val);
|
||||
writeidel(1, val);
|
||||
}
|
||||
uint8_t ide_read_sec(uint16_t addr, void *priv)
|
||||
{
|
||||
return readide(1, addr);
|
||||
return readide(1, addr);
|
||||
}
|
||||
uint16_t ide_read_sec_w(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidew(1);
|
||||
return readidew(1);
|
||||
}
|
||||
uint32_t ide_read_sec_l(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidel(1);
|
||||
return readidel(1);
|
||||
}
|
||||
|
||||
/* *** REMOVE FROM CODE SUBMITTED TO MAINLINE - START *** */
|
||||
void ide_write_ter(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
writeide(2, addr, val);
|
||||
writeide(2, addr, val);
|
||||
}
|
||||
void ide_write_ter_w(uint16_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
writeidew(2, val);
|
||||
writeidew(2, val);
|
||||
}
|
||||
void ide_write_ter_l(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
writeidel(2, val);
|
||||
writeidel(2, val);
|
||||
}
|
||||
uint8_t ide_read_ter(uint16_t addr, void *priv)
|
||||
{
|
||||
return readide(2, addr);
|
||||
return readide(2, addr);
|
||||
}
|
||||
uint16_t ide_read_ter_w(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidew(2);
|
||||
return readidew(2);
|
||||
}
|
||||
uint32_t ide_read_ter_l(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidel(2);
|
||||
return readidel(2);
|
||||
}
|
||||
|
||||
void ide_write_qua(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
writeide(3, addr, val);
|
||||
writeide(3, addr, val);
|
||||
}
|
||||
void ide_write_qua_w(uint16_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
writeidew(3, val);
|
||||
writeidew(3, val);
|
||||
}
|
||||
void ide_write_qua_l(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
writeidel(3, val);
|
||||
writeidel(3, val);
|
||||
}
|
||||
uint8_t ide_read_qua(uint16_t addr, void *priv)
|
||||
{
|
||||
return readide(3, addr);
|
||||
return readide(3, addr);
|
||||
}
|
||||
uint16_t ide_read_qua_w(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidew(3);
|
||||
return readidew(3);
|
||||
}
|
||||
uint32_t ide_read_qua_l(uint16_t addr, void *priv)
|
||||
{
|
||||
return readidel(3);
|
||||
return readidel(3);
|
||||
}
|
||||
/* *** REMOVE FROM CODE SUBMITTED TO MAINLINE - END *** */
|
||||
|
||||
static uint16_t ide_base_main[2] = { 0x1f0, 0x170 };
|
||||
static uint16_t ide_side_main[2] = { 0x3f6, 0x376 };
|
||||
|
||||
void ide_pri_enable()
|
||||
{
|
||||
io_sethandler(0x01f0, 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
io_sethandler(0x03f6, 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
ide_base_main[0] = 0x1f0;
|
||||
ide_side_main[0] = 0x3f6;
|
||||
io_sethandler(0x01f0, 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
io_sethandler(0x03f6, 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
ide_base_main[0] = 0x1f0;
|
||||
ide_side_main[0] = 0x3f6;
|
||||
}
|
||||
|
||||
void ide_pri_enable_ex()
|
||||
{
|
||||
if (ide_base_main[0] & 0x300)
|
||||
{
|
||||
pclog("Enabling primary base (%04X)...\n", ide_base_main[0]);
|
||||
io_sethandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
}
|
||||
if (ide_side_main[0] & 0x300)
|
||||
{
|
||||
pclog("Enabling primary side (%04X)...\n", ide_side_main[0]);
|
||||
io_sethandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
}
|
||||
if (ide_base_main[0] & 0x300)
|
||||
{
|
||||
pclog("Enabling primary base (%04X)...\n", ide_base_main[0]);
|
||||
io_sethandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
}
|
||||
if (ide_side_main[0] & 0x300)
|
||||
{
|
||||
pclog("Enabling primary side (%04X)...\n", ide_side_main[0]);
|
||||
io_sethandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
}
|
||||
}
|
||||
|
||||
void ide_pri_disable()
|
||||
{
|
||||
io_removehandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
io_removehandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
io_removehandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
||||
io_removehandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_sec_enable()
|
||||
{
|
||||
io_sethandler(0x0170, 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
io_sethandler(0x0376, 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
ide_base_main[1] = 0x170;
|
||||
ide_side_main[1] = 0x376;
|
||||
io_sethandler(0x0170, 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
io_sethandler(0x0376, 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
ide_base_main[1] = 0x170;
|
||||
ide_side_main[1] = 0x376;
|
||||
}
|
||||
|
||||
void ide_sec_enable_ex()
|
||||
{
|
||||
if (ide_base_main[1] & 0x300)
|
||||
{
|
||||
io_sethandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
}
|
||||
if (ide_side_main[1] & 0x300)
|
||||
{
|
||||
io_sethandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
}
|
||||
if (ide_base_main[1] & 0x300)
|
||||
{
|
||||
io_sethandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
}
|
||||
if (ide_side_main[1] & 0x300)
|
||||
{
|
||||
io_sethandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
}
|
||||
}
|
||||
|
||||
void ide_sec_disable()
|
||||
{
|
||||
io_removehandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
io_removehandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
io_removehandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
||||
io_removehandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_set_base(int controller, uint16_t port)
|
||||
@@ -2292,75 +2291,73 @@ void ide_set_side(int controller, uint16_t port)
|
||||
ide_side_main[controller] = port;
|
||||
}
|
||||
|
||||
/* *** REMOVE FROM CODE SUBMITTED TO MAINLINE - START *** */
|
||||
void ide_ter_enable()
|
||||
{
|
||||
io_sethandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
||||
io_sethandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
||||
io_sethandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
||||
io_sethandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_ter_disable()
|
||||
{
|
||||
io_removehandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
||||
io_removehandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
||||
io_removehandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
||||
io_removehandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_ter_disable_cond()
|
||||
{
|
||||
if ((ide_drives[4].type == IDE_NONE) && (ide_drives[5].type == IDE_NONE))
|
||||
{
|
||||
ide_ter_disable();
|
||||
}
|
||||
if ((ide_drives[4].type == IDE_NONE) && (ide_drives[5].type == IDE_NONE))
|
||||
{
|
||||
ide_ter_disable();
|
||||
}
|
||||
}
|
||||
|
||||
void ide_ter_init()
|
||||
{
|
||||
ide_ter_enable();
|
||||
ide_ter_enable();
|
||||
|
||||
timer_add(ide_callback_ter, &idecallback[2], &idecallback[2], NULL);
|
||||
timer_add(ide_callback_ter, &idecallback[2], &idecallback[2], NULL);
|
||||
}
|
||||
|
||||
void ide_qua_enable()
|
||||
{
|
||||
io_sethandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
||||
io_sethandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
||||
io_sethandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
||||
io_sethandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_qua_disable_cond()
|
||||
{
|
||||
if ((ide_drives[6].type == IDE_NONE) && (ide_drives[7].type == IDE_NONE))
|
||||
{
|
||||
ide_qua_disable();
|
||||
}
|
||||
if ((ide_drives[6].type == IDE_NONE) && (ide_drives[7].type == IDE_NONE))
|
||||
{
|
||||
ide_qua_disable();
|
||||
}
|
||||
}
|
||||
|
||||
void ide_qua_disable()
|
||||
{
|
||||
io_removehandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
||||
io_removehandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
||||
io_removehandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
||||
io_removehandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
||||
}
|
||||
|
||||
void ide_qua_init()
|
||||
{
|
||||
ide_qua_enable();
|
||||
ide_qua_enable();
|
||||
|
||||
timer_add(ide_callback_qua, &idecallback[3], &idecallback[3], NULL);
|
||||
timer_add(ide_callback_qua, &idecallback[3], &idecallback[3], NULL);
|
||||
}
|
||||
/* *** REMOVE FROM CODE SUBMITTED TO MAINLINE - END *** */
|
||||
|
||||
void ide_init()
|
||||
{
|
||||
ide_pri_enable();
|
||||
ide_sec_enable();
|
||||
ide_bus_master_read = ide_bus_master_write = NULL;
|
||||
|
||||
timer_add(ide_callback_pri, &idecallback[0], &idecallback[0], NULL);
|
||||
timer_add(ide_callback_sec, &idecallback[1], &idecallback[1], NULL);
|
||||
ide_pri_enable();
|
||||
ide_sec_enable();
|
||||
ide_bus_master_read = ide_bus_master_write = NULL;
|
||||
|
||||
timer_add(ide_callback_pri, &idecallback[0], &idecallback[0], NULL);
|
||||
timer_add(ide_callback_sec, &idecallback[1], &idecallback[1], NULL);
|
||||
}
|
||||
|
||||
void ide_set_bus_master(int (*read)(int channel, uint8_t *data, int transfer_length), int (*write)(int channel, uint8_t *data, int transfer_length), void (*set_irq)(int channel))
|
||||
{
|
||||
ide_bus_master_read = read;
|
||||
ide_bus_master_write = write;
|
||||
ide_bus_master_set_irq = set_irq;
|
||||
ide_bus_master_read = read;
|
||||
ide_bus_master_write = write;
|
||||
ide_bus_master_set_irq = set_irq;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user