From db3364fb4b2f4f5f146f1e38b7dc46724a911d48 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Jul 2020 17:25:30 +0200 Subject: [PATCH 1/2] Fixed the machine table, fixes #928. --- src/machine/machine_table.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index a95c244b3..cb03c2bfa 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -147,8 +147,8 @@ const machine_t machines[] = { { "[SCAT] Samsung SPC-4200P", "spc4200p", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 512, 2048, 128, 127, machine_at_spc4200p_init, NULL }, { "[SCAT] Samsung SPC-4216P", "spc4216p", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 1, 5, 1, 127, machine_at_spc4216p_init, NULL }, { "[SCAT] Samsung Deskmaster 286", "deskmaster286", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_deskmaster286_init, NULL }, - { "[HT18] Quadtel 286 clone", "quadt286", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_quadt286_init, NULL }, - { "[HT18] Trigem 286M", "tg286m", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_tg286m_init, NULL }, + { "[GC103] Quadtel 286 clone", "quadt286", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_quadt286_init, NULL }, + { "[GC103] Trigem 286M", "tg286m", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_tg286m_init, NULL }, { "[ISA] MR 286 clone", "mr286", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_mr286_init, NULL }, #if defined(DEV_BRANCH) && defined(USE_SIEMENS) { "[ISA] Siemens PCD-2L", "siemens", MACHINE_TYPE_286, {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_siemens_init, NULL }, @@ -164,7 +164,7 @@ const machine_t machines[] = { /* 386SX machines */ { "[ISA] IBM PS/1 model 2121", "ibmps1_2121", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO | MACHINE_VIDEO_FIXED, 2, 6, 1, 63, machine_ps1_m2121_init, NULL }, { "[ISA] IBM PS/1 m.2121+ISA", "ibmps1_2121_isa", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 2, 6, 1, 63, machine_ps1_m2121_init, NULL }, - { "[GC103] AMA-932J", "ama932j", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 512, 8192, 128, 127, machine_at_ama932j_init, at_ama932j_get_device }, + { "[HT18] AMA-932J", "ama932j", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 512, 8192, 128, 127, machine_at_ama932j_init, at_ama932j_get_device }, #if defined(DEV_BRANCH) && defined(USE_AMI386SX) { "[HT18] AMI Unknown 386SX", "ami386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_headland_init, NULL }, #endif @@ -174,9 +174,9 @@ const machine_t machines[] = { { "[NEAT] Goldstar 386", "goldstar386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_goldstar386_init, NULL }, { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL }, - { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, - { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, - { "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_awardsx_init, NULL }, + { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, + { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, + { "[OPTi 291] DTK PPM-3333P", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 1, 16, 1, 127, machine_at_awardsx_init, NULL }, /* 386SX machines which utilize the MCA bus */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL }, From 0b4b2b4d2ff5cdf8690da623763f267372a92c37 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Jul 2020 18:30:27 +0200 Subject: [PATCH 2/2] A number of recompiler fixes and put some of the timer/cycle-related changes behind #ifdef's as they are no longer used but someone may want to still try them out. --- src/codegen/codegen_accumulate_x86-64.c | 2 ++ src/codegen/codegen_accumulate_x86.c | 2 ++ src/codegen/codegen_ops_x86-64.h | 12 +++++-- src/codegen/codegen_ops_x86.h | 2 +- src/codegen/codegen_x86-64.c | 4 +++ src/codegen/codegen_x86.c | 4 +++ src/codegen_new/codegen.c | 6 +++- src/codegen_new/codegen_accumulate.c | 2 ++ src/codegen_new/codegen_reg.c | 2 ++ src/cpu/386_common.h | 28 ++++++++-------- src/cpu/386_dynarec.c | 8 +++++ src/cpu/cpu.c | 2 ++ src/cpu/cpu.h | 12 ++++++- src/mem/mem.c | 44 ++++++++++++------------- 14 files changed, 89 insertions(+), 41 deletions(-) diff --git a/src/codegen/codegen_accumulate_x86-64.c b/src/codegen/codegen_accumulate_x86-64.c index bca46c59f..8e2722b3e 100644 --- a/src/codegen/codegen_accumulate_x86-64.c +++ b/src/codegen/codegen_accumulate_x86-64.c @@ -20,6 +20,7 @@ void codegen_accumulate(int acc_reg, int delta) { acc_regs[acc_reg].count += delta; +#ifdef USE_ACYCS if ((acc_reg == ACCREG_cycles) && (delta != 0)) { if (delta == -1) { /* -delta = 1 */ @@ -41,6 +42,7 @@ void codegen_accumulate(int acc_reg, int delta) addlong(-delta); } } +#endif } void codegen_accumulate_flush(void) diff --git a/src/codegen/codegen_accumulate_x86.c b/src/codegen/codegen_accumulate_x86.c index 5efa06d86..424cc45ab 100644 --- a/src/codegen/codegen_accumulate_x86.c +++ b/src/codegen/codegen_accumulate_x86.c @@ -20,6 +20,7 @@ void codegen_accumulate(int acc_reg, int delta) { acc_regs[acc_reg].count += delta; +#ifdef USE_ACYCS if ((acc_reg == ACCREG_cycles) && (delta != 0)) { if (delta == -1) { /* -delta = 1 */ @@ -38,6 +39,7 @@ void codegen_accumulate(int acc_reg, int delta) addlong((uintptr_t) -delta); } } +#endif } void codegen_accumulate_flush(void) diff --git a/src/codegen/codegen_ops_x86-64.h b/src/codegen/codegen_ops_x86-64.h index 3dae840f5..ab68a535a 100644 --- a/src/codegen/codegen_ops_x86-64.h +++ b/src/codegen/codegen_ops_x86-64.h @@ -2969,23 +2969,31 @@ static inline void SUB_HOST_REG_IMM(int host_reg, uint32_t imm) static inline void INC_HOST_REG_W(int host_reg) { - addbyte(0x66); /*DECW host_reg*/ + addbyte(0x66); /*INCW host_reg*/ + if (host_reg & 8) + addbyte(0x41); addbyte(0xff); addbyte(0xc0 | (host_reg & 7)); } static inline void INC_HOST_REG(int host_reg) { - addbyte(0xff); /*DECL host_reg*/ + if (host_reg & 8) + addbyte(0x41); + addbyte(0xff); /*INCL host_reg*/ addbyte(0xc0 | (host_reg & 7)); } static inline void DEC_HOST_REG_W(int host_reg) { addbyte(0x66); /*DECW host_reg*/ + if (host_reg & 8) + addbyte(0x41); addbyte(0xff); addbyte(0xc8 | (host_reg & 7)); } static inline void DEC_HOST_REG(int host_reg) { + if (host_reg & 8) + addbyte(0x41); addbyte(0xff); /*DECL host_reg*/ addbyte(0xc8 | (host_reg & 7)); } diff --git a/src/codegen/codegen_ops_x86.h b/src/codegen/codegen_ops_x86.h index 737efe03a..c4a9cbd47 100644 --- a/src/codegen/codegen_ops_x86.h +++ b/src/codegen/codegen_ops_x86.h @@ -485,7 +485,7 @@ static inline void SUB_HOST_REG_IMM(int host_reg, uint32_t imm) static inline void INC_HOST_REG_W(int host_reg) { - addbyte(0x66); /*DECW host_reg*/ + addbyte(0x66); /*INCW host_reg*/ addbyte(0x40 | host_reg); } static inline void INC_HOST_REG(int host_reg) diff --git a/src/codegen/codegen_x86-64.c b/src/codegen/codegen_x86-64.c index 29de95b6b..bed8393b6 100644 --- a/src/codegen/codegen_x86-64.c +++ b/src/codegen/codegen_x86-64.c @@ -1097,6 +1097,7 @@ generate_call: codegen_block_full_ins++; codegen_endpc = (cs + cpu_state.pc) + 8; +#ifdef CHECK_INT /* Check for interrupts. */ addbyte(0xf6); /* test byte ptr[&pic_pending],1 */ addbyte(0x04); @@ -1105,6 +1106,7 @@ generate_call: addbyte(0x01); addbyte(0x0F); addbyte(0x85); /*JNZ 0*/ addlong((uint32_t)(uintptr_t)&block->data[BLOCK_EXIT_OFFSET] - (uint32_t)(uintptr_t)(&block->data[block_pos + 4])); +#endif return; } @@ -1178,11 +1180,13 @@ generate_call: block->ins++; +#ifdef CHECK_INT /* Check for interrupts. */ addbyte(0x0a); /* or al,byte ptr[&pic_pending] */ addbyte(0x04); addbyte(0x25); addlong((uint32_t) (uintptr_t) &pic_pending); +#endif addbyte(0x85); /*OR %eax, %eax*/ addbyte(0xc0); diff --git a/src/codegen/codegen_x86.c b/src/codegen/codegen_x86.c index 3415d642b..fec9b8662 100644 --- a/src/codegen/codegen_x86.c +++ b/src/codegen/codegen_x86.c @@ -2066,6 +2066,7 @@ generate_call: codegen_block_full_ins++; codegen_endpc = (cs + cpu_state.pc) + 8; +#ifdef CHECK_INT /* Check for interrupts. */ addbyte(0xf6); /* test byte ptr[&pic_pending],1 */ addbyte(0x05); @@ -2073,6 +2074,7 @@ generate_call: addbyte(0x01); addbyte(0x0F); addbyte(0x85); /*JNZ 0*/ addlong((uint32_t)&block->data[BLOCK_EXIT_OFFSET] - (uint32_t)(&block->data[block_pos + 4])); +#endif return; } @@ -2157,10 +2159,12 @@ generate_call: block->ins++; +#ifdef CHECK_INT /* Check for interrupts. */ addbyte(0x0a); /* or al,byte ptr[&pic_pending] */ addbyte(0x05); addlong((uint32_t) (uintptr_t) &pic_pending); +#endif addbyte(0x09); /*OR %eax, %eax*/ addbyte(0xc0); diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index 0f635be0e..f1b1ada7c 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -683,6 +683,9 @@ generate_call: } codegen_mark_code_present(block, cs+old_pc, (op_pc - old_pc) - pc_off); /* It is apparently a prefixed instruction. */ + // if ((recomp_op_table == recomp_opcodes) && (opcode == 0x48)) + // goto codegen_skip; + if (recomp_op_table && recomp_op_table[(opcode | op_32) & recomp_opcode_mask]) { uint32_t new_pc = recomp_op_table[(opcode | op_32) & recomp_opcode_mask](block, ir, opcode, fetchdat, op_32, op_pc); @@ -701,7 +704,8 @@ generate_call: return; } } - + +codegen_skip: if ((op_table == x86_dynarec_opcodes_REPNE || op_table == x86_dynarec_opcodes_REPE) && !op_table[opcode | op_32]) { op_table = (OpFn *) x86_dynarec_opcodes; diff --git a/src/codegen_new/codegen_accumulate.c b/src/codegen_new/codegen_accumulate.c index cfb3006f0..f15776b74 100644 --- a/src/codegen_new/codegen_accumulate.c +++ b/src/codegen_new/codegen_accumulate.c @@ -20,9 +20,11 @@ void codegen_accumulate(ir_data_t *ir, int acc_reg, int delta) { acc_regs[acc_reg].count += delta; +#ifdef USE_ACYCS if ((acc_reg == ACCREG_cycles) && (delta != 0)) { uop_ADD_IMM(ir, IREG_acycs, IREG_acycs, -delta); } +#endif } void codegen_accumulate_flush(ir_data_t *ir) diff --git a/src/codegen_new/codegen_reg.c b/src/codegen_new/codegen_reg.c index a727c0206..ed067f707 100644 --- a/src/codegen_new/codegen_reg.c +++ b/src/codegen_new/codegen_reg.c @@ -95,7 +95,9 @@ struct [IREG_rm_mod_reg] = {REG_DWORD, &cpu_state.rm_data.rm_mod_reg_data, REG_INTEGER, REG_PERMANENT}, +#ifdef USE_ACYCS [IREG_acycs] = {REG_DWORD, &acycs, REG_INTEGER, REG_PERMANENT}, +#endif [IREG_cycles] = {REG_DWORD, &cpu_state._cycles, REG_INTEGER, REG_PERMANENT}, [IREG_CS_base] = {REG_DWORD, &cpu_state.seg_cs.base, REG_INTEGER, REG_PERMANENT}, diff --git a/src/cpu/386_common.h b/src/cpu/386_common.h index 294c82b98..1832a7ea1 100644 --- a/src/cpu/386_common.h +++ b/src/cpu/386_common.h @@ -22,28 +22,28 @@ #include #ifdef USE_NEW_DYNAREC -#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) ) -#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 1))?readmemwl((s)+(a)):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) -#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 3))?readmemll((s)+(a)):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) -#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) +#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uintptr_t)((s) + (a))) ) +#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 1))?readmemwl((s)+(a)):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) +#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 3))?readmemll((s)+(a)):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) +#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) -#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v -#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v -#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v -#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 7)) writememql((s)+(a),v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v +#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 7)) writememql((s)+(a),v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v #else #undef readmemb #undef writememb -#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF)?readmemb386l(s,a): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) ) -#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 7))?readmemql(s,a):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) +#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF)?readmemb386l(s,a): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uintptr_t)((s) + (a))) ) +#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7))?readmemql(s,a):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) -#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF) writememb386l(s,a,v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v +#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF) writememb386l(s,a,v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 1)) writememwl(s,a,v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v -#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 3)) writememll(s,a,v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v -#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 7)) writememql(s,a,v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v +#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 1)) writememwl(s,a,v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 3)) writememll(s,a,v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7)) writememql(s,a,v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v #endif diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index 06c655ce1..9d20f5668 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -272,7 +272,9 @@ static void prefetch_flush() static int cycles_main = 0, cycles_old = 0; static uint64_t tsc_old = 0; +#ifdef USE_ACYCS int acycs = 0; +#endif void @@ -282,8 +284,10 @@ update_tsc(void) uint64_t delta; cycdiff = cycles_old - cycles; +#ifdef USE_ACYCS if (inrecomp) cycdiff += acycs; +#endif delta = tsc - tsc_old; if (delta > 0) { @@ -314,7 +318,9 @@ void exec386_dynarec(int cycs) int cyc_period = cycs / 2000; /*5us*/ +#ifdef USE_ACYCS acycs = 0; +#endif cycles_main += cycs; while (cycles_main > 0) { @@ -534,7 +540,9 @@ void exec386_dynarec(int cycs) inrecomp=1; code(); +#ifdef USE_ACYCS acycs = 0; +#endif inrecomp=0; #ifndef USE_NEW_DYNAREC diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 71c453878..122e0f732 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -360,7 +360,9 @@ cpu_set(void) cpu_effective = cpu; cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective]; +#ifdef USE_ACYCS acycs = 0; +#endif cpu_alt_reset = 0; unmask_a20_in_smm = 0; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 4ad81f76b..c63aacfc7 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -101,6 +101,13 @@ enum { #define CPU_REQUIRES_DYNAREC 2 #define CPU_ALTERNATE_XTAL 4 +#if (defined __amd64__ || defined _M_X64) +#define LOOKUP_INV -1LL +#else +#define LOOKUP_INV -1 +#endif + + typedef struct { const char *name; const char *internal_name; @@ -476,7 +483,10 @@ extern int timing_misaligned; extern int in_sys, unmask_a20_in_smm; extern uint32_t old_rammask; -extern int acycs, pic_pending; +#ifdef USE_ACYCS +extern int acycs; +#endif +extern int pic_pending; extern uint16_t cpu_fast_off_count, cpu_fast_off_val; extern uint32_t cpu_fast_off_flags; diff --git a/src/mem/mem.c b/src/mem/mem.c index 29d67d1a1..cf6813d2a 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -219,12 +219,12 @@ flushmmucache(void) for (c = 0; c < 256; c++) { if (readlookup[c] != (int) 0xffffffff) { - readlookup2[readlookup[c]] = -1; + readlookup2[readlookup[c]] = LOOKUP_INV; readlookup[c] = 0xffffffff; } if (writelookup[c] != (int) 0xffffffff) { page_lookup[writelookup[c]] = NULL; - writelookup2[writelookup[c]] = -1; + writelookup2[writelookup[c]] = LOOKUP_INV; writelookup[c] = 0xffffffff; } } @@ -246,12 +246,12 @@ flushmmucache_nopc(void) for (c = 0; c < 256; c++) { if (readlookup[c] != (int) 0xffffffff) { - readlookup2[readlookup[c]] = -1; + readlookup2[readlookup[c]] = LOOKUP_INV; readlookup[c] = 0xffffffff; } if (writelookup[c] != (int) 0xffffffff) { page_lookup[writelookup[c]] = NULL; - writelookup2[writelookup[c]] = -1; + writelookup2[writelookup[c]] = LOOKUP_INV; writelookup[c] = 0xffffffff; } } @@ -265,12 +265,12 @@ flushmmucache_cr3(void) for (c = 0; c < 256; c++) { if (readlookup[c] != (int) 0xffffffff) { - readlookup2[readlookup[c]] = -1; + readlookup2[readlookup[c]] = LOOKUP_INV; readlookup[c] = 0xffffffff; } if (writelookup[c] != (int) 0xffffffff) { page_lookup[writelookup[c]] = NULL; - writelookup2[writelookup[c]] = -1; + writelookup2[writelookup[c]] = LOOKUP_INV; writelookup[c] = 0xffffffff; } } @@ -295,7 +295,7 @@ mem_flush_write_page(uint32_t addr, uint32_t virt) target = (uintptr_t)&ram[a]; if (writelookup2[writelookup[c]] == target || page_lookup[writelookup[c]] == page_target) { - writelookup2[writelookup[c]] = -1; + writelookup2[writelookup[c]] = LOOKUP_INV; page_lookup[writelookup[c]] = NULL; writelookup[c] = 0xffffffff; } @@ -583,10 +583,10 @@ addreadlookup(uint32_t virt, uint32_t phys) if (virt == 0xffffffff) return; - if (readlookup2[virt>>12] != (uintptr_t) -1) return; + if (readlookup2[virt>>12] != (uintptr_t) LOOKUP_INV) return; if (readlookup[readlnext] != (int) 0xffffffff) - readlookup2[readlookup[readlnext]] = -1; + readlookup2[readlookup[readlnext]] = LOOKUP_INV; a = (uintptr_t)(phys & ~0xfff) - (uintptr_t)(virt & ~0xfff); @@ -614,7 +614,7 @@ addwritelookup(uint32_t virt, uint32_t phys) if (writelookup[writelnext] != -1) { page_lookup[writelookup[writelnext]] = NULL; - writelookup2[writelookup[writelnext]] = -1; + writelookup2[writelookup[writelnext]] = LOOKUP_INV; } #ifdef USE_NEW_DYNAREC @@ -756,7 +756,7 @@ readmemwl(uint32_t addr) return 0xffff; } return readmembl(addr)|(readmembl(addr+1)<<8); - } else if (readlookup2[addr >> 12] != -1) + } else if (readlookup2[addr >> 12] != LOOKUP_INV) return *(uint16_t *)(readlookup2[addr >> 12] + addr); } if (cr0>>31) { @@ -802,7 +802,7 @@ writememwl(uint32_t addr, uint16_t val) writemembl(addr,val); writemembl(addr+1,val>>8); return; - } else if (writelookup2[addr >> 12] != -1) { + } else if (writelookup2[addr >> 12] != LOOKUP_INV) { *(uint16_t *)(writelookup2[addr >> 12] + addr) = val; return; } @@ -853,7 +853,7 @@ readmemll(uint32_t addr) return 0xffffffff; } return readmemwl(addr)|(readmemwl(addr+2)<<16); - } else if (readlookup2[addr >> 12] != -1) + } else if (readlookup2[addr >> 12] != LOOKUP_INV) return *(uint32_t *)(readlookup2[addr >> 12] + addr); } @@ -905,7 +905,7 @@ writememll(uint32_t addr, uint32_t val) writememwl(addr,val); writememwl(addr+2,val>>16); return; - } else if (writelookup2[addr >> 12] != -1) { + } else if (writelookup2[addr >> 12] != LOOKUP_INV) { *(uint32_t *)(writelookup2[addr >> 12] + addr) = val; return; } @@ -959,7 +959,7 @@ readmemql(uint32_t addr) return 0xffffffffffffffffULL; } return readmemll(addr)|((uint64_t)readmemll(addr+4)<<32); - } else if (readlookup2[addr >> 12] != -1) + } else if (readlookup2[addr >> 12] != LOOKUP_INV) return *(uint64_t *)(readlookup2[addr >> 12] + addr); } @@ -1001,7 +1001,7 @@ writememql(uint32_t addr, uint64_t val) writememll(addr, val); writememll(addr+4, val >> 32); return; - } else if (writelookup2[addr >> 12] != -1) { + } else if (writelookup2[addr >> 12] != LOOKUP_INV) { *(uint64_t *)(writelookup2[addr >> 12] + addr) = val; return; } @@ -1078,7 +1078,7 @@ readmemwl(uint32_t seg, uint32_t addr) if (is386) return readmemb386l(seg,addr)|(((uint16_t) readmemb386l(seg,addr+1))<<8); else return readmembl(seg+addr)|(((uint16_t) readmembl(seg+addr+1))<<8); } - else if (readlookup2[addr2 >> 12] != (uintptr_t) -1) + else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint16_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1134,7 +1134,7 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val) writemembl(seg+addr+1,val>>8); } return; - } else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) { + } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint16_t *)(writelookup2[addr2 >> 12] + addr2) = val; return; } @@ -1187,7 +1187,7 @@ readmemll(uint32_t seg, uint32_t addr) if (mmutranslate_read(addr2+3) == 0xffffffffffffffffULL) return 0xffffffff; } return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16); - } else if (readlookup2[addr2 >> 12] != (uintptr_t) -1) + } else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint32_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1239,7 +1239,7 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val) writememwl(seg,addr,val); writememwl(seg,addr+2,val>>16); return; - } else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) { + } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint32_t *)(writelookup2[addr2 >> 12] + addr2) = val; return; } @@ -1297,7 +1297,7 @@ readmemql(uint32_t seg, uint32_t addr) if (mmutranslate_read(addr2+7) == 0xffffffffffffffffULL) return 0xffffffffffffffffULL; } return readmemll(seg,addr)|((uint64_t)readmemll(seg,addr+4)<<32); - } else if (readlookup2[addr2 >> 12] != (uintptr_t) -1) + } else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint64_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1337,7 +1337,7 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val) writememll(seg, addr, val); writememll(seg, addr+4, val >> 32); return; - } else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) { + } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint64_t *)(writelookup2[addr2 >> 12] + addr2) = val; return; }